xref: /linux/sound/soc/codecs/wm8523.h (revision cbecf716ca618fd44feda6bd9a64a8179d031fc5)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * wm8523.h  --  WM8523 ASoC driver
4  *
5  * Copyright 2009 Wolfson Microelectronics, plc
6  *
7  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8  *
9  * Based on wm8753.h
10  */
11 
12 #ifndef _WM8523_H
13 #define _WM8523_H
14 
15 /*
16  * Register values.
17  */
18 #define WM8523_DEVICE_ID                        0x00
19 #define WM8523_REVISION                         0x01
20 #define WM8523_PSCTRL1                          0x02
21 #define WM8523_AIF_CTRL1                        0x03
22 #define WM8523_AIF_CTRL2                        0x04
23 #define WM8523_DAC_CTRL3                        0x05
24 #define WM8523_DAC_GAINL                        0x06
25 #define WM8523_DAC_GAINR                        0x07
26 #define WM8523_ZERO_DETECT                      0x08
27 
28 #define WM8523_REGISTER_COUNT                   9
29 #define WM8523_MAX_REGISTER                     0x08
30 
31 /*
32  * Field Definitions.
33  */
34 
35 /*
36  * R0 (0x00) - DEVICE_ID
37  */
38 #define WM8523_CHIP_ID_MASK                     0xFFFF  /* CHIP_ID - [15:0] */
39 #define WM8523_CHIP_ID_SHIFT                         0  /* CHIP_ID - [15:0] */
40 #define WM8523_CHIP_ID_WIDTH                        16  /* CHIP_ID - [15:0] */
41 
42 /*
43  * R1 (0x01) - REVISION
44  */
45 #define WM8523_CHIP_REV_MASK                    0x0007  /* CHIP_REV - [2:0] */
46 #define WM8523_CHIP_REV_SHIFT                        0  /* CHIP_REV - [2:0] */
47 #define WM8523_CHIP_REV_WIDTH                        3  /* CHIP_REV - [2:0] */
48 
49 /*
50  * R2 (0x02) - PSCTRL1
51  */
52 #define WM8523_SYS_ENA_MASK                     0x0003  /* SYS_ENA - [1:0] */
53 #define WM8523_SYS_ENA_SHIFT                         0  /* SYS_ENA - [1:0] */
54 #define WM8523_SYS_ENA_WIDTH                         2  /* SYS_ENA - [1:0] */
55 
56 /*
57  * R3 (0x03) - AIF_CTRL1
58  */
59 #define WM8523_TDM_MODE_MASK                    0x1800  /* TDM_MODE - [12:11] */
60 #define WM8523_TDM_MODE_SHIFT                       11  /* TDM_MODE - [12:11] */
61 #define WM8523_TDM_MODE_WIDTH                        2  /* TDM_MODE - [12:11] */
62 #define WM8523_TDM_SLOT_MASK                    0x0600  /* TDM_SLOT - [10:9] */
63 #define WM8523_TDM_SLOT_SHIFT                        9  /* TDM_SLOT - [10:9] */
64 #define WM8523_TDM_SLOT_WIDTH                        2  /* TDM_SLOT - [10:9] */
65 #define WM8523_DEEMPH                           0x0100  /* DEEMPH  */
66 #define WM8523_DEEMPH_MASK                      0x0100  /* DEEMPH  */
67 #define WM8523_DEEMPH_SHIFT                          8  /* DEEMPH  */
68 #define WM8523_DEEMPH_WIDTH                          1  /* DEEMPH  */
69 #define WM8523_AIF_MSTR                         0x0080  /* AIF_MSTR  */
70 #define WM8523_AIF_MSTR_MASK                    0x0080  /* AIF_MSTR  */
71 #define WM8523_AIF_MSTR_SHIFT                        7  /* AIF_MSTR  */
72 #define WM8523_AIF_MSTR_WIDTH                        1  /* AIF_MSTR  */
73 #define WM8523_LRCLK_INV                        0x0040  /* LRCLK_INV  */
74 #define WM8523_LRCLK_INV_MASK                   0x0040  /* LRCLK_INV  */
75 #define WM8523_LRCLK_INV_SHIFT                       6  /* LRCLK_INV  */
76 #define WM8523_LRCLK_INV_WIDTH                       1  /* LRCLK_INV  */
77 #define WM8523_BCLK_INV                         0x0020  /* BCLK_INV  */
78 #define WM8523_BCLK_INV_MASK                    0x0020  /* BCLK_INV  */
79 #define WM8523_BCLK_INV_SHIFT                        5  /* BCLK_INV  */
80 #define WM8523_BCLK_INV_WIDTH                        1  /* BCLK_INV  */
81 #define WM8523_WL_MASK                          0x0018  /* WL - [4:3] */
82 #define WM8523_WL_SHIFT                              3  /* WL - [4:3] */
83 #define WM8523_WL_WIDTH                              2  /* WL - [4:3] */
84 #define WM8523_FMT_MASK                         0x0007  /* FMT - [2:0] */
85 #define WM8523_FMT_SHIFT                             0  /* FMT - [2:0] */
86 #define WM8523_FMT_WIDTH                             3  /* FMT - [2:0] */
87 
88 /*
89  * R4 (0x04) - AIF_CTRL2
90  */
91 #define WM8523_DAC_OP_MUX_MASK                  0x00C0  /* DAC_OP_MUX - [7:6] */
92 #define WM8523_DAC_OP_MUX_SHIFT                      6  /* DAC_OP_MUX - [7:6] */
93 #define WM8523_DAC_OP_MUX_WIDTH                      2  /* DAC_OP_MUX - [7:6] */
94 #define WM8523_BCLKDIV_MASK                     0x0038  /* BCLKDIV - [5:3] */
95 #define WM8523_BCLKDIV_SHIFT                         3  /* BCLKDIV - [5:3] */
96 #define WM8523_BCLKDIV_WIDTH                         3  /* BCLKDIV - [5:3] */
97 #define WM8523_SR_MASK                          0x0007  /* SR - [2:0] */
98 #define WM8523_SR_SHIFT                              0  /* SR - [2:0] */
99 #define WM8523_SR_WIDTH                              3  /* SR - [2:0] */
100 
101 /*
102  * R5 (0x05) - DAC_CTRL3
103  */
104 #define WM8523_ZC                               0x0010  /* ZC  */
105 #define WM8523_ZC_MASK                          0x0010  /* ZC  */
106 #define WM8523_ZC_SHIFT                              4  /* ZC  */
107 #define WM8523_ZC_WIDTH                              1  /* ZC  */
108 #define WM8523_DACR                             0x0008  /* DACR  */
109 #define WM8523_DACR_MASK                        0x0008  /* DACR  */
110 #define WM8523_DACR_SHIFT                            3  /* DACR  */
111 #define WM8523_DACR_WIDTH                            1  /* DACR  */
112 #define WM8523_DACL                             0x0004  /* DACL  */
113 #define WM8523_DACL_MASK                        0x0004  /* DACL  */
114 #define WM8523_DACL_SHIFT                            2  /* DACL  */
115 #define WM8523_DACL_WIDTH                            1  /* DACL  */
116 #define WM8523_VOL_UP_RAMP                      0x0002  /* VOL_UP_RAMP  */
117 #define WM8523_VOL_UP_RAMP_MASK                 0x0002  /* VOL_UP_RAMP  */
118 #define WM8523_VOL_UP_RAMP_SHIFT                     1  /* VOL_UP_RAMP  */
119 #define WM8523_VOL_UP_RAMP_WIDTH                     1  /* VOL_UP_RAMP  */
120 #define WM8523_VOL_DOWN_RAMP                    0x0001  /* VOL_DOWN_RAMP  */
121 #define WM8523_VOL_DOWN_RAMP_MASK               0x0001  /* VOL_DOWN_RAMP  */
122 #define WM8523_VOL_DOWN_RAMP_SHIFT                   0  /* VOL_DOWN_RAMP  */
123 #define WM8523_VOL_DOWN_RAMP_WIDTH                   1  /* VOL_DOWN_RAMP  */
124 
125 /*
126  * R6 (0x06) - DAC_GAINL
127  */
128 #define WM8523_DACL_VU                          0x0200  /* DACL_VU  */
129 #define WM8523_DACL_VU_MASK                     0x0200  /* DACL_VU  */
130 #define WM8523_DACL_VU_SHIFT                         9  /* DACL_VU  */
131 #define WM8523_DACL_VU_WIDTH                         1  /* DACL_VU  */
132 #define WM8523_DACL_VOL_MASK                    0x01FF  /* DACL_VOL - [8:0] */
133 #define WM8523_DACL_VOL_SHIFT                        0  /* DACL_VOL - [8:0] */
134 #define WM8523_DACL_VOL_WIDTH                        9  /* DACL_VOL - [8:0] */
135 
136 /*
137  * R7 (0x07) - DAC_GAINR
138  */
139 #define WM8523_DACR_VU                          0x0200  /* DACR_VU  */
140 #define WM8523_DACR_VU_MASK                     0x0200  /* DACR_VU  */
141 #define WM8523_DACR_VU_SHIFT                         9  /* DACR_VU  */
142 #define WM8523_DACR_VU_WIDTH                         1  /* DACR_VU  */
143 #define WM8523_DACR_VOL_MASK                    0x01FF  /* DACR_VOL - [8:0] */
144 #define WM8523_DACR_VOL_SHIFT                        0  /* DACR_VOL - [8:0] */
145 #define WM8523_DACR_VOL_WIDTH                        9  /* DACR_VOL - [8:0] */
146 
147 /*
148  * R8 (0x08) - ZERO_DETECT
149  */
150 #define WM8523_ZD_COUNT_MASK                    0x0003  /* ZD_COUNT - [1:0] */
151 #define WM8523_ZD_COUNT_SHIFT                        0  /* ZD_COUNT - [1:0] */
152 #define WM8523_ZD_COUNT_WIDTH                        2  /* ZD_COUNT - [1:0] */
153 
154 #endif
155