1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Watchdog Timer Driver
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 *
8 * Based on softdog.c by Alan Cox,
9 * 83977f_wdt.c by Jose Goncalves,
10 * it87.c by Chris Gauthron, Jean Delvare
11 *
12 * Data-sheets: Publicly available at the ITE website
13 * http://www.ite.com.tw/
14 *
15 * Support of the watchdog timers, which are available on
16 * IT8607, IT8613, IT8620, IT8622, IT8625, IT8628, IT8655, IT8659,
17 * IT8665, IT8686, IT8702, IT8712, IT8716, IT8718, IT8720, IT8721,
18 * IT8726, IT8728, IT8772, IT8783, IT8784 and IT8786.
19 */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/bits.h>
24 #include <linux/dmi.h>
25 #include <linux/init.h>
26 #include <linux/io.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
31 #include <linux/watchdog.h>
32
33 #define WATCHDOG_NAME "IT87 WDT"
34
35 /* Defaults for Module Parameter */
36 #define DEFAULT_TIMEOUT 60
37 #define DEFAULT_TESTMODE 0
38 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
39
40 /* IO Ports */
41 #define REG 0x2e
42 #define VAL 0x2f
43
44 /* Logical device Numbers LDN */
45 #define EC 0x04
46 #define GPIO 0x07
47
48 /* Configuration Registers and Functions */
49 #define LDNREG 0x07
50 #define CHIPID 0x20
51 #define CHIPREV 0x22
52
53 /* Chip Id numbers */
54 #define NO_DEV_ID 0xffff
55 #define IT8607_ID 0x8607
56 #define IT8613_ID 0x8613
57 #define IT8620_ID 0x8620
58 #define IT8622_ID 0x8622
59 #define IT8625_ID 0x8625
60 #define IT8628_ID 0x8628
61 #define IT8655_ID 0x8655
62 #define IT8659_ID 0x8659
63 #define IT8665_ID 0x8665
64 #define IT8686_ID 0x8686
65 #define IT8702_ID 0x8702
66 #define IT8705_ID 0x8705
67 #define IT8712_ID 0x8712
68 #define IT8716_ID 0x8716
69 #define IT8718_ID 0x8718
70 #define IT8720_ID 0x8720
71 #define IT8721_ID 0x8721
72 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
73 #define IT8728_ID 0x8728
74 #define IT8772_ID 0x8772
75 #define IT8783_ID 0x8783
76 #define IT8784_ID 0x8784
77 #define IT8786_ID 0x8786
78
79 /* Environment Controller Configuration Registers LDN=0x04 */
80 #define SCR1 0xfa
81
82 /* Environment Controller Bits SCR1 */
83 #define WDT_PWRGD 0x20
84
85 /* GPIO Configuration Registers LDN=0x07 */
86 #define WDTCTRL 0x71
87 #define WDTCFG 0x72
88 #define WDTVALLSB 0x73
89 #define WDTVALMSB 0x74
90
91 /* GPIO Bits WDTCFG */
92 #define WDT_TOV1 0x80
93 #define WDT_KRST 0x40
94 #define WDT_TOVE 0x20
95 #define WDT_PWROK 0x10 /* not in it8721 */
96 #define WDT_INT_MASK 0x0f
97
98 static unsigned int max_units, chip_type;
99
100 static unsigned int timeout = DEFAULT_TIMEOUT;
101 static int testmode = DEFAULT_TESTMODE;
102 static bool nowayout = DEFAULT_NOWAYOUT;
103
104 module_param(timeout, int, 0);
105 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
106 __MODULE_STRING(DEFAULT_TIMEOUT));
107 module_param(testmode, int, 0);
108 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
109 __MODULE_STRING(DEFAULT_TESTMODE));
110 module_param(nowayout, bool, 0);
111 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
112 __MODULE_STRING(WATCHDOG_NOWAYOUT));
113
114 /* Superio Chip */
115
superio_enter(void)116 static inline int superio_enter(void)
117 {
118 /*
119 * Try to reserve REG and REG + 1 for exclusive access.
120 */
121 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
122 return -EBUSY;
123
124 outb(0x87, REG);
125 outb(0x01, REG);
126 outb(0x55, REG);
127 outb(0x55, REG);
128 return 0;
129 }
130
superio_exit(void)131 static inline void superio_exit(void)
132 {
133 outb(0x02, REG);
134 outb(0x02, VAL);
135 release_region(REG, 2);
136 }
137
superio_select(int ldn)138 static inline void superio_select(int ldn)
139 {
140 outb(LDNREG, REG);
141 outb(ldn, VAL);
142 }
143
superio_inb(int reg)144 static inline int superio_inb(int reg)
145 {
146 outb(reg, REG);
147 return inb(VAL);
148 }
149
superio_outb(int val,int reg)150 static inline void superio_outb(int val, int reg)
151 {
152 outb(reg, REG);
153 outb(val, VAL);
154 }
155
superio_inw(int reg)156 static inline int superio_inw(int reg)
157 {
158 int val;
159
160 outb(reg++, REG);
161 val = inb(VAL) << 8;
162 outb(reg, REG);
163 val |= inb(VAL);
164 return val;
165 }
166
167 /* Internal function, should be called after superio_select(GPIO) */
_wdt_update_timeout(unsigned int t)168 static void _wdt_update_timeout(unsigned int t)
169 {
170 unsigned char cfg = WDT_KRST;
171
172 if (testmode)
173 cfg = 0;
174
175 if (t <= max_units)
176 cfg |= WDT_TOV1;
177 else
178 t /= 60;
179
180 if (chip_type != IT8721_ID)
181 cfg |= WDT_PWROK;
182
183 superio_outb(cfg, WDTCFG);
184 superio_outb(t, WDTVALLSB);
185 if (max_units > 255)
186 superio_outb(t >> 8, WDTVALMSB);
187 }
188
wdt_update_timeout(unsigned int t)189 static int wdt_update_timeout(unsigned int t)
190 {
191 int ret;
192
193 ret = superio_enter();
194 if (ret)
195 return ret;
196
197 superio_select(GPIO);
198 _wdt_update_timeout(t);
199 superio_exit();
200
201 return 0;
202 }
203
wdt_round_time(int t)204 static int wdt_round_time(int t)
205 {
206 t += 59;
207 t -= t % 60;
208 return t;
209 }
210
211 /* watchdog timer handling */
212
wdt_start(struct watchdog_device * wdd)213 static int wdt_start(struct watchdog_device *wdd)
214 {
215 return wdt_update_timeout(wdd->timeout);
216 }
217
wdt_stop(struct watchdog_device * wdd)218 static int wdt_stop(struct watchdog_device *wdd)
219 {
220 return wdt_update_timeout(0);
221 }
222
223 /**
224 * wdt_set_timeout - set a new timeout value with watchdog ioctl
225 * @wdd: pointer to the watchdog_device structure
226 * @t: timeout value in seconds
227 *
228 * The hardware device has a 8 or 16 bit watchdog timer (depends on
229 * chip version) that can be configured to count seconds or minutes.
230 *
231 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
232 *
233 * Return: 0 if the timeout was set successfully, or a negative error code on
234 * failure.
235 */
236
wdt_set_timeout(struct watchdog_device * wdd,unsigned int t)237 static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
238 {
239 int ret = 0;
240
241 if (t > max_units)
242 t = wdt_round_time(t);
243
244 wdd->timeout = t;
245
246 if (watchdog_hw_running(wdd))
247 ret = wdt_update_timeout(t);
248
249 return ret;
250 }
251
252 enum {
253 IT87_WDT_OUTPUT_THROUGH_PWRGD = BIT(0),
254 };
255
256 static const struct dmi_system_id it87_quirks[] = {
257 {
258 /* Qotom Q30900P (IT8786) */
259 .matches = {
260 DMI_EXACT_MATCH(DMI_BOARD_NAME, "QCML04"),
261 },
262 .driver_data = (void *)IT87_WDT_OUTPUT_THROUGH_PWRGD,
263 },
264 {}
265 };
266
267 static const struct watchdog_info ident = {
268 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
269 .firmware_version = 1,
270 .identity = WATCHDOG_NAME,
271 };
272
273 static const struct watchdog_ops wdt_ops = {
274 .owner = THIS_MODULE,
275 .start = wdt_start,
276 .stop = wdt_stop,
277 .set_timeout = wdt_set_timeout,
278 };
279
280 static struct watchdog_device wdt_dev = {
281 .info = &ident,
282 .ops = &wdt_ops,
283 .min_timeout = 1,
284 };
285
it87_wdt_init(void)286 static int __init it87_wdt_init(void)
287 {
288 const struct dmi_system_id *dmi_id;
289 u8 chip_rev;
290 u8 ctrl;
291 int quirks = 0;
292 int rc;
293
294 rc = superio_enter();
295 if (rc)
296 return rc;
297
298 chip_type = superio_inw(CHIPID);
299 chip_rev = superio_inb(CHIPREV) & 0x0f;
300 superio_exit();
301
302 dmi_id = dmi_first_match(it87_quirks);
303 if (dmi_id)
304 quirks = (long)dmi_id->driver_data;
305
306 switch (chip_type) {
307 case IT8702_ID:
308 max_units = 255;
309 break;
310 case IT8712_ID:
311 max_units = (chip_rev < 8) ? 255 : 65535;
312 break;
313 case IT8607_ID:
314 case IT8613_ID:
315 case IT8620_ID:
316 case IT8622_ID:
317 case IT8625_ID:
318 case IT8628_ID:
319 case IT8655_ID:
320 case IT8659_ID:
321 case IT8665_ID:
322 case IT8686_ID:
323 case IT8716_ID:
324 case IT8718_ID:
325 case IT8720_ID:
326 case IT8721_ID:
327 case IT8726_ID:
328 case IT8728_ID:
329 case IT8772_ID:
330 case IT8783_ID:
331 case IT8784_ID:
332 case IT8786_ID:
333 max_units = 65535;
334 break;
335 case IT8705_ID:
336 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
337 chip_type, chip_rev);
338 return -ENODEV;
339 case NO_DEV_ID:
340 pr_err("no device\n");
341 return -ENODEV;
342 default:
343 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
344 chip_type, chip_rev);
345 return -ENODEV;
346 }
347
348 rc = superio_enter();
349 if (rc)
350 return rc;
351
352 superio_select(GPIO);
353 superio_outb(WDT_TOV1, WDTCFG);
354
355 switch (chip_type) {
356 case IT8784_ID:
357 case IT8786_ID:
358 ctrl = superio_inb(WDTCTRL);
359 ctrl &= 0x08;
360 superio_outb(ctrl, WDTCTRL);
361 break;
362 default:
363 superio_outb(0x00, WDTCTRL);
364 }
365
366 if (quirks & IT87_WDT_OUTPUT_THROUGH_PWRGD) {
367 superio_select(EC);
368 ctrl = superio_inb(SCR1);
369 if (!(ctrl & WDT_PWRGD)) {
370 ctrl |= WDT_PWRGD;
371 superio_outb(ctrl, SCR1);
372 }
373 }
374
375 superio_exit();
376
377 if (timeout < 1 || timeout > max_units * 60) {
378 timeout = DEFAULT_TIMEOUT;
379 pr_warn("Timeout value out of range, use default %d sec\n",
380 DEFAULT_TIMEOUT);
381 }
382
383 if (timeout > max_units)
384 timeout = wdt_round_time(timeout);
385
386 wdt_dev.timeout = timeout;
387 wdt_dev.max_timeout = max_units * 60;
388
389 watchdog_stop_on_reboot(&wdt_dev);
390 rc = watchdog_register_device(&wdt_dev);
391 if (rc)
392 return rc;
393
394 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
395 chip_type, chip_rev, timeout, nowayout, testmode);
396
397 return 0;
398 }
399
it87_wdt_exit(void)400 static void __exit it87_wdt_exit(void)
401 {
402 watchdog_unregister_device(&wdt_dev);
403 }
404
405 module_init(it87_wdt_init);
406 module_exit(it87_wdt_exit);
407
408 MODULE_AUTHOR("Oliver Schuster");
409 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
410 MODULE_LICENSE("GPL");
411