| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MIPatternMatch.h | 143 std::optional<ValueAndVReg> &ValReg; member
151 inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) { in m_GCst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SelectionDAGInfo.cpp | 78 unsigned ValReg; in EmitTargetCodeForMemset() local
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| H A D | X86FastISel.cpp | 479 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, X86AddressMode &AM, in X86FastEmitStore()
689 Register ValReg = getRegForValue(Val); in X86FastEmitStore() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 351 insertSext(const LoongArchInstrInfo * TII,DebugLoc DL,MachineBasicBlock * MBB,Register ValReg,Register ShamtReg) insertSext() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 2039 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction() local
2105 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 399 insertSext(const RISCVInstrInfo * TII,DebugLoc DL,MachineBasicBlock * MBB,Register ValReg,Register ShamtReg) insertSext() argument
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 1292 Register CallLowering::ValueHandler::extendRegister(Register ValReg, in extendRegister()
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| H A D | LegalizerHelper.cpp | 4624 Register ValReg = LdStMI.getReg(0); in reduceLoadStoreWidth() local
8254 Register ValReg = MI.getOperand(ValRegIndex).getReg(); in lowerReadWriteRegister() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2909 Register ValReg = LdSt.getReg(0); in select() local
2933 const Register ValReg = LdSt.getReg(0); in select() local
6562 Register ValReg = I.getOperand(2).getReg(); in selectIntrinsic() local
6596 Register ValReg = I.getOperand(2).getReg(); in selectIntrinsic() local
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| H A D | AArch64LegalizerInfo.cpp | 1744 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoadStore() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 1603 Register ValReg = MI.getOperand(3).getReg(); in selectDSOrderedIntrinsic() local
3116 Register ValReg = MI.getOperand(2).getReg(); in selectG_INSERT_VECTOR_ELT() local
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| H A D | AMDGPULegalizerInfo.cpp | 3086 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoad() local
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