1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_HAWI_H 7 #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_HAWI_H 8 9 /* VIDEO_CC clocks */ 10 #define VIDEO_CC_AHB_CLK 0 11 #define VIDEO_CC_AHB_CLK_SRC 1 12 #define VIDEO_CC_CX_AXI0_CLK 2 13 #define VIDEO_CC_CX_DBGCH_XO_CLK 3 14 #define VIDEO_CC_CX_XO_CLK 4 15 #define VIDEO_CC_DBGCH_XO_CLK 5 16 #define VIDEO_CC_MVS0_CLK 6 17 #define VIDEO_CC_MVS0_CLK_SRC 7 18 #define VIDEO_CC_MVS0_SHIFT_CLK 8 19 #define VIDEO_CC_MVS0_VPP0_CLK 9 20 #define VIDEO_CC_MVS0_VPP0_VPP1_GATING_CLK 10 21 #define VIDEO_CC_MVS0_VPP1_CLK 11 22 #define VIDEO_CC_MVS0A_CLK 12 23 #define VIDEO_CC_MVS0A_CLK_SRC 13 24 #define VIDEO_CC_MVS0B_CLK 14 25 #define VIDEO_CC_MVS0B_CLK_SRC 15 26 #define VIDEO_CC_MVS0C_CLK 16 27 #define VIDEO_CC_MVS0C_CLK_SRC 17 28 #define VIDEO_CC_MVS0C_CTL_FREERUN_CLK 18 29 #define VIDEO_CC_MVS0C_DEBUG_CLK 19 30 #define VIDEO_CC_MVS0C_FREERUN_CLK 20 31 #define VIDEO_CC_MVS0C_SHIFT_CLK 21 32 #define VIDEO_CC_PLL0 22 33 #define VIDEO_CC_PLL0_OUT_EVEN 23 34 #define VIDEO_CC_PLL1 24 35 #define VIDEO_CC_PLL2 25 36 #define VIDEO_CC_PLL3 26 37 #define VIDEO_CC_SLEEP_CLK 27 38 #define VIDEO_CC_XO_CLK 28 39 #define VIDEO_CC_XO_CLK_SRC 29 40 41 /* VIDEO_CC power domains */ 42 #define VIDEO_CC_AXI0_CX_INT_GDSC 0 43 #define VIDEO_CC_MM_INT_GDSC 1 44 #define VIDEO_CC_MVS0_GDSC 2 45 #define VIDEO_CC_MVS0_VPP0_GDSC 3 46 #define VIDEO_CC_MVS0_VPP1_GDSC 4 47 #define VIDEO_CC_MVS0A_GDSC 5 48 #define VIDEO_CC_MVS0C_GDSC 6 49 50 /* VIDEO_CC resets */ 51 #define VIDEO_CC_AXI0_CX_INT_BCR 0 52 #define VIDEO_CC_INTERFACE_BCR 1 53 #define VIDEO_CC_MM_INT_BCR 2 54 #define VIDEO_CC_MVS0_BCR 3 55 #define VIDEO_CC_MVS0_VPP0_BCR 4 56 #define VIDEO_CC_MVS0_VPP1_BCR 5 57 #define VIDEO_CC_MVS0A_BCR 6 58 #define VIDEO_CC_MVS0C_CLK_ARES 7 59 #define VIDEO_CC_MVS0C_BCR 8 60 #define VIDEO_CC_MVS0C_CTL_FREERUN_CLK_ARES 9 61 #define VIDEO_CC_MVS0C_FREERUN_CLK_ARES 10 62 #define VIDEO_CC_XO_CLK_ARES 11 63 64 #endif 65