1 /* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 /** 25 * DOC: Interrupt management for the V3D engine 26 * 27 * We have an interrupt status register (V3D_INTCTL) which reports 28 * interrupts, and where writing 1 bits clears those interrupts. 29 * There are also a pair of interrupt registers 30 * (V3D_INTENA/V3D_INTDIS) where writing a 1 to their bits enables or 31 * disables that specific interrupt, and 0s written are ignored 32 * (reading either one returns the set of enabled interrupts). 33 * 34 * When we take a binning flush done interrupt, we need to submit the 35 * next frame for binning and move the finished frame to the render 36 * thread. 37 * 38 * When we take a render frame interrupt, we need to wake the 39 * processes waiting for some frame to be done, and get the next frame 40 * submitted ASAP (so the hardware doesn't sit idle when there's work 41 * to do). 42 * 43 * When we take the binner out of memory interrupt, we need to 44 * allocate some new memory and pass it to the binner so that the 45 * current job can make progress. 46 */ 47 48 #include <linux/platform_device.h> 49 50 #include <drm/drm_drv.h> 51 #include <drm/drm_print.h> 52 53 #include "vc4_drv.h" 54 #include "vc4_regs.h" 55 #include "vc4_trace.h" 56 57 #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \ 58 V3D_INT_FLDONE | \ 59 V3D_INT_FRDONE) 60 61 static void 62 vc4_overflow_mem_work(struct work_struct *work) 63 { 64 struct vc4_dev *vc4 = 65 container_of(work, struct vc4_dev, overflow_mem_work); 66 struct vc4_bo *bo; 67 int bin_bo_slot; 68 struct vc4_exec_info *exec; 69 unsigned long irqflags; 70 71 mutex_lock(&vc4->bin_bo_lock); 72 73 if (!vc4->bin_bo) 74 goto complete; 75 76 bo = vc4->bin_bo; 77 78 bin_bo_slot = vc4_v3d_get_bin_slot(vc4); 79 if (bin_bo_slot < 0) { 80 drm_err(&vc4->base, "Couldn't allocate binner overflow mem\n"); 81 goto complete; 82 } 83 84 spin_lock_irqsave(&vc4->job_lock, irqflags); 85 86 if (vc4->bin_alloc_overflow) { 87 /* If we had overflow memory allocated previously, 88 * then that chunk will free when the current bin job 89 * is done. If we don't have a bin job running, then 90 * the chunk will be done whenever the list of render 91 * jobs has drained. 92 */ 93 exec = vc4_first_bin_job(vc4); 94 if (!exec) 95 exec = vc4_last_render_job(vc4); 96 if (exec) { 97 exec->bin_slots |= vc4->bin_alloc_overflow; 98 } else { 99 /* There's nothing queued in the hardware, so 100 * the old slot is free immediately. 101 */ 102 vc4->bin_alloc_used &= ~vc4->bin_alloc_overflow; 103 } 104 } 105 vc4->bin_alloc_overflow = BIT(bin_bo_slot); 106 107 V3D_WRITE(V3D_BPOA, bo->base.dma_addr + bin_bo_slot * vc4->bin_alloc_size); 108 V3D_WRITE(V3D_BPOS, bo->base.base.size); 109 V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM); 110 V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM); 111 spin_unlock_irqrestore(&vc4->job_lock, irqflags); 112 113 complete: 114 mutex_unlock(&vc4->bin_bo_lock); 115 } 116 117 static void 118 vc4_irq_finish_bin_job(struct drm_device *dev) 119 { 120 struct vc4_dev *vc4 = to_vc4_dev(dev); 121 struct vc4_exec_info *next, *exec = vc4_first_bin_job(vc4); 122 123 if (!exec) 124 return; 125 126 trace_vc4_bcl_end_irq(dev, exec->seqno); 127 128 vc4_move_job_to_render(dev, exec); 129 next = vc4_first_bin_job(vc4); 130 131 /* Only submit the next job in the bin list if it matches the perfmon 132 * attached to the one that just finished (or if both jobs don't have 133 * perfmon attached to them). 134 */ 135 if (next && next->perfmon == exec->perfmon) 136 vc4_submit_next_bin_job(dev); 137 } 138 139 static void 140 vc4_cancel_bin_job(struct drm_device *dev) 141 { 142 struct vc4_dev *vc4 = to_vc4_dev(dev); 143 struct vc4_exec_info *exec = vc4_first_bin_job(vc4); 144 145 if (!exec) 146 return; 147 148 /* Stop the perfmon so that the next bin job can be started. */ 149 if (exec->perfmon) 150 vc4_perfmon_stop(vc4, exec->perfmon, false); 151 152 list_move_tail(&exec->head, &vc4->bin_job_list); 153 vc4_submit_next_bin_job(dev); 154 } 155 156 static void 157 vc4_irq_finish_render_job(struct drm_device *dev) 158 { 159 struct vc4_dev *vc4 = to_vc4_dev(dev); 160 struct vc4_exec_info *exec = vc4_first_render_job(vc4); 161 struct vc4_exec_info *nextbin, *nextrender; 162 163 if (!exec) 164 return; 165 166 trace_vc4_rcl_end_irq(dev, exec->seqno); 167 168 vc4->finished_seqno++; 169 list_move_tail(&exec->head, &vc4->job_done_list); 170 171 nextbin = vc4_first_bin_job(vc4); 172 nextrender = vc4_first_render_job(vc4); 173 174 /* Only stop the perfmon if following jobs in the queue don't expect it 175 * to be enabled. 176 */ 177 if (exec->perfmon && !nextrender && 178 (!nextbin || nextbin->perfmon != exec->perfmon)) 179 vc4_perfmon_stop(vc4, exec->perfmon, true); 180 181 /* If there's a render job waiting, start it. If this is not the case 182 * we may have to unblock the binner if it's been stalled because of 183 * perfmon (this can be checked by comparing the perfmon attached to 184 * the finished renderjob to the one attached to the next bin job: if 185 * they don't match, this means the binner is stalled and should be 186 * restarted). 187 */ 188 if (nextrender) 189 vc4_submit_next_render_job(dev); 190 else if (nextbin && nextbin->perfmon != exec->perfmon) 191 vc4_submit_next_bin_job(dev); 192 193 if (exec->fence) { 194 dma_fence_signal_locked(exec->fence); 195 dma_fence_put(exec->fence); 196 exec->fence = NULL; 197 } 198 199 wake_up_all(&vc4->job_wait_queue); 200 schedule_work(&vc4->job_done_work); 201 } 202 203 static irqreturn_t 204 vc4_irq(int irq, void *arg) 205 { 206 struct drm_device *dev = arg; 207 struct vc4_dev *vc4 = to_vc4_dev(dev); 208 uint32_t intctl; 209 irqreturn_t status = IRQ_NONE; 210 211 barrier(); 212 intctl = V3D_READ(V3D_INTCTL); 213 214 /* Acknowledge the interrupts we're handling here. The binner 215 * last flush / render frame done interrupt will be cleared, 216 * while OUTOMEM will stay high until the underlying cause is 217 * cleared. 218 */ 219 V3D_WRITE(V3D_INTCTL, intctl); 220 221 if (intctl & V3D_INT_OUTOMEM) { 222 /* Disable OUTOMEM until the work is done. */ 223 V3D_WRITE(V3D_INTDIS, V3D_INT_OUTOMEM); 224 schedule_work(&vc4->overflow_mem_work); 225 status = IRQ_HANDLED; 226 } 227 228 if (intctl & V3D_INT_FLDONE) { 229 spin_lock(&vc4->job_lock); 230 vc4_irq_finish_bin_job(dev); 231 spin_unlock(&vc4->job_lock); 232 status = IRQ_HANDLED; 233 } 234 235 if (intctl & V3D_INT_FRDONE) { 236 spin_lock(&vc4->job_lock); 237 vc4_irq_finish_render_job(dev); 238 spin_unlock(&vc4->job_lock); 239 status = IRQ_HANDLED; 240 } 241 242 return status; 243 } 244 245 static void 246 vc4_irq_prepare(struct drm_device *dev) 247 { 248 struct vc4_dev *vc4 = to_vc4_dev(dev); 249 250 if (!vc4->v3d) 251 return; 252 253 init_waitqueue_head(&vc4->job_wait_queue); 254 INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work); 255 256 /* Clear any pending interrupts someone might have left around 257 * for us. 258 */ 259 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 260 } 261 262 void 263 vc4_irq_enable(struct drm_device *dev) 264 { 265 struct vc4_dev *vc4 = to_vc4_dev(dev); 266 267 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) 268 return; 269 270 if (!vc4->v3d) 271 return; 272 273 /* Enable the render done interrupts. The out-of-memory interrupt is 274 * enabled as soon as we have a binner BO allocated. 275 */ 276 V3D_WRITE(V3D_INTENA, V3D_INT_FLDONE | V3D_INT_FRDONE); 277 } 278 279 void 280 vc4_irq_disable(struct drm_device *dev) 281 { 282 struct vc4_dev *vc4 = to_vc4_dev(dev); 283 284 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) 285 return; 286 287 if (!vc4->v3d) 288 return; 289 290 /* Disable sending interrupts for our driver's IRQs. */ 291 V3D_WRITE(V3D_INTDIS, V3D_DRIVER_IRQS); 292 293 /* Clear any pending interrupts we might have left. */ 294 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 295 296 /* Finish any interrupt handler still in flight. */ 297 synchronize_irq(vc4->irq); 298 299 cancel_work_sync(&vc4->overflow_mem_work); 300 } 301 302 int vc4_irq_install(struct drm_device *dev, int irq) 303 { 304 struct vc4_dev *vc4 = to_vc4_dev(dev); 305 int ret; 306 307 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) 308 return -ENODEV; 309 310 if (irq == IRQ_NOTCONNECTED) 311 return -ENOTCONN; 312 313 vc4_irq_prepare(dev); 314 315 ret = request_irq(irq, vc4_irq, 0, dev->driver->name, dev); 316 if (ret) 317 return ret; 318 319 vc4_irq_enable(dev); 320 321 return 0; 322 } 323 324 void vc4_irq_uninstall(struct drm_device *dev) 325 { 326 struct vc4_dev *vc4 = to_vc4_dev(dev); 327 328 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) 329 return; 330 331 vc4_irq_disable(dev); 332 free_irq(vc4->irq, dev); 333 } 334 335 /** Reinitializes interrupt registers when a GPU reset is performed. */ 336 void vc4_irq_reset(struct drm_device *dev) 337 { 338 struct vc4_dev *vc4 = to_vc4_dev(dev); 339 unsigned long irqflags; 340 341 if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4)) 342 return; 343 344 /* Acknowledge any stale IRQs. */ 345 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS); 346 347 /* 348 * Turn all our interrupts on. Binner out of memory is the 349 * only one we expect to trigger at this point, since we've 350 * just come from poweron and haven't supplied any overflow 351 * memory yet. 352 */ 353 V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS); 354 355 spin_lock_irqsave(&vc4->job_lock, irqflags); 356 vc4_cancel_bin_job(dev); 357 vc4_irq_finish_render_job(dev); 358 spin_unlock_irqrestore(&vc4->job_lock, irqflags); 359 } 360