1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * dwc3-imx8mp.c - NXP imx8mp Specific Glue layer
4 *
5 * Copyright (c) 2020 NXP.
6 */
7
8 #include <linux/cleanup.h>
9 #include <linux/clk.h>
10 #include <linux/interrupt.h>
11 #include <linux/io.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_platform.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18
19 #include "core.h"
20
21 /* USB wakeup registers */
22 #define USB_WAKEUP_CTRL 0x00
23
24 /* Global wakeup interrupt enable, also used to clear interrupt */
25 #define USB_WAKEUP_EN BIT(31)
26 /* Wakeup from connect or disconnect, only for superspeed */
27 #define USB_WAKEUP_SS_CONN BIT(5)
28 /* 0 select vbus_valid, 1 select sessvld */
29 #define USB_WAKEUP_VBUS_SRC_SESS_VAL BIT(4)
30 /* Enable signal for wake up from u3 state */
31 #define USB_WAKEUP_U3_EN BIT(3)
32 /* Enable signal for wake up from id change */
33 #define USB_WAKEUP_ID_EN BIT(2)
34 /* Enable signal for wake up from vbus change */
35 #define USB_WAKEUP_VBUS_EN BIT(1)
36 /* Enable signal for wake up from dp/dm change */
37 #define USB_WAKEUP_DPDM_EN BIT(0)
38
39 #define USB_WAKEUP_EN_MASK GENMASK(5, 0)
40
41 /* USB glue registers */
42 #define USB_CTRL0 0x00
43 #define USB_CTRL1 0x04
44
45 #define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */
46 #define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */
47 #define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */
48
49 #define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */
50 #define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */
51
52 struct dwc3_imx8mp {
53 struct device *dev;
54 struct platform_device *dwc3;
55 void __iomem *hsio_blk_base;
56 void __iomem *glue_base;
57 struct clk *hsio_clk;
58 struct clk *suspend_clk;
59 int irq;
60 bool pm_suspended;
61 bool wakeup_pending;
62 };
63
imx8mp_configure_glue(struct dwc3_imx8mp * dwc3_imx)64 static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx)
65 {
66 struct device *dev = dwc3_imx->dev;
67 u32 value;
68
69 if (!dwc3_imx->glue_base)
70 return;
71
72 value = readl(dwc3_imx->glue_base + USB_CTRL0);
73
74 if (device_property_read_bool(dev, "fsl,permanently-attached"))
75 value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
76 else
77 value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
78
79 if (device_property_read_bool(dev, "fsl,disable-port-power-control"))
80 value &= ~(USB_CTRL0_PORTPWR_EN);
81 else
82 value |= USB_CTRL0_PORTPWR_EN;
83
84 writel(value, dwc3_imx->glue_base + USB_CTRL0);
85
86 value = readl(dwc3_imx->glue_base + USB_CTRL1);
87 if (device_property_read_bool(dev, "fsl,over-current-active-low"))
88 value |= USB_CTRL1_OC_POLARITY;
89 else
90 value &= ~USB_CTRL1_OC_POLARITY;
91
92 if (device_property_read_bool(dev, "fsl,power-active-low"))
93 value |= USB_CTRL1_PWR_POLARITY;
94 else
95 value &= ~USB_CTRL1_PWR_POLARITY;
96
97 writel(value, dwc3_imx->glue_base + USB_CTRL1);
98 }
99
dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp * dwc3_imx,pm_message_t msg)100 static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx,
101 pm_message_t msg)
102 {
103 struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3);
104 u32 val;
105
106 if (!dwc3)
107 return;
108
109 val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
110
111 if ((dwc3->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc3->xhci) {
112 val |= USB_WAKEUP_EN | USB_WAKEUP_DPDM_EN;
113 if (PMSG_IS_AUTO(msg))
114 val |= USB_WAKEUP_SS_CONN | USB_WAKEUP_U3_EN;
115 } else {
116 val |= USB_WAKEUP_EN | USB_WAKEUP_VBUS_EN |
117 USB_WAKEUP_VBUS_SRC_SESS_VAL;
118 }
119
120 writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
121 }
122
dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp * dwc3_imx)123 static void dwc3_imx8mp_wakeup_disable(struct dwc3_imx8mp *dwc3_imx)
124 {
125 u32 val;
126
127 val = readl(dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
128 val &= ~(USB_WAKEUP_EN | USB_WAKEUP_EN_MASK);
129 writel(val, dwc3_imx->hsio_blk_base + USB_WAKEUP_CTRL);
130 }
131
132 static const struct property_entry dwc3_imx8mp_properties[] = {
133 PROPERTY_ENTRY_BOOL("xhci-missing-cas-quirk"),
134 PROPERTY_ENTRY_BOOL("xhci-skip-phy-init-quirk"),
135 {},
136 };
137
138 static const struct software_node dwc3_imx8mp_swnode = {
139 .properties = dwc3_imx8mp_properties,
140 };
141
dwc3_imx8mp_interrupt(int irq,void * _dwc3_imx)142 static irqreturn_t dwc3_imx8mp_interrupt(int irq, void *_dwc3_imx)
143 {
144 struct dwc3_imx8mp *dwc3_imx = _dwc3_imx;
145 struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
146
147 if (!dwc3_imx->pm_suspended)
148 return IRQ_HANDLED;
149
150 disable_irq_nosync(dwc3_imx->irq);
151 dwc3_imx->wakeup_pending = true;
152
153 if ((dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST) && dwc->xhci)
154 pm_runtime_resume(&dwc->xhci->dev);
155 else if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE)
156 pm_runtime_get(dwc->dev);
157
158 return IRQ_HANDLED;
159 }
160
dwc3_imx8mp_probe(struct platform_device * pdev)161 static int dwc3_imx8mp_probe(struct platform_device *pdev)
162 {
163 struct device *dev = &pdev->dev;
164 struct device_node *node = dev->of_node;
165 struct dwc3_imx8mp *dwc3_imx;
166 struct resource *res;
167 int err, irq;
168
169 if (!node) {
170 dev_err(dev, "device node not found\n");
171 return -EINVAL;
172 }
173
174 dwc3_imx = devm_kzalloc(dev, sizeof(*dwc3_imx), GFP_KERNEL);
175 if (!dwc3_imx)
176 return -ENOMEM;
177
178 platform_set_drvdata(pdev, dwc3_imx);
179
180 dwc3_imx->dev = dev;
181
182 dwc3_imx->hsio_blk_base = devm_platform_ioremap_resource(pdev, 0);
183 if (IS_ERR(dwc3_imx->hsio_blk_base))
184 return PTR_ERR(dwc3_imx->hsio_blk_base);
185
186 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
187 if (!res) {
188 dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though.");
189 } else {
190 dwc3_imx->glue_base = devm_ioremap_resource(dev, res);
191 if (IS_ERR(dwc3_imx->glue_base))
192 return PTR_ERR(dwc3_imx->glue_base);
193 }
194
195 dwc3_imx->hsio_clk = devm_clk_get_enabled(dev, "hsio");
196 if (IS_ERR(dwc3_imx->hsio_clk))
197 return dev_err_probe(dev, PTR_ERR(dwc3_imx->hsio_clk),
198 "Failed to get hsio clk\n");
199
200 dwc3_imx->suspend_clk = devm_clk_get_enabled(dev, "suspend");
201 if (IS_ERR(dwc3_imx->suspend_clk))
202 return dev_err_probe(dev, PTR_ERR(dwc3_imx->suspend_clk),
203 "Failed to get suspend clk\n");
204
205 irq = platform_get_irq(pdev, 0);
206 if (irq < 0)
207 return irq;
208 dwc3_imx->irq = irq;
209
210 struct device_node *dwc3_np __free(device_node) = of_get_compatible_child(node,
211 "snps,dwc3");
212 if (!dwc3_np)
213 return dev_err_probe(dev, -ENODEV, "failed to find dwc3 core child\n");
214
215 imx8mp_configure_glue(dwc3_imx);
216
217 pm_runtime_set_active(dev);
218 pm_runtime_enable(dev);
219 err = pm_runtime_get_sync(dev);
220 if (err < 0)
221 goto disable_rpm;
222
223 err = device_add_software_node(dev, &dwc3_imx8mp_swnode);
224 if (err) {
225 err = -ENODEV;
226 dev_err(dev, "failed to add software node\n");
227 goto disable_rpm;
228 }
229
230 err = of_platform_populate(node, NULL, NULL, dev);
231 if (err) {
232 dev_err(&pdev->dev, "failed to create dwc3 core\n");
233 goto remove_swnode;
234 }
235
236 dwc3_imx->dwc3 = of_find_device_by_node(dwc3_np);
237 if (!dwc3_imx->dwc3) {
238 dev_err(dev, "failed to get dwc3 platform device\n");
239 err = -ENODEV;
240 goto depopulate;
241 }
242
243 err = devm_request_threaded_irq(dev, irq, NULL, dwc3_imx8mp_interrupt,
244 IRQF_ONESHOT, dev_name(dev), dwc3_imx);
245 if (err) {
246 dev_err(dev, "failed to request IRQ #%d --> %d\n", irq, err);
247 goto put_dwc3;
248 }
249
250 device_set_wakeup_capable(dev, true);
251 pm_runtime_put(dev);
252
253 return 0;
254
255 put_dwc3:
256 put_device(&dwc3_imx->dwc3->dev);
257 depopulate:
258 of_platform_depopulate(dev);
259 remove_swnode:
260 device_remove_software_node(dev);
261 disable_rpm:
262 pm_runtime_disable(dev);
263 pm_runtime_put_noidle(dev);
264
265 return err;
266 }
267
dwc3_imx8mp_remove(struct platform_device * pdev)268 static void dwc3_imx8mp_remove(struct platform_device *pdev)
269 {
270 struct dwc3_imx8mp *dwc3_imx = platform_get_drvdata(pdev);
271 struct device *dev = &pdev->dev;
272
273 put_device(&dwc3_imx->dwc3->dev);
274
275 pm_runtime_get_sync(dev);
276 of_platform_depopulate(dev);
277 device_remove_software_node(dev);
278
279 pm_runtime_disable(dev);
280 pm_runtime_put_noidle(dev);
281 }
282
dwc3_imx8mp_suspend(struct dwc3_imx8mp * dwc3_imx,pm_message_t msg)283 static int dwc3_imx8mp_suspend(struct dwc3_imx8mp *dwc3_imx, pm_message_t msg)
284 {
285 if (dwc3_imx->pm_suspended)
286 return 0;
287
288 /* Wakeup enable */
289 if (PMSG_IS_AUTO(msg) || device_may_wakeup(dwc3_imx->dev))
290 dwc3_imx8mp_wakeup_enable(dwc3_imx, msg);
291
292 dwc3_imx->pm_suspended = true;
293
294 return 0;
295 }
296
dwc3_imx8mp_resume(struct dwc3_imx8mp * dwc3_imx,pm_message_t msg)297 static int dwc3_imx8mp_resume(struct dwc3_imx8mp *dwc3_imx, pm_message_t msg)
298 {
299 struct dwc3 *dwc = platform_get_drvdata(dwc3_imx->dwc3);
300 int ret = 0;
301
302 if (!dwc3_imx->pm_suspended)
303 return 0;
304
305 /* Wakeup disable */
306 dwc3_imx8mp_wakeup_disable(dwc3_imx);
307 dwc3_imx->pm_suspended = false;
308
309 /* Upon power loss any previous configuration is lost, restore it */
310 imx8mp_configure_glue(dwc3_imx);
311
312 if (dwc3_imx->wakeup_pending) {
313 dwc3_imx->wakeup_pending = false;
314 if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_DEVICE) {
315 pm_runtime_put_autosuspend(dwc->dev);
316 } else {
317 /*
318 * Add wait for xhci switch from suspend
319 * clock to normal clock to detect connection.
320 */
321 usleep_range(9000, 10000);
322 }
323 enable_irq(dwc3_imx->irq);
324 }
325
326 return ret;
327 }
328
dwc3_imx8mp_pm_suspend(struct device * dev)329 static int dwc3_imx8mp_pm_suspend(struct device *dev)
330 {
331 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
332 int ret;
333
334 ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND);
335
336 if (device_may_wakeup(dwc3_imx->dev)) {
337 enable_irq_wake(dwc3_imx->irq);
338
339 if (device_is_compatible(dev, "fsl,imx95-dwc3"))
340 device_set_out_band_wakeup(dev);
341
342 } else {
343 clk_disable_unprepare(dwc3_imx->suspend_clk);
344 }
345
346 clk_disable_unprepare(dwc3_imx->hsio_clk);
347 dev_dbg(dev, "dwc3 imx8mp pm suspend.\n");
348
349 return ret;
350 }
351
dwc3_imx8mp_pm_resume(struct device * dev)352 static int dwc3_imx8mp_pm_resume(struct device *dev)
353 {
354 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
355 int ret;
356
357 if (device_may_wakeup(dwc3_imx->dev)) {
358 disable_irq_wake(dwc3_imx->irq);
359 } else {
360 ret = clk_prepare_enable(dwc3_imx->suspend_clk);
361 if (ret)
362 return ret;
363 }
364
365 ret = clk_prepare_enable(dwc3_imx->hsio_clk);
366 if (ret) {
367 clk_disable_unprepare(dwc3_imx->suspend_clk);
368 return ret;
369 }
370
371 ret = dwc3_imx8mp_resume(dwc3_imx, PMSG_RESUME);
372
373 pm_runtime_disable(dev);
374 pm_runtime_set_active(dev);
375 pm_runtime_enable(dev);
376
377 dev_dbg(dev, "dwc3 imx8mp pm resume.\n");
378
379 return ret;
380 }
381
dwc3_imx8mp_runtime_suspend(struct device * dev)382 static int dwc3_imx8mp_runtime_suspend(struct device *dev)
383 {
384 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
385
386 dev_dbg(dev, "dwc3 imx8mp runtime suspend.\n");
387
388 return dwc3_imx8mp_suspend(dwc3_imx, PMSG_AUTO_SUSPEND);
389 }
390
dwc3_imx8mp_runtime_resume(struct device * dev)391 static int dwc3_imx8mp_runtime_resume(struct device *dev)
392 {
393 struct dwc3_imx8mp *dwc3_imx = dev_get_drvdata(dev);
394
395 dev_dbg(dev, "dwc3 imx8mp runtime resume.\n");
396
397 return dwc3_imx8mp_resume(dwc3_imx, PMSG_AUTO_RESUME);
398 }
399
400 static const struct dev_pm_ops dwc3_imx8mp_dev_pm_ops = {
401 SYSTEM_SLEEP_PM_OPS(dwc3_imx8mp_pm_suspend, dwc3_imx8mp_pm_resume)
402 RUNTIME_PM_OPS(dwc3_imx8mp_runtime_suspend, dwc3_imx8mp_runtime_resume,
403 NULL)
404 };
405
406 static const struct of_device_id dwc3_imx8mp_of_match[] = {
407 { .compatible = "fsl,imx8mp-dwc3", },
408 {},
409 };
410 MODULE_DEVICE_TABLE(of, dwc3_imx8mp_of_match);
411
412 static struct platform_driver dwc3_imx8mp_driver = {
413 .probe = dwc3_imx8mp_probe,
414 .remove = dwc3_imx8mp_remove,
415 .driver = {
416 .name = "imx8mp-dwc3",
417 .pm = pm_ptr(&dwc3_imx8mp_dev_pm_ops),
418 .of_match_table = dwc3_imx8mp_of_match,
419 },
420 };
421
422 module_platform_driver(dwc3_imx8mp_driver);
423
424 MODULE_ALIAS("platform:imx8mp-dwc3");
425 MODULE_AUTHOR("jun.li@nxp.com");
426 MODULE_LICENSE("GPL v2");
427 MODULE_DESCRIPTION("DesignWare USB3 imx8mp Glue Layer");
428