1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 /* Store the full address of the global discovery table */ 4 #define UNCORE_DISCOVERY_MSR 0x201e 5 /* Base address of uncore perfmon discovery table for CBB domain */ 6 #define CBB_UNCORE_DISCOVERY_MSR 0x710 7 /* Base address of uncore perfmon discovery table for the package */ 8 #define PACKAGE_UNCORE_DISCOVERY_MSR 0x711 9 10 /* Generic device ID of a discovery table device */ 11 #define UNCORE_DISCOVERY_TABLE_DEVICE 0x09a7 12 /* Device ID used on DMR */ 13 #define DMR_UNCORE_DISCOVERY_TABLE_DEVICE 0x09a1 14 /* Capability ID for a discovery table device */ 15 #define UNCORE_EXT_CAP_ID_DISCOVERY 0x23 16 /* First DVSEC offset */ 17 #define UNCORE_DISCOVERY_DVSEC_OFFSET 0x8 18 /* Mask of the supported discovery entry type */ 19 #define UNCORE_DISCOVERY_DVSEC_ID_MASK 0xffff 20 /* PMON discovery entry type ID */ 21 #define UNCORE_DISCOVERY_DVSEC_ID_PMON 0x1 22 /* Second DVSEC offset */ 23 #define UNCORE_DISCOVERY_DVSEC2_OFFSET 0xc 24 /* Mask of the discovery table BAR offset */ 25 #define UNCORE_DISCOVERY_DVSEC2_BIR_MASK 0x7 26 /* Discovery table BAR base offset */ 27 #define UNCORE_DISCOVERY_BIR_BASE 0x10 28 /* Discovery table BAR step */ 29 #define UNCORE_DISCOVERY_BIR_STEP 0x4 30 /* Global discovery table size */ 31 #define UNCORE_DISCOVERY_GLOBAL_MAP_SIZE 0x20 32 33 #define UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET 28 34 #define UNCORE_DISCOVERY_PCI_DOMAIN(data) \ 35 ((data >> UNCORE_DISCOVERY_PCI_DOMAIN_OFFSET) & 0x7) 36 #define UNCORE_DISCOVERY_PCI_BUS_OFFSET 20 37 #define UNCORE_DISCOVERY_PCI_BUS(data) \ 38 ((data >> UNCORE_DISCOVERY_PCI_BUS_OFFSET) & 0xff) 39 #define UNCORE_DISCOVERY_PCI_DEVFN_OFFSET 12 40 #define UNCORE_DISCOVERY_PCI_DEVFN(data) \ 41 ((data >> UNCORE_DISCOVERY_PCI_DEVFN_OFFSET) & 0xff) 42 #define UNCORE_DISCOVERY_PCI_BOX_CTRL(data) (data & 0xfff) 43 44 45 #define uncore_discovery_invalid_unit(unit) \ 46 (!unit.table1 || !unit.ctl || \ 47 unit.table1 == -1ULL || unit.ctl == -1ULL || \ 48 unit.table3 == -1ULL) 49 50 #define GENERIC_PMON_CTL_EV_SEL_MASK 0x000000ff 51 #define GENERIC_PMON_CTL_UMASK_MASK 0x0000ff00 52 #define GENERIC_PMON_CTL_EDGE_DET (1 << 18) 53 #define GENERIC_PMON_CTL_INVERT (1 << 23) 54 #define GENERIC_PMON_CTL_TRESH_MASK 0xff000000 55 #define GENERIC_PMON_RAW_EVENT_MASK (GENERIC_PMON_CTL_EV_SEL_MASK | \ 56 GENERIC_PMON_CTL_UMASK_MASK | \ 57 GENERIC_PMON_CTL_EDGE_DET | \ 58 GENERIC_PMON_CTL_INVERT | \ 59 GENERIC_PMON_CTL_TRESH_MASK) 60 61 #define GENERIC_PMON_BOX_CTL_FRZ (1 << 0) 62 #define GENERIC_PMON_BOX_CTL_RST_CTRL (1 << 8) 63 #define GENERIC_PMON_BOX_CTL_RST_CTRS (1 << 9) 64 #define GENERIC_PMON_BOX_CTL_INT (GENERIC_PMON_BOX_CTL_RST_CTRL | \ 65 GENERIC_PMON_BOX_CTL_RST_CTRS) 66 67 enum uncore_access_type { 68 UNCORE_ACCESS_MSR = 0, 69 UNCORE_ACCESS_MMIO, 70 UNCORE_ACCESS_PCI, 71 72 UNCORE_ACCESS_MAX, 73 }; 74 75 struct uncore_global_discovery { 76 union { 77 u64 table1; 78 struct { 79 u64 type : 8, 80 stride : 8, 81 max_units : 10, 82 __reserved_1 : 36, 83 access_type : 2; 84 }; 85 }; 86 87 u64 ctl; /* Global Control Address */ 88 89 union { 90 u64 table3; 91 struct { 92 u64 status_offset : 8, 93 num_status : 16, 94 __reserved_2 : 40; 95 }; 96 }; 97 }; 98 99 struct uncore_unit_discovery { 100 union { 101 u64 table1; 102 struct { 103 u64 num_regs : 8, 104 ctl_offset : 8, 105 bit_width : 8, 106 ctr_offset : 8, 107 status_offset : 8, 108 __reserved_1 : 22, 109 access_type : 2; 110 }; 111 }; 112 113 u64 ctl; /* Unit Control Address */ 114 115 union { 116 u64 table3; 117 struct { 118 u64 box_type : 16, 119 box_id : 16, 120 __reserved_2 : 32; 121 }; 122 }; 123 }; 124 125 struct intel_uncore_discovery_unit { 126 struct rb_node node; 127 unsigned int pmu_idx; /* The idx of the corresponding PMU */ 128 unsigned int id; /* Unit ID */ 129 unsigned int die; /* Die ID */ 130 u64 addr; /* Unit Control Address */ 131 }; 132 133 struct intel_uncore_discovery_type { 134 struct rb_node node; 135 enum uncore_access_type access_type; 136 struct rb_root units; /* Unit ctrl addr for all units */ 137 u16 type; /* Type ID of the uncore block */ 138 u8 num_counters; 139 u8 counter_width; 140 u8 ctl_offset; /* Counter Control 0 offset */ 141 u8 ctr_offset; /* Counter 0 offset */ 142 u16 num_units; /* number of units */ 143 }; 144 145 bool uncore_discovery(struct uncore_plat_init *init); 146 void intel_uncore_clear_discovery_tables(void); 147 void intel_uncore_generic_uncore_cpu_init(void); 148 int intel_uncore_generic_uncore_pci_init(void); 149 void intel_uncore_generic_uncore_mmio_init(void); 150 151 void intel_generic_uncore_msr_init_box(struct intel_uncore_box *box); 152 void intel_generic_uncore_msr_disable_box(struct intel_uncore_box *box); 153 void intel_generic_uncore_msr_enable_box(struct intel_uncore_box *box); 154 155 void intel_generic_uncore_mmio_init_box(struct intel_uncore_box *box); 156 void intel_generic_uncore_mmio_disable_box(struct intel_uncore_box *box); 157 void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box); 158 void intel_generic_uncore_mmio_disable_event(struct intel_uncore_box *box, 159 struct perf_event *event); 160 void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box, 161 struct perf_event *event); 162 163 void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box); 164 void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box); 165 void intel_generic_uncore_pci_enable_box(struct intel_uncore_box *box); 166 void intel_generic_uncore_pci_disable_event(struct intel_uncore_box *box, 167 struct perf_event *event); 168 u64 intel_generic_uncore_pci_read_counter(struct intel_uncore_box *box, 169 struct perf_event *event); 170 171 struct intel_uncore_type ** 172 intel_uncore_generic_init_uncores(enum uncore_access_type type_id, int num_extra); 173 174 int intel_uncore_find_discovery_unit_id(struct rb_root *units, int die, 175 unsigned int pmu_idx); 176 bool intel_generic_uncore_assign_hw_event(struct perf_event *event, 177 struct intel_uncore_box *box); 178 void uncore_find_add_unit(struct intel_uncore_discovery_unit *node, 179 struct rb_root *root, u16 *num_units); 180 struct intel_uncore_type ** 181 uncore_get_uncores(enum uncore_access_type type_id, int num_extra, 182 struct intel_uncore_type **extra, int max_num_types, 183 struct intel_uncore_type **uncores); 184