1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2004,2007,2008 IBM Corporation
4 *
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Dave Safford <safford@watson.ibm.com>
8 * Reiner Sailer <sailer@watson.ibm.com>
9 * Kylene Hall <kjhall@us.ibm.com>
10 * Debora Velarde <dvelarde@us.ibm.com>
11 *
12 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
13 *
14 * Device driver for TCG/TCPA TPM (trusted platform module).
15 * Specifications at www.trustedcomputinggroup.org
16 */
17 #ifndef __LINUX_TPM_H__
18 #define __LINUX_TPM_H__
19
20 #include <linux/hw_random.h>
21 #include <linux/acpi.h>
22 #include <linux/cdev.h>
23 #include <linux/fs.h>
24 #include <linux/highmem.h>
25 #include <crypto/hash_info.h>
26 #include <crypto/aes.h>
27
28 #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */
29
30 #define TPM2_MAX_DIGEST_SIZE SHA512_DIGEST_SIZE
31 #define TPM2_MAX_PCR_BANKS 8
32
33 struct tpm_chip;
34 struct trusted_key_payload;
35 struct trusted_key_options;
36 /* opaque structure, holds auth session parameters like the session key */
37 struct tpm2_auth;
38
39 enum tpm2_session_types {
40 TPM2_SE_HMAC = 0x00,
41 TPM2_SE_POLICY = 0x01,
42 TPM2_SE_TRIAL = 0x02,
43 };
44
45 /* if you add a new hash to this, increment TPM_MAX_HASHES below */
46 enum tpm_algorithms {
47 TPM_ALG_ERROR = 0x0000,
48 TPM_ALG_SHA1 = 0x0004,
49 TPM_ALG_AES = 0x0006,
50 TPM_ALG_KEYEDHASH = 0x0008,
51 TPM_ALG_SHA256 = 0x000B,
52 TPM_ALG_SHA384 = 0x000C,
53 TPM_ALG_SHA512 = 0x000D,
54 TPM_ALG_NULL = 0x0010,
55 TPM_ALG_SM3_256 = 0x0012,
56 TPM_ALG_ECC = 0x0023,
57 TPM_ALG_CFB = 0x0043,
58 };
59
60 /*
61 * maximum number of hashing algorithms a TPM can have. This is
62 * basically a count of every hash in tpm_algorithms above
63 */
64 #define TPM_MAX_HASHES 5
65
66 enum tpm2_curves {
67 TPM2_ECC_NONE = 0x0000,
68 TPM2_ECC_NIST_P256 = 0x0003,
69 };
70
71 struct tpm_digest {
72 u16 alg_id;
73 u8 digest[TPM2_MAX_DIGEST_SIZE];
74 } __packed;
75
76 struct tpm_bank_info {
77 u16 alg_id;
78 u16 digest_size;
79 u16 crypto_id;
80 };
81
82 enum TPM_OPS_FLAGS {
83 TPM_OPS_AUTO_STARTUP = BIT(0),
84 };
85
86 struct tpm_class_ops {
87 unsigned int flags;
88 const u8 req_complete_mask;
89 const u8 req_complete_val;
90 bool (*req_canceled)(struct tpm_chip *chip, u8 status);
91 int (*recv) (struct tpm_chip *chip, u8 *buf, size_t len);
92 int (*send)(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
93 size_t cmd_len);
94 void (*cancel) (struct tpm_chip *chip);
95 u8 (*status) (struct tpm_chip *chip);
96 void (*update_timeouts)(struct tpm_chip *chip,
97 unsigned long *timeout_cap);
98 void (*update_durations)(struct tpm_chip *chip,
99 unsigned long *duration_cap);
100 int (*go_idle)(struct tpm_chip *chip);
101 int (*cmd_ready)(struct tpm_chip *chip);
102 int (*request_locality)(struct tpm_chip *chip, int loc);
103 int (*relinquish_locality)(struct tpm_chip *chip, int loc);
104 void (*clk_enable)(struct tpm_chip *chip, bool value);
105 };
106
107 #define TPM_NUM_EVENT_LOG_FILES 3
108
109 /* Indexes the duration array */
110 enum tpm_duration {
111 TPM_SHORT = 0,
112 TPM_MEDIUM = 1,
113 TPM_LONG = 2,
114 TPM_LONG_LONG = 3,
115 TPM_UNDEFINED,
116 TPM_NUM_DURATIONS = TPM_UNDEFINED,
117 };
118
119 #define TPM_PPI_VERSION_LEN 3
120
121 struct tpm_space {
122 u32 context_tbl[3];
123 u8 *context_buf;
124 u32 session_tbl[3];
125 u8 *session_buf;
126 u32 buf_size;
127 };
128
129 struct tpm_bios_log {
130 void *bios_event_log;
131 void *bios_event_log_end;
132 };
133
134 struct tpm_chip_seqops {
135 struct tpm_chip *chip;
136 const struct seq_operations *seqops;
137 };
138
139 /* fixed define for the curve we use which is NIST_P256 */
140 #define EC_PT_SZ 32
141
142 /*
143 * fixed define for the size of a name. This is actually HASHALG size
144 * plus 2, so 32 for SHA256
145 */
146 #define TPM2_NAME_SIZE 34
147
148 /*
149 * The maximum size for an object context
150 */
151 #define TPM2_MAX_CONTEXT_SIZE 4096
152
153 struct tpm_chip {
154 struct device dev;
155 struct device devs;
156 struct cdev cdev;
157 struct cdev cdevs;
158
159 /* A driver callback under ops cannot be run unless ops_sem is held
160 * (sometimes implicitly, eg for the sysfs code). ops becomes null
161 * when the driver is unregistered, see tpm_try_get_ops.
162 */
163 struct rw_semaphore ops_sem;
164 const struct tpm_class_ops *ops;
165
166 struct tpm_bios_log log;
167 struct tpm_chip_seqops bin_log_seqops;
168 struct tpm_chip_seqops ascii_log_seqops;
169
170 unsigned int flags;
171
172 int dev_num; /* /dev/tpm# */
173 unsigned long is_open; /* only one allowed */
174
175 char hwrng_name[64];
176 struct hwrng hwrng;
177
178 struct mutex tpm_mutex; /* tpm is processing */
179
180 unsigned long timeout_a; /* jiffies */
181 unsigned long timeout_b; /* jiffies */
182 unsigned long timeout_c; /* jiffies */
183 unsigned long timeout_d; /* jiffies */
184 bool timeout_adjusted;
185 unsigned long duration[TPM_NUM_DURATIONS]; /* jiffies */
186 bool duration_adjusted;
187
188 struct dentry *bios_dir;
189
190 const struct attribute_group *groups[3 + TPM_MAX_HASHES];
191 unsigned int groups_cnt;
192
193 u32 nr_allocated_banks;
194 struct tpm_bank_info allocated_banks[TPM2_MAX_PCR_BANKS];
195 #ifdef CONFIG_ACPI
196 acpi_handle acpi_dev_handle;
197 char ppi_version[TPM_PPI_VERSION_LEN + 1];
198 #endif /* CONFIG_ACPI */
199
200 struct tpm_space work_space;
201 u32 last_cc;
202 u32 nr_commands;
203 u32 *cc_attrs_tbl;
204
205 /* active locality */
206 int locality;
207
208 #ifdef CONFIG_TCG_TPM2_HMAC
209 /* details for communication security via sessions */
210
211 /* saved context for NULL seed */
212 u8 null_key_context[TPM2_MAX_CONTEXT_SIZE];
213 /* name of NULL seed */
214 u8 null_key_name[TPM2_NAME_SIZE];
215 u8 null_ec_key_x[EC_PT_SZ];
216 u8 null_ec_key_y[EC_PT_SZ];
217 struct tpm2_auth *auth;
218 #endif
219 };
220
221 #define TPM_HEADER_SIZE 10
222
223 enum tpm2_const {
224 TPM2_PLATFORM_PCR = 24,
225 TPM2_PCR_SELECT_MIN = ((TPM2_PLATFORM_PCR + 7) / 8),
226 };
227
228 enum tpm2_timeouts {
229 TPM2_TIMEOUT_A = 750,
230 TPM2_TIMEOUT_B = 4000,
231 TPM2_TIMEOUT_C = 200,
232 TPM2_TIMEOUT_D = 30,
233 };
234
235 enum tpm2_durations {
236 TPM2_DURATION_SHORT = 20,
237 TPM2_DURATION_LONG = 2000,
238 TPM2_DURATION_DEFAULT = 120000,
239 };
240
241 enum tpm2_structures {
242 TPM2_ST_NO_SESSIONS = 0x8001,
243 TPM2_ST_SESSIONS = 0x8002,
244 TPM2_ST_CREATION = 0x8021,
245 };
246
247 /* Indicates from what layer of the software stack the error comes from */
248 #define TSS2_RC_LAYER_SHIFT 16
249 #define TSS2_RESMGR_TPM_RC_LAYER (11 << TSS2_RC_LAYER_SHIFT)
250
251 enum tpm2_return_codes {
252 TPM2_RC_SUCCESS = 0x0000,
253 TPM2_RC_HASH = 0x0083, /* RC_FMT1 */
254 TPM2_RC_HANDLE = 0x008B,
255 TPM2_RC_INTEGRITY = 0x009F,
256 TPM2_RC_INITIALIZE = 0x0100, /* RC_VER1 */
257 TPM2_RC_FAILURE = 0x0101,
258 TPM2_RC_DISABLED = 0x0120,
259 TPM2_RC_UPGRADE = 0x012D,
260 TPM2_RC_COMMAND_CODE = 0x0143,
261 TPM2_RC_TESTING = 0x090A, /* RC_WARN */
262 TPM2_RC_REFERENCE_H0 = 0x0910,
263 TPM2_RC_RETRY = 0x0922,
264 TPM2_RC_SESSION_MEMORY = 0x0903,
265 };
266
267 enum tpm2_command_codes {
268 TPM2_CC_FIRST = 0x011F,
269 TPM2_CC_HIERARCHY_CONTROL = 0x0121,
270 TPM2_CC_HIERARCHY_CHANGE_AUTH = 0x0129,
271 TPM2_CC_CREATE_PRIMARY = 0x0131,
272 TPM2_CC_SEQUENCE_COMPLETE = 0x013E,
273 TPM2_CC_SELF_TEST = 0x0143,
274 TPM2_CC_STARTUP = 0x0144,
275 TPM2_CC_SHUTDOWN = 0x0145,
276 TPM2_CC_NV_READ = 0x014E,
277 TPM2_CC_CREATE = 0x0153,
278 TPM2_CC_LOAD = 0x0157,
279 TPM2_CC_SEQUENCE_UPDATE = 0x015C,
280 TPM2_CC_UNSEAL = 0x015E,
281 TPM2_CC_CONTEXT_LOAD = 0x0161,
282 TPM2_CC_CONTEXT_SAVE = 0x0162,
283 TPM2_CC_FLUSH_CONTEXT = 0x0165,
284 TPM2_CC_READ_PUBLIC = 0x0173,
285 TPM2_CC_START_AUTH_SESS = 0x0176,
286 TPM2_CC_VERIFY_SIGNATURE = 0x0177,
287 TPM2_CC_GET_CAPABILITY = 0x017A,
288 TPM2_CC_GET_RANDOM = 0x017B,
289 TPM2_CC_PCR_READ = 0x017E,
290 TPM2_CC_PCR_EXTEND = 0x0182,
291 TPM2_CC_EVENT_SEQUENCE_COMPLETE = 0x0185,
292 TPM2_CC_HASH_SEQUENCE_START = 0x0186,
293 TPM2_CC_CREATE_LOADED = 0x0191,
294 TPM2_CC_LAST = 0x0193, /* Spec 1.36 */
295 };
296
297 enum tpm2_permanent_handles {
298 TPM2_RH_NULL = 0x40000007,
299 TPM2_RS_PW = 0x40000009,
300 };
301
302 /* Most Significant Octet for key types */
303 enum tpm2_mso_type {
304 TPM2_MSO_NVRAM = 0x01,
305 TPM2_MSO_SESSION = 0x02,
306 TPM2_MSO_POLICY = 0x03,
307 TPM2_MSO_PERMANENT = 0x40,
308 TPM2_MSO_VOLATILE = 0x80,
309 TPM2_MSO_PERSISTENT = 0x81,
310 };
311
tpm2_handle_mso(u32 handle)312 static inline enum tpm2_mso_type tpm2_handle_mso(u32 handle)
313 {
314 return handle >> 24;
315 }
316
317 enum tpm2_capabilities {
318 TPM2_CAP_HANDLES = 1,
319 TPM2_CAP_COMMANDS = 2,
320 TPM2_CAP_PCRS = 5,
321 TPM2_CAP_TPM_PROPERTIES = 6,
322 };
323
324 enum tpm2_properties {
325 TPM_PT_TOTAL_COMMANDS = 0x0129,
326 };
327
328 enum tpm2_startup_types {
329 TPM2_SU_CLEAR = 0x0000,
330 TPM2_SU_STATE = 0x0001,
331 };
332
333 enum tpm2_cc_attrs {
334 TPM2_CC_ATTR_CHANDLES = 25,
335 TPM2_CC_ATTR_RHANDLE = 28,
336 TPM2_CC_ATTR_VENDOR = 29,
337 };
338
339 #define TPM_VID_INTEL 0x8086
340 #define TPM_VID_WINBOND 0x1050
341 #define TPM_VID_STM 0x104A
342 #define TPM_VID_ATML 0x1114
343 #define TPM_VID_IFX 0x15D1
344
345 enum tpm_chip_flags {
346 TPM_CHIP_FLAG_BOOTSTRAPPED = BIT(0),
347 TPM_CHIP_FLAG_TPM2 = BIT(1),
348 TPM_CHIP_FLAG_IRQ = BIT(2),
349 TPM_CHIP_FLAG_VIRTUAL = BIT(3),
350 TPM_CHIP_FLAG_HAVE_TIMEOUTS = BIT(4),
351 TPM_CHIP_FLAG_ALWAYS_POWERED = BIT(5),
352 TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
353 TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),
354 TPM_CHIP_FLAG_SUSPENDED = BIT(8),
355 TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9),
356 TPM_CHIP_FLAG_DISABLE = BIT(10),
357 TPM_CHIP_FLAG_SYNC = BIT(11),
358 };
359
360 #define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)
361
362 struct tpm_header {
363 __be16 tag;
364 __be32 length;
365 union {
366 __be32 ordinal;
367 __be32 return_code;
368 };
369 } __packed;
370
371 enum tpm_buf_flags {
372 /* the capacity exceeded: */
373 TPM_BUF_OVERFLOW = BIT(0),
374 /* TPM2B format: */
375 TPM_BUF_TPM2B = BIT(1),
376 /* read out of boundary: */
377 TPM_BUF_BOUNDARY_ERROR = BIT(2),
378 };
379
380 /*
381 * A string buffer type for constructing TPM commands.
382 */
383 struct tpm_buf {
384 u32 flags;
385 u32 length;
386 u8 *data;
387 u8 handles;
388 };
389
390 enum tpm2_object_attributes {
391 TPM2_OA_FIXED_TPM = BIT(1),
392 TPM2_OA_ST_CLEAR = BIT(2),
393 TPM2_OA_FIXED_PARENT = BIT(4),
394 TPM2_OA_SENSITIVE_DATA_ORIGIN = BIT(5),
395 TPM2_OA_USER_WITH_AUTH = BIT(6),
396 TPM2_OA_ADMIN_WITH_POLICY = BIT(7),
397 TPM2_OA_NO_DA = BIT(10),
398 TPM2_OA_ENCRYPTED_DUPLICATION = BIT(11),
399 TPM2_OA_RESTRICTED = BIT(16),
400 TPM2_OA_DECRYPT = BIT(17),
401 TPM2_OA_SIGN = BIT(18),
402 };
403
404 enum tpm2_session_attributes {
405 TPM2_SA_CONTINUE_SESSION = BIT(0),
406 TPM2_SA_AUDIT_EXCLUSIVE = BIT(1),
407 TPM2_SA_AUDIT_RESET = BIT(3),
408 TPM2_SA_DECRYPT = BIT(5),
409 TPM2_SA_ENCRYPT = BIT(6),
410 TPM2_SA_AUDIT = BIT(7),
411 };
412
413 struct tpm2_hash {
414 unsigned int crypto_id;
415 unsigned int tpm_id;
416 };
417
418 int tpm_buf_init(struct tpm_buf *buf, u16 tag, u32 ordinal);
419 void tpm_buf_reset(struct tpm_buf *buf, u16 tag, u32 ordinal);
420 int tpm_buf_init_sized(struct tpm_buf *buf);
421 void tpm_buf_reset_sized(struct tpm_buf *buf);
422 void tpm_buf_destroy(struct tpm_buf *buf);
423 u32 tpm_buf_length(struct tpm_buf *buf);
424 void tpm_buf_append(struct tpm_buf *buf, const u8 *new_data, u16 new_length);
425 void tpm_buf_append_u8(struct tpm_buf *buf, const u8 value);
426 void tpm_buf_append_u16(struct tpm_buf *buf, const u16 value);
427 void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value);
428 u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset);
429 u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset);
430 u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset);
431 void tpm_buf_append_handle(struct tpm_chip *chip, struct tpm_buf *buf, u32 handle);
432
433 /*
434 * Check if TPM device is in the firmware upgrade mode.
435 */
tpm_is_firmware_upgrade(struct tpm_chip * chip)436 static inline bool tpm_is_firmware_upgrade(struct tpm_chip *chip)
437 {
438 return chip->flags & TPM_CHIP_FLAG_FIRMWARE_UPGRADE;
439 }
440
tpm2_rc_value(u32 rc)441 static inline u32 tpm2_rc_value(u32 rc)
442 {
443 return (rc & BIT(7)) ? rc & 0xbf : rc;
444 }
445
446 /*
447 * Convert a return value from tpm_transmit_cmd() to POSIX error code.
448 */
tpm_ret_to_err(ssize_t ret)449 static inline ssize_t tpm_ret_to_err(ssize_t ret)
450 {
451 if (ret < 0)
452 return ret;
453
454 switch (tpm2_rc_value(ret)) {
455 case TPM2_RC_SUCCESS:
456 return 0;
457 case TPM2_RC_SESSION_MEMORY:
458 return -ENOMEM;
459 case TPM2_RC_HASH:
460 return -EINVAL;
461 default:
462 return -EPERM;
463 }
464 }
465
466 #if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)
467
468 extern int tpm_is_tpm2(struct tpm_chip *chip);
469 extern __must_check int tpm_try_get_ops(struct tpm_chip *chip);
470 extern void tpm_put_ops(struct tpm_chip *chip);
471 extern ssize_t tpm_transmit_cmd(struct tpm_chip *chip, struct tpm_buf *buf,
472 size_t min_rsp_body_length, const char *desc);
473 extern int tpm_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
474 struct tpm_digest *digest);
475 extern int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
476 struct tpm_digest *digests);
477 extern int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max);
478 extern struct tpm_chip *tpm_default_chip(void);
479 void tpm2_flush_context(struct tpm_chip *chip, u32 handle);
480 int tpm2_find_hash_alg(unsigned int crypto_id);
481
tpm_buf_append_empty_auth(struct tpm_buf * buf,u32 handle)482 static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
483 {
484 /* simple authorization for empty auth */
485 tpm_buf_append_u32(buf, 9); /* total length of auth */
486 tpm_buf_append_u32(buf, handle);
487 tpm_buf_append_u16(buf, 0); /* nonce len */
488 tpm_buf_append_u8(buf, 0); /* attributes */
489 tpm_buf_append_u16(buf, 0); /* hmac len */
490 }
491 #else
tpm_is_tpm2(struct tpm_chip * chip)492 static inline int tpm_is_tpm2(struct tpm_chip *chip)
493 {
494 return -ENODEV;
495 }
tpm_pcr_read(struct tpm_chip * chip,int pcr_idx,struct tpm_digest * digest)496 static inline int tpm_pcr_read(struct tpm_chip *chip, int pcr_idx,
497 struct tpm_digest *digest)
498 {
499 return -ENODEV;
500 }
501
tpm_pcr_extend(struct tpm_chip * chip,u32 pcr_idx,struct tpm_digest * digests)502 static inline int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
503 struct tpm_digest *digests)
504 {
505 return -ENODEV;
506 }
507
tpm_get_random(struct tpm_chip * chip,u8 * data,size_t max)508 static inline int tpm_get_random(struct tpm_chip *chip, u8 *data, size_t max)
509 {
510 return -ENODEV;
511 }
512
tpm_default_chip(void)513 static inline struct tpm_chip *tpm_default_chip(void)
514 {
515 return NULL;
516 }
517
tpm_buf_append_empty_auth(struct tpm_buf * buf,u32 handle)518 static inline void tpm_buf_append_empty_auth(struct tpm_buf *buf, u32 handle)
519 {
520 }
521 #endif
522
tpm2_chip_auth(struct tpm_chip * chip)523 static inline struct tpm2_auth *tpm2_chip_auth(struct tpm_chip *chip)
524 {
525 #ifdef CONFIG_TCG_TPM2_HMAC
526 return chip->auth;
527 #else
528 return NULL;
529 #endif
530 }
531
532 int tpm_buf_append_name(struct tpm_chip *chip, struct tpm_buf *buf,
533 u32 handle, u8 *name);
534 void tpm_buf_append_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf,
535 u8 attributes, u8 *passphrase,
536 int passphraselen);
537 void tpm_buf_append_auth(struct tpm_chip *chip, struct tpm_buf *buf,
538 u8 *passphrase, int passphraselen);
539
540 #ifdef CONFIG_TCG_TPM2_HMAC
541
542 int tpm2_start_auth_session(struct tpm_chip *chip);
543 int tpm_buf_fill_hmac_session(struct tpm_chip *chip, struct tpm_buf *buf);
544 int tpm_buf_check_hmac_response(struct tpm_chip *chip, struct tpm_buf *buf,
545 int rc);
546 void tpm2_end_auth_session(struct tpm_chip *chip);
547 #else
548 #include <linux/unaligned.h>
549
tpm2_start_auth_session(struct tpm_chip * chip)550 static inline int tpm2_start_auth_session(struct tpm_chip *chip)
551 {
552 return 0;
553 }
tpm2_end_auth_session(struct tpm_chip * chip)554 static inline void tpm2_end_auth_session(struct tpm_chip *chip)
555 {
556 }
557
tpm_buf_fill_hmac_session(struct tpm_chip * chip,struct tpm_buf * buf)558 static inline int tpm_buf_fill_hmac_session(struct tpm_chip *chip,
559 struct tpm_buf *buf)
560 {
561 return 0;
562 }
563
tpm_buf_check_hmac_response(struct tpm_chip * chip,struct tpm_buf * buf,int rc)564 static inline int tpm_buf_check_hmac_response(struct tpm_chip *chip,
565 struct tpm_buf *buf,
566 int rc)
567 {
568 return rc;
569 }
570 #endif /* CONFIG_TCG_TPM2_HMAC */
571
572 #endif
573