1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* tmp401.c 3 * 4 * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com> 5 * Preliminary tmp411 support by: 6 * Gabriel Konat, Sander Leget, Wouter Willems 7 * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de> 8 * 9 * Cleanup and support for TMP431 and TMP432 by Guenter Roeck 10 * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net> 11 */ 12 13 /* 14 * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC. 15 * 16 * Note this IC is in some aspect similar to the LM90, but it has quite a 17 * few differences too, for example the local temp has a higher resolution 18 * and thus has 16 bits registers for its value and limit instead of 8 bits. 19 */ 20 21 #include <linux/bitops.h> 22 #include <linux/err.h> 23 #include <linux/i2c.h> 24 #include <linux/hwmon.h> 25 #include <linux/init.h> 26 #include <linux/module.h> 27 #include <linux/regmap.h> 28 #include <linux/slab.h> 29 30 /* Addresses to scan */ 31 static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d, 32 0x4e, 0x4f, I2C_CLIENT_END }; 33 34 enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 }; 35 36 /* 37 * The TMP401 registers, note some registers have different addresses for 38 * reading and writing 39 */ 40 #define TMP401_STATUS 0x02 41 #define TMP401_CONFIG 0x03 42 #define TMP401_CONVERSION_RATE 0x04 43 #define TMP4XX_N_FACTOR_REG 0x18 44 #define TMP43X_BETA_RANGE 0x25 45 #define TMP401_TEMP_CRIT_HYST 0x21 46 #define TMP401_MANUFACTURER_ID_REG 0xFE 47 #define TMP401_DEVICE_ID_REG 0xFF 48 49 static const u8 TMP401_TEMP_MSB[7][3] = { 50 { 0x00, 0x01, 0x23 }, /* temp */ 51 { 0x06, 0x08, 0x16 }, /* low limit */ 52 { 0x05, 0x07, 0x15 }, /* high limit */ 53 { 0x20, 0x19, 0x1a }, /* therm (crit) limit */ 54 { 0x30, 0x34, 0x00 }, /* lowest */ 55 { 0x32, 0xf6, 0x00 }, /* highest */ 56 }; 57 58 /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */ 59 static const u8 TMP432_STATUS_REG[] = { 60 0x1b, 0x36, 0x35, 0x37 }; 61 62 /* Flags */ 63 #define TMP401_CONFIG_RANGE BIT(2) 64 #define TMP401_CONFIG_SHUTDOWN BIT(6) 65 #define TMP401_STATUS_LOCAL_CRIT BIT(0) 66 #define TMP401_STATUS_REMOTE_CRIT BIT(1) 67 #define TMP401_STATUS_REMOTE_OPEN BIT(2) 68 #define TMP401_STATUS_REMOTE_LOW BIT(3) 69 #define TMP401_STATUS_REMOTE_HIGH BIT(4) 70 #define TMP401_STATUS_LOCAL_LOW BIT(5) 71 #define TMP401_STATUS_LOCAL_HIGH BIT(6) 72 73 /* On TMP432, each status has its own register */ 74 #define TMP432_STATUS_LOCAL BIT(0) 75 #define TMP432_STATUS_REMOTE1 BIT(1) 76 #define TMP432_STATUS_REMOTE2 BIT(2) 77 78 /* Manufacturer / Device ID's */ 79 #define TMP401_MANUFACTURER_ID 0x55 80 #define TMP401_DEVICE_ID 0x11 81 #define TMP411A_DEVICE_ID 0x12 82 #define TMP411B_DEVICE_ID 0x13 83 #define TMP411C_DEVICE_ID 0x10 84 #define TMP431_DEVICE_ID 0x31 85 #define TMP432_DEVICE_ID 0x32 86 #define TMP435_DEVICE_ID 0x35 87 88 /* 89 * Driver data (common to all clients) 90 */ 91 92 static const struct i2c_device_id tmp401_id[] = { 93 { "tmp401", tmp401 }, 94 { "tmp411", tmp411 }, 95 { "tmp431", tmp431 }, 96 { "tmp432", tmp432 }, 97 { "tmp435", tmp435 }, 98 { } 99 }; 100 MODULE_DEVICE_TABLE(i2c, tmp401_id); 101 102 /* 103 * Client data (each client gets its own) 104 */ 105 106 struct tmp401_data { 107 struct i2c_client *client; 108 struct regmap *regmap; 109 enum chips kind; 110 111 bool extended_range; 112 113 /* hwmon API configuration data */ 114 u32 chip_channel_config[4]; 115 struct hwmon_channel_info chip_info; 116 u32 temp_channel_config[4]; 117 struct hwmon_channel_info temp_info; 118 const struct hwmon_channel_info *info[3]; 119 struct hwmon_chip_info chip; 120 }; 121 122 /* regmap */ 123 124 static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg) 125 { 126 switch (reg) { 127 case 0: /* local temp msb */ 128 case 1: /* remote temp msb */ 129 case 2: /* status */ 130 case 0x10: /* remote temp lsb */ 131 case 0x15: /* local temp lsb */ 132 case 0x1b: /* status (tmp432) */ 133 case 0x23 ... 0x24: /* remote temp 2 msb / lsb */ 134 case 0x30 ... 0x37: /* lowest/highest temp; status (tmp432) */ 135 return true; 136 default: 137 return false; 138 } 139 } 140 141 static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val) 142 { 143 struct tmp401_data *data = context; 144 struct i2c_client *client = data->client; 145 int regval; 146 147 switch (reg) { 148 case 0: /* local temp msb */ 149 case 1: /* remote temp msb */ 150 case 5: /* local temp high limit msb */ 151 case 6: /* local temp low limit msb */ 152 case 7: /* remote temp ligh limit msb */ 153 case 8: /* remote temp low limit msb */ 154 case 0x15: /* remote temp 2 high limit msb */ 155 case 0x16: /* remote temp 2 low limit msb */ 156 case 0x23: /* remote temp 2 msb */ 157 case 0x30: /* local temp minimum, tmp411 */ 158 case 0x32: /* local temp maximum, tmp411 */ 159 case 0x34: /* remote temp minimum, tmp411 */ 160 case 0xf6: /* remote temp maximum, tmp411 (really 0x36) */ 161 /* work around register overlap between TMP411 and TMP432 */ 162 if (reg == 0xf6) 163 reg = 0x36; 164 regval = i2c_smbus_read_word_swapped(client, reg); 165 if (regval < 0) 166 return regval; 167 *val = regval; 168 break; 169 case 0x19: /* critical limits, 8-bit registers */ 170 case 0x1a: 171 case 0x20: 172 regval = i2c_smbus_read_byte_data(client, reg); 173 if (regval < 0) 174 return regval; 175 *val = regval << 8; 176 break; 177 case 0x1b: 178 case 0x35 ... 0x37: 179 if (data->kind == tmp432) { 180 regval = i2c_smbus_read_byte_data(client, reg); 181 if (regval < 0) 182 return regval; 183 *val = regval; 184 break; 185 } 186 /* simulate TMP432 status registers */ 187 regval = i2c_smbus_read_byte_data(client, TMP401_STATUS); 188 if (regval < 0) 189 return regval; 190 *val = 0; 191 switch (reg) { 192 case 0x1b: /* open / fault */ 193 if (regval & TMP401_STATUS_REMOTE_OPEN) 194 *val |= BIT(1); 195 break; 196 case 0x35: /* high limit */ 197 if (regval & TMP401_STATUS_LOCAL_HIGH) 198 *val |= BIT(0); 199 if (regval & TMP401_STATUS_REMOTE_HIGH) 200 *val |= BIT(1); 201 break; 202 case 0x36: /* low limit */ 203 if (regval & TMP401_STATUS_LOCAL_LOW) 204 *val |= BIT(0); 205 if (regval & TMP401_STATUS_REMOTE_LOW) 206 *val |= BIT(1); 207 break; 208 case 0x37: /* therm / crit limit */ 209 if (regval & TMP401_STATUS_LOCAL_CRIT) 210 *val |= BIT(0); 211 if (regval & TMP401_STATUS_REMOTE_CRIT) 212 *val |= BIT(1); 213 break; 214 } 215 break; 216 default: 217 regval = i2c_smbus_read_byte_data(client, reg); 218 if (regval < 0) 219 return regval; 220 *val = regval; 221 break; 222 } 223 return 0; 224 } 225 226 static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val) 227 { 228 struct tmp401_data *data = context; 229 struct i2c_client *client = data->client; 230 231 switch (reg) { 232 case 0x05: /* local temp high limit msb */ 233 case 0x06: /* local temp low limit msb */ 234 case 0x07: /* remote temp ligh limit msb */ 235 case 0x08: /* remote temp low limit msb */ 236 reg += 6; /* adjust for register write address */ 237 fallthrough; 238 case 0x15: /* remote temp 2 high limit msb */ 239 case 0x16: /* remote temp 2 low limit msb */ 240 return i2c_smbus_write_word_swapped(client, reg, val); 241 case 0x19: /* critical limits, 8-bit registers */ 242 case 0x1a: 243 case 0x20: 244 return i2c_smbus_write_byte_data(client, reg, val >> 8); 245 case TMP401_CONVERSION_RATE: 246 case TMP401_CONFIG: 247 reg += 6; /* adjust for register write address */ 248 fallthrough; 249 default: 250 return i2c_smbus_write_byte_data(client, reg, val); 251 } 252 } 253 254 static const struct regmap_config tmp401_regmap_config = { 255 .reg_bits = 8, 256 .val_bits = 16, 257 .cache_type = REGCACHE_MAPLE, 258 .volatile_reg = tmp401_regmap_is_volatile, 259 .reg_read = tmp401_reg_read, 260 .reg_write = tmp401_reg_write, 261 }; 262 263 /* temperature conversion */ 264 265 static int tmp401_register_to_temp(u16 reg, bool extended) 266 { 267 int temp = reg; 268 269 if (extended) 270 temp -= 64 * 256; 271 272 return DIV_ROUND_CLOSEST(temp * 125, 32); 273 } 274 275 static u16 tmp401_temp_to_register(long temp, bool extended, int zbits) 276 { 277 if (extended) { 278 temp = clamp_val(temp, -64000, 191000); 279 temp += 64000; 280 } else { 281 temp = clamp_val(temp, 0, 127000); 282 } 283 284 return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits; 285 } 286 287 /* hwmon API functions */ 288 289 static const u8 tmp401_temp_reg_index[] = { 290 [hwmon_temp_input] = 0, 291 [hwmon_temp_min] = 1, 292 [hwmon_temp_max] = 2, 293 [hwmon_temp_crit] = 3, 294 [hwmon_temp_lowest] = 4, 295 [hwmon_temp_highest] = 5, 296 }; 297 298 static const u8 tmp401_status_reg_index[] = { 299 [hwmon_temp_fault] = 0, 300 [hwmon_temp_min_alarm] = 1, 301 [hwmon_temp_max_alarm] = 2, 302 [hwmon_temp_crit_alarm] = 3, 303 }; 304 305 static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val) 306 { 307 struct tmp401_data *data = dev_get_drvdata(dev); 308 struct regmap *regmap = data->regmap; 309 unsigned int regs[2] = { TMP401_TEMP_MSB[3][channel], TMP401_TEMP_CRIT_HYST }; 310 unsigned int regval; 311 u16 regvals[2]; 312 int reg, ret; 313 314 switch (attr) { 315 case hwmon_temp_input: 316 case hwmon_temp_min: 317 case hwmon_temp_max: 318 case hwmon_temp_crit: 319 case hwmon_temp_lowest: 320 case hwmon_temp_highest: 321 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel]; 322 ret = regmap_read(regmap, reg, ®val); 323 if (ret < 0) 324 return ret; 325 *val = tmp401_register_to_temp(regval, data->extended_range); 326 break; 327 case hwmon_temp_crit_hyst: 328 ret = regmap_multi_reg_read(regmap, regs, regvals, 2); 329 if (ret < 0) 330 return ret; 331 *val = tmp401_register_to_temp(regvals[0], data->extended_range) - 332 (regvals[1] * 1000); 333 break; 334 case hwmon_temp_fault: 335 case hwmon_temp_min_alarm: 336 case hwmon_temp_max_alarm: 337 case hwmon_temp_crit_alarm: 338 reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]]; 339 ret = regmap_read(regmap, reg, ®val); 340 if (ret < 0) 341 return ret; 342 *val = !!(regval & BIT(channel)); 343 break; 344 default: 345 return -EOPNOTSUPP; 346 } 347 return 0; 348 } 349 350 static int tmp401_temp_write(struct device *dev, u32 attr, int channel, 351 long val) 352 { 353 struct tmp401_data *data = dev_get_drvdata(dev); 354 struct regmap *regmap = data->regmap; 355 unsigned int regval; 356 int reg, ret, temp; 357 358 switch (attr) { 359 case hwmon_temp_min: 360 case hwmon_temp_max: 361 case hwmon_temp_crit: 362 reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel]; 363 regval = tmp401_temp_to_register(val, data->extended_range, 364 attr == hwmon_temp_crit ? 8 : 4); 365 ret = regmap_write(regmap, reg, regval); 366 break; 367 case hwmon_temp_crit_hyst: 368 if (data->extended_range) 369 val = clamp_val(val, -64000, 191000); 370 else 371 val = clamp_val(val, 0, 127000); 372 373 reg = TMP401_TEMP_MSB[3][channel]; 374 ret = regmap_read(regmap, reg, ®val); 375 if (ret < 0) 376 break; 377 temp = tmp401_register_to_temp(regval, data->extended_range); 378 val = clamp_val(val, temp - 255000, temp); 379 regval = ((temp - val) + 500) / 1000; 380 ret = regmap_write(regmap, TMP401_TEMP_CRIT_HYST, regval); 381 break; 382 default: 383 ret = -EOPNOTSUPP; 384 break; 385 } 386 return ret; 387 } 388 389 static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val) 390 { 391 struct tmp401_data *data = dev_get_drvdata(dev); 392 u32 regval; 393 int ret; 394 395 switch (attr) { 396 case hwmon_chip_update_interval: 397 ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, ®val); 398 if (ret < 0) 399 return ret; 400 *val = (1 << (7 - regval)) * 125; 401 break; 402 case hwmon_chip_temp_reset_history: 403 *val = 0; 404 break; 405 default: 406 return -EOPNOTSUPP; 407 } 408 409 return 0; 410 } 411 412 static int tmp401_set_convrate(struct regmap *regmap, long val) 413 { 414 int rate; 415 416 /* 417 * For valid rates, interval can be calculated as 418 * interval = (1 << (7 - rate)) * 125; 419 * Rounded rate is therefore 420 * rate = 7 - __fls(interval * 4 / (125 * 3)); 421 * Use clamp_val() to avoid overflows, and to ensure valid input 422 * for __fls. 423 */ 424 val = clamp_val(val, 125, 16000); 425 rate = 7 - __fls(val * 4 / (125 * 3)); 426 return regmap_write(regmap, TMP401_CONVERSION_RATE, rate); 427 } 428 429 static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val) 430 { 431 struct tmp401_data *data = dev_get_drvdata(dev); 432 struct regmap *regmap = data->regmap; 433 int err; 434 435 switch (attr) { 436 case hwmon_chip_update_interval: 437 err = tmp401_set_convrate(regmap, val); 438 break; 439 case hwmon_chip_temp_reset_history: 440 if (val != 1) { 441 err = -EINVAL; 442 break; 443 } 444 /* 445 * Reset history by writing any value to any of the 446 * minimum/maximum registers (0x30-0x37). 447 */ 448 err = regmap_write(regmap, 0x30, 0); 449 break; 450 default: 451 err = -EOPNOTSUPP; 452 break; 453 } 454 return err; 455 } 456 457 static int tmp401_read(struct device *dev, enum hwmon_sensor_types type, 458 u32 attr, int channel, long *val) 459 { 460 switch (type) { 461 case hwmon_chip: 462 return tmp401_chip_read(dev, attr, channel, val); 463 case hwmon_temp: 464 return tmp401_temp_read(dev, attr, channel, val); 465 default: 466 return -EOPNOTSUPP; 467 } 468 } 469 470 static int tmp401_write(struct device *dev, enum hwmon_sensor_types type, 471 u32 attr, int channel, long val) 472 { 473 switch (type) { 474 case hwmon_chip: 475 return tmp401_chip_write(dev, attr, channel, val); 476 case hwmon_temp: 477 return tmp401_temp_write(dev, attr, channel, val); 478 default: 479 return -EOPNOTSUPP; 480 } 481 } 482 483 static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type, 484 u32 attr, int channel) 485 { 486 switch (type) { 487 case hwmon_chip: 488 switch (attr) { 489 case hwmon_chip_update_interval: 490 case hwmon_chip_temp_reset_history: 491 return 0644; 492 default: 493 break; 494 } 495 break; 496 case hwmon_temp: 497 switch (attr) { 498 case hwmon_temp_input: 499 case hwmon_temp_min_alarm: 500 case hwmon_temp_max_alarm: 501 case hwmon_temp_crit_alarm: 502 case hwmon_temp_fault: 503 case hwmon_temp_lowest: 504 case hwmon_temp_highest: 505 return 0444; 506 case hwmon_temp_min: 507 case hwmon_temp_max: 508 case hwmon_temp_crit: 509 case hwmon_temp_crit_hyst: 510 return 0644; 511 default: 512 break; 513 } 514 break; 515 default: 516 break; 517 } 518 return 0; 519 } 520 521 static const struct hwmon_ops tmp401_ops = { 522 .is_visible = tmp401_is_visible, 523 .read = tmp401_read, 524 .write = tmp401_write, 525 }; 526 527 /* chip initialization, detect, probe */ 528 529 static int tmp401_init_client(struct tmp401_data *data) 530 { 531 struct regmap *regmap = data->regmap; 532 u32 config, config_orig; 533 int ret; 534 u32 val = 0; 535 s32 nfactor = 0; 536 537 /* Set conversion rate to 2 Hz */ 538 ret = regmap_write(regmap, TMP401_CONVERSION_RATE, 5); 539 if (ret < 0) 540 return ret; 541 542 /* Start conversions (disable shutdown if necessary) */ 543 ret = regmap_read(regmap, TMP401_CONFIG, &config); 544 if (ret < 0) 545 return ret; 546 547 config_orig = config; 548 config &= ~TMP401_CONFIG_SHUTDOWN; 549 550 if (of_property_read_bool(data->client->dev.of_node, "ti,extended-range-enable")) { 551 /* Enable measurement over extended temperature range */ 552 config |= TMP401_CONFIG_RANGE; 553 } 554 555 data->extended_range = !!(config & TMP401_CONFIG_RANGE); 556 557 if (config != config_orig) { 558 ret = regmap_write(regmap, TMP401_CONFIG, config); 559 if (ret < 0) 560 return ret; 561 } 562 563 ret = of_property_read_u32(data->client->dev.of_node, "ti,n-factor", &nfactor); 564 if (!ret) { 565 if (data->kind == tmp401) { 566 dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n"); 567 return -EINVAL; 568 } 569 if (nfactor < -128 || nfactor > 127) { 570 dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor); 571 return -EINVAL; 572 } 573 ret = regmap_write(regmap, TMP4XX_N_FACTOR_REG, (unsigned int)nfactor); 574 if (ret < 0) 575 return ret; 576 } 577 578 ret = of_property_read_u32(data->client->dev.of_node, "ti,beta-compensation", &val); 579 if (!ret) { 580 if (data->kind == tmp401 || data->kind == tmp411) { 581 dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n"); 582 return -EINVAL; 583 } 584 if (val > 15) { 585 dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val); 586 return -EINVAL; 587 } 588 ret = regmap_write(regmap, TMP43X_BETA_RANGE, val); 589 if (ret < 0) 590 return ret; 591 } 592 593 return 0; 594 } 595 596 static int tmp401_detect(struct i2c_client *client, 597 struct i2c_board_info *info) 598 { 599 enum chips kind; 600 struct i2c_adapter *adapter = client->adapter; 601 u8 reg; 602 603 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 604 return -ENODEV; 605 606 /* Detect and identify the chip */ 607 reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG); 608 if (reg != TMP401_MANUFACTURER_ID) 609 return -ENODEV; 610 611 reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG); 612 613 switch (reg) { 614 case TMP401_DEVICE_ID: 615 if (client->addr != 0x4c) 616 return -ENODEV; 617 kind = tmp401; 618 break; 619 case TMP411A_DEVICE_ID: 620 if (client->addr != 0x4c) 621 return -ENODEV; 622 kind = tmp411; 623 break; 624 case TMP411B_DEVICE_ID: 625 if (client->addr != 0x4d) 626 return -ENODEV; 627 kind = tmp411; 628 break; 629 case TMP411C_DEVICE_ID: 630 if (client->addr != 0x4e) 631 return -ENODEV; 632 kind = tmp411; 633 break; 634 case TMP431_DEVICE_ID: 635 if (client->addr != 0x4c && client->addr != 0x4d) 636 return -ENODEV; 637 kind = tmp431; 638 break; 639 case TMP432_DEVICE_ID: 640 if (client->addr != 0x4c && client->addr != 0x4d) 641 return -ENODEV; 642 kind = tmp432; 643 break; 644 case TMP435_DEVICE_ID: 645 kind = tmp435; 646 break; 647 default: 648 return -ENODEV; 649 } 650 651 reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG); 652 if (reg & 0x1b) 653 return -ENODEV; 654 655 reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE); 656 /* Datasheet says: 0x1-0x6 */ 657 if (reg > 15) 658 return -ENODEV; 659 660 strscpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE); 661 662 return 0; 663 } 664 665 static int tmp401_probe(struct i2c_client *client) 666 { 667 static const char * const names[] = { 668 "TMP401", "TMP411", "TMP431", "TMP432", "TMP435" 669 }; 670 struct device *dev = &client->dev; 671 struct hwmon_channel_info *info; 672 struct device *hwmon_dev; 673 struct tmp401_data *data; 674 int status; 675 676 data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL); 677 if (!data) 678 return -ENOMEM; 679 680 data->client = client; 681 data->kind = (uintptr_t)i2c_get_match_data(client); 682 683 data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config); 684 if (IS_ERR(data->regmap)) 685 return PTR_ERR(data->regmap); 686 687 /* initialize configuration data */ 688 data->chip.ops = &tmp401_ops; 689 data->chip.info = data->info; 690 691 data->info[0] = &data->chip_info; 692 data->info[1] = &data->temp_info; 693 694 info = &data->chip_info; 695 info->type = hwmon_chip; 696 info->config = data->chip_channel_config; 697 698 data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL; 699 700 info = &data->temp_info; 701 info->type = hwmon_temp; 702 info->config = data->temp_channel_config; 703 704 data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | 705 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM | 706 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM; 707 data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | 708 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM | 709 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT; 710 711 if (data->kind == tmp411) { 712 data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST; 713 data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST; 714 data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY; 715 } 716 717 if (data->kind == tmp432) { 718 data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | 719 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM | 720 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT; 721 } 722 723 /* Initialize the TMP401 chip */ 724 status = tmp401_init_client(data); 725 if (status < 0) 726 return status; 727 728 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data, 729 &data->chip, NULL); 730 if (IS_ERR(hwmon_dev)) 731 return PTR_ERR(hwmon_dev); 732 733 dev_info(dev, "Detected TI %s chip\n", names[data->kind]); 734 735 return 0; 736 } 737 738 static const struct of_device_id __maybe_unused tmp4xx_of_match[] = { 739 { .compatible = "ti,tmp401", }, 740 { .compatible = "ti,tmp411", }, 741 { .compatible = "ti,tmp431", }, 742 { .compatible = "ti,tmp432", }, 743 { .compatible = "ti,tmp435", }, 744 { }, 745 }; 746 MODULE_DEVICE_TABLE(of, tmp4xx_of_match); 747 748 static struct i2c_driver tmp401_driver = { 749 .class = I2C_CLASS_HWMON, 750 .driver = { 751 .name = "tmp401", 752 .of_match_table = of_match_ptr(tmp4xx_of_match), 753 }, 754 .probe = tmp401_probe, 755 .id_table = tmp401_id, 756 .detect = tmp401_detect, 757 .address_list = normal_i2c, 758 }; 759 760 module_i2c_driver(tmp401_driver); 761 762 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 763 MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver"); 764 MODULE_LICENSE("GPL"); 765