/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 1453 static unsigned getSrcIdx(const MachineInstr* MI, unsigned SrcIdx) { in getSrcIdx() 1614 unsigned SrcIdx = getSrcIdx(MI, 1); in printZeroUpperMove() local 1640 unsigned SrcIdx = getSrcIdx(MI, 1); in printBroadcast() local 1658 unsigned SrcIdx = getSrcIdx(MI, 1); in printExtend() local 1804 unsigned SrcIdx = getSrcIdx(MI, 1); in addConstantComments() local 1826 unsigned SrcIdx = getSrcIdx(MI, 1); in addConstantComments() local 1847 unsigned SrcIdx = getSrcIdx(MI, 1); in addConstantComments() local 1930 unsigned SrcIdx = getSrcIdx(MI, 1); in addConstantComments() local 1951 unsigned SrcIdx = getSrcIdx(MI, 1); in addConstantComments() local
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H A D | X86InstrInfo.cpp | 2433 unsigned SrcIdx = (Imm >> 6) & 3; in commuteInstructionImpl() local 7230 unsigned SrcIdx = (Imm >> 6) & 3; in foldMemoryOperandCustom() local
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H A D | X86ISelLowering.cpp | 5679 unsigned SrcIdx = M / Size; in getTargetShuffleAndZeroables() local 6058 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); in getFauxShuffleMask() local 6463 uint64_t SrcIdx = Op.getConstantOperandVal(1); in getShuffleScalarElt() local 11917 int SrcIdx = i + Offset; in lowerShuffleAsSpecificZeroOrAnyExtend() local 41288 unsigned SrcIdx = (InsertPSMask >> 6) & 0x3; in combineTargetShuffle() local 42491 unsigned SrcIdx = (LoMask & 0x2) >> 1; in SimplifyDemandedVectorEltsForTargetNode() local 48496 unsigned SrcIdx = Lane * NumSrcEltsPerLane + Elt % NumSrcEltsPerLane; in combineVectorPack() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegisterCoalescer.h | 42 unsigned SrcIdx = 0; variable
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H A D | TwoAddressInstructionPass.cpp | 1314 unsigned SrcIdx, unsigned DstIdx, unsigned &Dist, bool shouldOnlyCommute) { in tryInstructionTransform() 1519 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { in collectTiedOperands() local 1567 unsigned SrcIdx = TP.first; in processTiedPairs() local 1752 unsigned SrcIdx = TO.second[0].first; in processStatepoint() local 1886 unsigned SrcIdx = TiedPairs[0].first; in run() local
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H A D | TargetRegisterInfo.cpp | 389 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
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H A D | RegisterCoalescer.cpp | 1292 unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx(); in reMaterializeTrivialDef() local 1983 unsigned SrcIdx = CP.getSrcIdx(); in joinCopy() local 3656 unsigned SrcIdx = CP.getSrcIdx(); in joinVirtRegs() local
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H A D | PeepholeOptimizer.cpp | 1919 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelperVectorOps.cpp | 331 int SrcIdx = Mask[Offset]; in matchExtractVectorElementWithShuffleVector() local
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H A D | Utils.cpp | 1005 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { in ConstantFoldCountZeros() local 1487 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { in isConstantOrConstantVector() local
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H A D | CombinerHelper.cpp | 2170 unsigned SrcIdx = MI.getNumOperands() - 1; in matchCombineUnmergeConstant() local 2210 unsigned SrcIdx = MI.getNumOperands() - 1; in matchCombineUnmergeUndef() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600InstrInfo.cpp | 292 int SrcIdx = getOperandIdx(MI.getOpcode(), Op[0]); in getSrcs() local 1372 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr &MI, unsigned SrcIdx, in getFlagOp()
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H A D | AMDGPUInstCombineIntrinsic.cpp | 1369 for (unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) { in simplifyAMDGCNMemoryIntrinsicDemanded() local
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H A D | SIFoldOperands.cpp | 251 unsigned SrcIdx = ~0; in tryFoldImmWithOpSel() local
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H A D | R600ISelLowering.cpp | 1943 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandPseudoInsts.cpp | 500 unsigned PredIdx, DOPIdx, SrcIdx, Src2Idx; in expand_DestructiveOp() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | InferAddressSpaces.cpp | 1268 int SrcIdx = U.getOperandNo(); in rewriteWithNewAddressSpaces() local
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | LegalizationArtifactCombiner.h | 689 for (unsigned SrcIdx = StartSrcIdx; SrcIdx < StartSrcIdx + NumSrcsUsed; in findValueFromBuildVector() local
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGNonTrivialStruct.cpp | 33 enum { DstIdx = 0, SrcIdx = 1 }; enumerator
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H A D | CGBuiltin.cpp | 21593 Value *SrcIdx = EmitScalarExpr(E->getArg(3)); in EmitWebAssemblyBuiltinExpr() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 549 int SrcIdx = in visitExtractElementInst() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 4350 auto SrcIdx = getNamedOperandIdx(Opcode, SrcName); in validateLdsDirect() local 7021 int SrcIdx = 0; in cvtExp() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
H A D | InstrRefBasedImpl.cpp | 2127 LocIdx SrcIdx = MTracker->getSpillMLoc(SpillID); in transferSpillOrRestoreInst() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 863 __anona938eeb30302(SDValue &SrcVec, SmallVectorImpl<int> &SrcIdx) buildHvxVectorReg() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5031 int SrcIdx = Mask[DstIdx]; lowerShuffleViaVRegSplitting() local
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