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Searched defs:ShiftOpc (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h27 enum ShiftOpc { enum
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp806 bool ARMInstructionSelector::selectShift(unsigned ShiftOpc, in selectShift()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp798 unsigned ShiftOpc = Left ? S2_asl_i_r in splitShift() local
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp1123 auto ShiftOpc = ShrAmtC > ShAmtC ? Shr->getOpcode() : Instruction::Shl; in visitShl() local
H A DInstCombineCompares.cpp7549 unsigned ShiftOpc = ShiftI->getOpcode(); in visitICmpInst() local
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1010 unsigned ShiftOpc = Op.getOpcode(); in combineShiftToAVG() local
9310 unsigned ShiftOpc = IsSigned ? ISD::SRA : ISD::SRL; in expandAVG() local
H A DDAGCombiner.cpp12729 unsigned ShiftOpc = ShiftOrRotate.getOpcode(); in visitSETCC() local
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp3649 unsigned ShiftOpc = (VT == MVT::i32) ? AArch64::UBFMWri : AArch64::UBFMXri; in tryBitfieldInsertOpFromOr() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h894 EVT VT, unsigned ShiftOpc, bool MayTransformRotate, in preferedOpcodeForCmpEqPiecesOfOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp3365 EVT VT, unsigned ShiftOpc, bool MayTransformRotate, in preferedOpcodeForCmpEqPiecesOfOperand()
25209 unsigned ShiftOpc; in getTargetVShiftByConstNode() local
30033 unsigned ShiftOpc = IsFSHR ? ISD::SRL : ISD::SHL; in LowerFunnelShift() local
30291 unsigned ShiftOpc = IsROTL ? ISD::SHL : ISD::SRL; in LowerRotate() local