/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | DemandedBits.cpp | 130 uint64_t ShiftAmt = SA->urem(BitWidth); in determineLiveOperandBits() local 178 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local 195 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local 209 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
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H A D | ConstantFolding.cpp | 218 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); in FoldBitCast() local 272 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); in FoldBitCast() local
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | APInt.h | 807 APInt ashr(unsigned ShiftAmt) const { in ashr() 814 void ashrInPlace(unsigned ShiftAmt) { in ashrInPlace() 838 void lshrInPlace(unsigned ShiftAmt) { in lshrInPlace() 888 APInt ashr(const APInt &ShiftAmt) const { in ashr() 900 APInt lshr(const APInt &ShiftAmt) const { in lshr() 912 APInt shl(const APInt &ShiftAmt) const { in shl()
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/freebsd/contrib/llvm-project/llvm/lib/Support/ |
H A D | KnownBits.cpp | 288 auto ShiftByConst = [&](const KnownBits &LHS, unsigned ShiftAmt) { in shl() 353 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in shl() local 373 auto ShiftByConst = [&](const KnownBits &LHS, unsigned ShiftAmt) { in lshr() 411 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in lshr() local 431 auto ShiftByConst = [&](const KnownBits &LHS, unsigned ShiftAmt) { in ashr() 471 for (unsigned ShiftAmt = MinShiftAmount; ShiftAmt <= MaxShiftAmount; in ashr() local
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H A D | APInt.cpp | 1026 void APInt::ashrSlowCase(unsigned ShiftAmt) { in ashrSlowCase() 1075 void APInt::lshrSlowCase(unsigned ShiftAmt) { in lshrSlowCase() 1087 void APInt::shlSlowCase(unsigned ShiftAmt) { in shlSlowCase() 2236 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | VNCoercion.cpp | 140 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy).getFixedValue() - in coerceAvailableValueToLoadType() local 320 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 658 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth - 1); in SimplifyDemandedUseBits() local 721 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local 805 uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local 1033 uint64_t ShiftAmt = SA->urem(BitWidth); in SimplifyDemandedUseBits() local
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H A D | InstCombineCasts.cpp | 1080 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local 1338 unsigned ShiftAmt = KnownZeroMask.countr_zero(); in transformSExtICmp() local 1352 unsigned ShiftAmt = KnownZeroMask.countl_zero(); in transformSExtICmp() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionOptimizer.cpp | 175 unsigned ShiftAmt = AArch64_AM::getShiftValue(I.getOperand(3).getImm()); in findSuitableCompare() local
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H A D | AArch64ExpandImm.cpp | 69 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
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H A D | AArch64ISelDAGToDAG.cpp | 603 unsigned ShiftAmt; in SelectArithImmed() local 2856 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local 2864 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local 3761 SDValue ShiftAmt = N->getOperand(1); in tryShiftAmountMod() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVMatInt.cpp | 469 unsigned &ShiftAmt, unsigned &AddOpc) { in generateTwoRegInstSeq()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 280 auto ShiftAmt = in buildLCMMergePieces() local 1879 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in widenScalarMergeValues() local 2009 auto ShiftAmt = MIRBuilder.buildConstant(SrcTy, DstSize * I); in widenScalarUnmergeValues() local 2537 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits); in widenScalar() local 3585 auto ShiftAmt = MIRBuilder.buildConstant(AnyExtTy, LargeSplitSize); in lowerLoad() local 3685 auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, LargeSplitSize); in lowerStore() local 3842 auto ShiftAmt = MIRBuilder.buildConstant(Ty, Ty.getSizeInBits() - 1); in lower() local 5363 auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1); in narrowScalarShift() local 7322 auto ShiftAmt = MIRBuilder.buildConstant(Src0Ty, Src0Size - Src1Size); in lowerFCopySign() local 7327 auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size); in lowerFCopySign() local [all …]
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H A D | LoadStoreOpt.cpp | 664 int64_t ShiftAmt; in getTruncStoreByteOffset() local
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H A D | CombinerHelper.cpp | 2064 int64_t ShiftAmt = MaybeShiftAmtVal->getSExtValue(); in matchCombineShlOfExtend() local 2079 auto ShiftAmt = Builder.buildConstant(ExtSrcTy, ShiftAmtVal); in applyCombineShlOfExtend() local 2183 unsigned ShiftAmt = Dst0Ty.getSizeInBits(); in matchCombineUnmergeConstant() local 2400 unsigned ShiftAmt; in tryCombineShiftToUnmerge() local 2705 Register ShiftAmt = ShiftMI->getOperand(2).getReg(); in applyCombineTruncOfShift() local 3248 int64_t ShiftAmt; in applyAshShlToSextInreg() local 5591 auto ShiftAmt = in applyUMulHToLShr() local 6336 std::optional<ValueAndVReg> ShiftAmt; in matchTruncLshrBuildVectorFold() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 2121 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask() local 2194 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale() local 2292 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToBEXTR() local 2367 uint64_t ShiftAmt = N.getConstantOperandVal(1); in matchIndexRecursively() local 3881 unsigned Bitwidth) { in matchBitExtract() 4052 SDValue ShiftAmt = X.getOperand(1); in matchBitExtract() local 4292 SDValue ShiftAmt = OrigShiftAmt; in tryShiftAmountMod() local 6037 unsigned ShiftAmt; in Select() local
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H A D | X86InstCombineIntrinsic.cpp | 288 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth)); in simplifyX86immShift() local 2223 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic() local 2266 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUPostLegalizerCombiner.cpp | 325 int64_t ShiftAmt; in matchCvtF32UByteN() local
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H A D | R600ISelLowering.cpp | 1063 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateTruncStore() local 1293 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in lowerPrivateExtLoad() local
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H A D | AMDGPUISelDAGToDAG.cpp | 70 if (ConstantSDNode *ShiftAmt = dyn_cast<ConstantSDNode>(Srl.getOperand(1))) { in isExtractHiElt() local 3422 ConstantSDNode *ShiftAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); in SelectSWMMACIndex8() local 3441 ConstantSDNode *ShiftAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); in SelectSWMMACIndex16() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVLegalizerInfo.cpp | 580 unsigned ShiftAmt, AddOpc; in shouldBeInConstantPool() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelLowering.cpp | 1905 ISD::NodeType Opc, int64_t ShiftAmt) { in insertMultibyteShift() 2177 int64_t ShiftAmt = MI.getOperand(4).getImm(); in insertWideShift() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 185 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 221 unsigned ShiftAmt, AddOpc; in selectImm() local 2528 uint64_t ShiftAmt = 0; in SelectAddrRegRegScale() local 2889 auto UnwrapShlSra = [](SDValue N, unsigned ShiftAmt) { in selectSExtBits()
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/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 1575 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize * (Ratio - 1); in executeBitCastInst() local 1591 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize * (Ratio - 1); in executeBitCastInst() local
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