| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | DivisionByConstantInfo.h | 24 unsigned ShiftAmount; ///< shift amount member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRShiftExpand.cpp | 94 Value *ShiftAmount = Builder.CreateTrunc(BI->getOperand(1), Int8Ty); in expand() local
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| H A D | AVRISelLowering.cpp | 285 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
353 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/ |
| H A D | SPIRVBaseInfo.h | 261 for (unsigned ShiftAmount = 0; ShiftAmount < 32; ShiftAmount += 8) { in getSPIRVStringOperand() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInsertSingleUseVDST.cpp | 79 unsigned ShiftAmount = 4; in encodeImm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 350 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVSPILL() local
427 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVRELOAD() local
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| H A D | RISCVInstrInfo.cpp | 3657 uint32_t ShiftAmount = Log2_32(Amount); mulImm() local
3670 uint32_t ShiftAmount; mulImm() local
3694 uint32_t ShiftAmount = Log2_32(Amount - 1); mulImm() local
3705 uint32_t ShiftAmount = Log2_32(Amount + 1); mulImm() local
3724 for (uint32_t ShiftAmount = 0; Amount >> ShiftAmount; ShiftAmount++) { mulImm() local
[all...] |
| H A D | RISCVFrameLowering.cpp | 732 unsigned ShiftAmount = Log2(MaxAlignment); in emitPrologue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 109 int ShiftAmount = 0; in generateInstSeqImpl() local
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| /freebsd/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | IntegralAP.h | 262 unsigned ShiftAmount = B.V.getZExtValue(); in shiftRight() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYFrameLowering.cpp | 177 unsigned ShiftAmount = Log2(MaxAlignment); in emitPrologue() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 437 unsigned ShiftAmount; member
2266 unsigned ShiftAmount = 0, in CreateReg()
2285 unsigned ShiftAmount = 0, in CreateVectorReg()
2371 unsigned ShiftAmount, in CreateShiftedImm()
3403 int64_t ShiftAmount = getTok().getIntVal(); in tryParseImmWithOptionalShift() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 283 unsigned ShiftAmount = 0) const { in selectAddrFrameIndexOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 7210 static bool shiftAmountKnownInRange(const Value *ShiftAmount) { in shiftAmountKnownInRange()
9375 unsigned ShiftAmount = Width - 1; in setLimitsForBinOp() local
9396 unsigned ShiftAmount = Width - 1; in setLimitsForBinOp() local
9413 unsigned ShiftAmount = C->countl_one() - 1; in setLimitsForBinOp() local
9418 unsigned ShiftAmount = C->countl_zero() - 1; in setLimitsForBinOp() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2322 unsigned ShiftAmount = NLZ > NTZ ? NLZ - NTZ : NTZ - NLZ; in SimplifyDemandedBits() local
7625 unsigned ShiftAmount = OuterBitSize - InnerBitSize; in expandMUL_LOHI() local
9664 SDValue ShiftAmount = DAG.getShiftAmountConstant( in scalarizeVectorLoad() local
9748 SDValue ShiftAmount = in scalarizeVectorStore() local
9925 SDValue ShiftAmount = DAG.getShiftAmountConstant(NumBits, VT, dl); in expandUnalignedLoad() local
10037 SDValue ShiftAmount = in expandUnalignedStore() local
11297 int ShiftAmount = BitSize - ResultVT.getScalarSizeInBits(); in expandRoundInexactToOdd() local
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| H A D | LegalizeVectorOps.cpp | 1270 SDValue ShiftAmount = DAG.getConstant(EltWidth - SrcEltWidth, DL, VT); in ExpandSIGN_EXTEND_VECTOR_INREG() local
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| H A D | LegalizeIntegerTypes.cpp | 1098 SDValue ShiftAmount = in PromoteIntRes_ADDSUBSHLSAT() local
4340 SDValue ShiftAmount = DAG.getShiftAmountConstant(Scale % NVTSize, NVT, dl); in ExpandIntRes_MULFIX() local
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| H A D | LegalizeDAG.cpp | 1665 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 969 uint64_t ShiftAmount = N->getConstantOperandVal(1); in LowerShifts() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 274 int16_t ShiftAmount, SMLoc IDLoc, in emitDSLL()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 1742 static bool shiftAmountKnownInRange(Register ShiftAmount, in shiftAmountKnownInRange()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 2008 uint64_t ShiftAmount = V.getConstantOperandVal(1); in factorOutPowerOf2() local
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 419 unsigned ShiftAmount = ShiftVal ? ShiftVal->getZExtValue() : 0; in foldVecTruncToExtElt() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 5362 const MCExpr *ShiftAmount; in parsePKHImm() local
5426 const MCExpr *ShiftAmount; in parseShifterImm() local
5476 const MCExpr *ShiftAmount; in parseRotImm() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2878 unsigned ShiftAmount = BitWidth - 16; in loadImmediate() local
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