1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 *
6 ******************************************************************************/
7
8 #include <linux/kernel.h>
9 #include <drv_types.h>
10 #include "hal_com_h2c.h"
11
12 #include "odm_precomp.h"
13
rtw_hal_data_init(struct adapter * padapter)14 u8 rtw_hal_data_init(struct adapter *padapter)
15 {
16 padapter->hal_data_sz = sizeof(struct hal_com_data);
17 padapter->HalData = vzalloc(padapter->hal_data_sz);
18 if (!padapter->HalData)
19 return _FAIL;
20
21 return _SUCCESS;
22 }
23
rtw_hal_data_deinit(struct adapter * padapter)24 void rtw_hal_data_deinit(struct adapter *padapter)
25 {
26 if (padapter->HalData) {
27 vfree(padapter->HalData);
28 padapter->HalData = NULL;
29 padapter->hal_data_sz = 0;
30 }
31 }
32
33
dump_chip_info(struct hal_version ChipVersion)34 void dump_chip_info(struct hal_version ChipVersion)
35 {
36 char buf[128];
37 size_t cnt = 0;
38
39 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
40 IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
41
42 if (IS_CHIP_VENDOR_TSMC(ChipVersion))
43 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
44 else if (IS_CHIP_VENDOR_UMC(ChipVersion))
45 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
46 else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
47 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
48
49 if (IS_A_CUT(ChipVersion))
50 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
51 else if (IS_B_CUT(ChipVersion))
52 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
53 else if (IS_C_CUT(ChipVersion))
54 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
55 else if (IS_D_CUT(ChipVersion))
56 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
57 else if (IS_E_CUT(ChipVersion))
58 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
59 else if (IS_I_CUT(ChipVersion))
60 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
61 else if (IS_J_CUT(ChipVersion))
62 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
63 else if (IS_K_CUT(ChipVersion))
64 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
65 else
66 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
67 "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
68
69 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
70
71 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
72 }
73
74
75 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
76
77 /*
78 * Description:
79 *Use hardware(efuse), driver parameter(registry) and default channel plan
80 *to decide which one should be used.
81 *
82 * Parameters:
83 *padapter pointer of adapter
84 *hw_channel_plan channel plan from HW (efuse/eeprom)
85 * BIT[7] software configure mode; 0:Enable, 1:disable
86 * BIT[6:0] Channel Plan
87 *sw_channel_plan channel plan from SW (registry/module param)
88 *def_channel_plan channel plan used when HW/SW both invalid
89 *AutoLoadFail efuse autoload fail or not
90 *
91 * Return:
92 *Final channel plan decision
93 *
94 */
hal_com_config_channel_plan(struct adapter * padapter,u8 hw_channel_plan,u8 sw_channel_plan,u8 def_channel_plan,bool AutoLoadFail)95 u8 hal_com_config_channel_plan(
96 struct adapter *padapter,
97 u8 hw_channel_plan,
98 u8 sw_channel_plan,
99 u8 def_channel_plan,
100 bool AutoLoadFail
101 )
102 {
103 struct hal_com_data *pHalData;
104 u8 chnlPlan;
105
106 pHalData = GET_HAL_DATA(padapter);
107 pHalData->bDisableSWChannelPlan = false;
108 chnlPlan = def_channel_plan;
109
110 if (0xFF == hw_channel_plan)
111 AutoLoadFail = true;
112
113 if (!AutoLoadFail) {
114 u8 hw_chnlPlan;
115
116 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
117 if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
118 if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
119 pHalData->bDisableSWChannelPlan = true;
120
121 chnlPlan = hw_chnlPlan;
122 }
123 }
124
125 if (
126 (false == pHalData->bDisableSWChannelPlan) &&
127 rtw_is_channel_plan_valid(sw_channel_plan)
128 )
129 chnlPlan = sw_channel_plan;
130
131 return chnlPlan;
132 }
133
HAL_IsLegalChannel(struct adapter * adapter,u32 Channel)134 bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
135 {
136 bool bLegalChannel = true;
137
138 if ((Channel <= 14) && (Channel >= 1)) {
139 if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
140 bLegalChannel = false;
141 } else {
142 bLegalChannel = false;
143 }
144
145 return bLegalChannel;
146 }
147
MRateToHwRate(u8 rate)148 u8 MRateToHwRate(u8 rate)
149 {
150 u8 ret = DESC_RATE1M;
151
152 switch (rate) {
153 case MGN_1M:
154 ret = DESC_RATE1M;
155 break;
156 case MGN_2M:
157 ret = DESC_RATE2M;
158 break;
159 case MGN_5_5M:
160 ret = DESC_RATE5_5M;
161 break;
162 case MGN_11M:
163 ret = DESC_RATE11M;
164 break;
165 case MGN_6M:
166 ret = DESC_RATE6M;
167 break;
168 case MGN_9M:
169 ret = DESC_RATE9M;
170 break;
171 case MGN_12M:
172 ret = DESC_RATE12M;
173 break;
174 case MGN_18M:
175 ret = DESC_RATE18M;
176 break;
177 case MGN_24M:
178 ret = DESC_RATE24M;
179 break;
180 case MGN_36M:
181 ret = DESC_RATE36M;
182 break;
183 case MGN_48M:
184 ret = DESC_RATE48M;
185 break;
186 case MGN_54M:
187 ret = DESC_RATE54M;
188 break;
189 case MGN_MCS0:
190 ret = DESC_RATEMCS0;
191 break;
192 case MGN_MCS1:
193 ret = DESC_RATEMCS1;
194 break;
195 case MGN_MCS2:
196 ret = DESC_RATEMCS2;
197 break;
198 case MGN_MCS3:
199 ret = DESC_RATEMCS3;
200 break;
201 case MGN_MCS4:
202 ret = DESC_RATEMCS4;
203 break;
204 case MGN_MCS5:
205 ret = DESC_RATEMCS5;
206 break;
207 case MGN_MCS6:
208 ret = DESC_RATEMCS6;
209 break;
210 case MGN_MCS7:
211 ret = DESC_RATEMCS7;
212 break;
213 default:
214 break;
215 }
216
217 return ret;
218 }
219
HwRateToMRate(u8 rate)220 u8 HwRateToMRate(u8 rate)
221 {
222 u8 ret_rate = MGN_1M;
223
224 switch (rate) {
225 case DESC_RATE1M:
226 ret_rate = MGN_1M;
227 break;
228 case DESC_RATE2M:
229 ret_rate = MGN_2M;
230 break;
231 case DESC_RATE5_5M:
232 ret_rate = MGN_5_5M;
233 break;
234 case DESC_RATE11M:
235 ret_rate = MGN_11M;
236 break;
237 case DESC_RATE6M:
238 ret_rate = MGN_6M;
239 break;
240 case DESC_RATE9M:
241 ret_rate = MGN_9M;
242 break;
243 case DESC_RATE12M:
244 ret_rate = MGN_12M;
245 break;
246 case DESC_RATE18M:
247 ret_rate = MGN_18M;
248 break;
249 case DESC_RATE24M:
250 ret_rate = MGN_24M;
251 break;
252 case DESC_RATE36M:
253 ret_rate = MGN_36M;
254 break;
255 case DESC_RATE48M:
256 ret_rate = MGN_48M;
257 break;
258 case DESC_RATE54M:
259 ret_rate = MGN_54M;
260 break;
261 case DESC_RATEMCS0:
262 ret_rate = MGN_MCS0;
263 break;
264 case DESC_RATEMCS1:
265 ret_rate = MGN_MCS1;
266 break;
267 case DESC_RATEMCS2:
268 ret_rate = MGN_MCS2;
269 break;
270 case DESC_RATEMCS3:
271 ret_rate = MGN_MCS3;
272 break;
273 case DESC_RATEMCS4:
274 ret_rate = MGN_MCS4;
275 break;
276 case DESC_RATEMCS5:
277 ret_rate = MGN_MCS5;
278 break;
279 case DESC_RATEMCS6:
280 ret_rate = MGN_MCS6;
281 break;
282 case DESC_RATEMCS7:
283 ret_rate = MGN_MCS7;
284 break;
285 default:
286 break;
287 }
288
289 return ret_rate;
290 }
291
HalSetBrateCfg(struct adapter * Adapter,u8 * mBratesOS,u16 * pBrateCfg)292 void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
293 {
294 u8 i, is_brate, brate;
295
296 for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
297
298 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
299 brate = mBratesOS[i] & 0x7f;
300
301 if (is_brate) {
302 switch (brate) {
303 case IEEE80211_CCK_RATE_1MB:
304 *pBrateCfg |= RATE_1M;
305 break;
306 case IEEE80211_CCK_RATE_2MB:
307 *pBrateCfg |= RATE_2M;
308 break;
309 case IEEE80211_CCK_RATE_5MB:
310 *pBrateCfg |= RATE_5_5M;
311 break;
312 case IEEE80211_CCK_RATE_11MB:
313 *pBrateCfg |= RATE_11M;
314 break;
315 case IEEE80211_OFDM_RATE_6MB:
316 *pBrateCfg |= RATE_6M;
317 break;
318 case IEEE80211_OFDM_RATE_9MB:
319 *pBrateCfg |= RATE_9M;
320 break;
321 case IEEE80211_OFDM_RATE_12MB:
322 *pBrateCfg |= RATE_12M;
323 break;
324 case IEEE80211_OFDM_RATE_18MB:
325 *pBrateCfg |= RATE_18M;
326 break;
327 case IEEE80211_OFDM_RATE_24MB:
328 *pBrateCfg |= RATE_24M;
329 break;
330 case IEEE80211_OFDM_RATE_36MB:
331 *pBrateCfg |= RATE_36M;
332 break;
333 case IEEE80211_OFDM_RATE_48MB:
334 *pBrateCfg |= RATE_48M;
335 break;
336 case IEEE80211_OFDM_RATE_54MB:
337 *pBrateCfg |= RATE_54M;
338 break;
339 }
340 }
341 }
342 }
343
_OneOutPipeMapping(struct adapter * padapter)344 static void _OneOutPipeMapping(struct adapter *padapter)
345 {
346 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
347
348 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
349 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
350 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */
351 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
352
353 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
354 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
355 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
356 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
357 }
358
_TwoOutPipeMapping(struct adapter * padapter,bool bWIFICfg)359 static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
360 {
361 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
362
363 if (bWIFICfg) { /* WMM */
364
365 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
366 /* 0, 1, 0, 1, 0, 0, 0, 0, 0 }; */
367 /* 0:ep_0 num, 1:ep_1 num */
368
369 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */
370 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
371 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
372 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
373
374 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
375 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
376 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
377 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
378
379 } else { /* typical setting */
380
381
382 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
383 /* 1, 1, 0, 0, 0, 0, 0, 0, 0 }; */
384 /* 0:ep_0 num, 1:ep_1 num */
385
386 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
387 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
388 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
389 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
390
391 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
392 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
393 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
394 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
395
396 }
397
398 }
399
_ThreeOutPipeMapping(struct adapter * padapter,bool bWIFICfg)400 static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
401 {
402 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
403
404 if (bWIFICfg) { /* for WMM */
405
406 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
407 /* 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */
408 /* 0:H, 1:N, 2:L */
409
410 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
411 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
412 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
413 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
414
415 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
416 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
417 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
418 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
419
420 } else { /* typical setting */
421
422
423 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
424 /* 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */
425 /* 0:H, 1:N, 2:L */
426
427 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
428 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
429 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
430 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
431
432 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
433 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
434 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
435 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
436 }
437
438 }
439
Hal_MappingOutPipe(struct adapter * padapter,u8 NumOutPipe)440 bool Hal_MappingOutPipe(struct adapter *padapter, u8 NumOutPipe)
441 {
442 struct registry_priv *pregistrypriv = &padapter->registrypriv;
443
444 bool bWIFICfg = (pregistrypriv->wifi_spec) ? true : false;
445
446 bool result = true;
447
448 switch (NumOutPipe) {
449 case 2:
450 _TwoOutPipeMapping(padapter, bWIFICfg);
451 break;
452 case 3:
453 case 4:
454 _ThreeOutPipeMapping(padapter, bWIFICfg);
455 break;
456 case 1:
457 _OneOutPipeMapping(padapter);
458 break;
459 default:
460 result = false;
461 break;
462 }
463
464 return result;
465
466 }
467
hal_init_macaddr(struct adapter * adapter)468 void hal_init_macaddr(struct adapter *adapter)
469 {
470 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
471 }
472
rtw_init_hal_com_default_value(struct adapter * Adapter)473 void rtw_init_hal_com_default_value(struct adapter *Adapter)
474 {
475 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
476
477 pHalData->AntDetection = 1;
478 }
479
480 /*
481 * C2H event format:
482 * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
483 * BITS [127:120] [119:16] [15:8] [7:4] [3:0]
484 */
485
c2h_evt_clear(struct adapter * adapter)486 void c2h_evt_clear(struct adapter *adapter)
487 {
488 rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
489 }
490
491 /*
492 * C2H event format:
493 * Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
494 * BITS [127:120] [119:112] [111:16] [15:8] [7:0]
495 */
c2h_evt_read_88xx(struct adapter * adapter,u8 * buf)496 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
497 {
498 s32 ret = _FAIL;
499 struct c2h_evt_hdr_88xx *c2h_evt;
500 int i;
501 u8 trigger;
502
503 if (!buf)
504 goto exit;
505
506 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
507
508 if (trigger == C2H_EVT_HOST_CLOSE)
509 goto exit; /* Not ready */
510 else if (trigger != C2H_EVT_FW_CLOSE)
511 goto clear_evt; /* Not a valid value */
512
513 c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
514
515 memset(c2h_evt, 0, 16);
516
517 c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
518 c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
519 c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
520
521 /* Read the content */
522 for (i = 0; i < c2h_evt->plen; i++)
523 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
524
525 ret = _SUCCESS;
526
527 clear_evt:
528 /*
529 * Clear event to notify FW we have read the command.
530 * If this field isn't clear, the FW won't update the next command message.
531 */
532 c2h_evt_clear(adapter);
533 exit:
534 return ret;
535 }
536
rtw_get_mgntframe_raid(struct adapter * adapter,unsigned char network_type)537 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
538 {
539 return (network_type & WIRELESS_11B) ? RATEID_IDX_B : RATEID_IDX_G;
540 }
541
rtw_hal_update_sta_rate_mask(struct adapter * padapter,struct sta_info * psta)542 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
543 {
544 u8 i, limit;
545 u32 tx_ra_bitmap;
546
547 if (!psta)
548 return;
549
550 tx_ra_bitmap = 0;
551
552 /* b/g mode ra_bitmap */
553 for (i = 0; i < sizeof(psta->bssrateset); i++) {
554 if (psta->bssrateset[i])
555 tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
556 }
557
558 /* n mode ra_bitmap */
559 if (psta->htpriv.ht_option) {
560 limit = 8; /* 1R */
561
562 for (i = 0; i < limit; i++) {
563 if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
564 tx_ra_bitmap |= BIT(i+12);
565 }
566 }
567
568 psta->ra_mask = tx_ra_bitmap;
569 psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
570 }
571
SetHwReg(struct adapter * adapter,u8 variable,u8 * val)572 void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
573 {
574 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
575 struct dm_odm_t *odm = &(hal_data->odmpriv);
576
577 switch (variable) {
578 case HW_VAR_INIT_RTS_RATE:
579 rtw_warn_on(1);
580 break;
581 case HW_VAR_SEC_CFG:
582 {
583 u16 reg_scr;
584
585 reg_scr = rtw_read16(adapter, REG_SECCFG);
586 rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
587 }
588 break;
589 case HW_VAR_SEC_DK_CFG:
590 {
591 struct security_priv *sec = &adapter->securitypriv;
592 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
593
594 if (val) { /* Enable default key related setting */
595 reg_scr |= SCR_TXBCUSEDK;
596 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
597 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
598 } else /* Disable default key related setting */
599 reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
600
601 rtw_write8(adapter, REG_SECCFG, reg_scr);
602 }
603 break;
604 case HW_VAR_DM_FLAG:
605 odm->SupportAbility = *((u32 *)val);
606 break;
607 case HW_VAR_DM_FUNC_OP:
608 if (*((u8 *)val) == true) {
609 /* save dm flag */
610 odm->BK_SupportAbility = odm->SupportAbility;
611 } else {
612 /* restore dm flag */
613 odm->SupportAbility = odm->BK_SupportAbility;
614 }
615 break;
616 case HW_VAR_DM_FUNC_SET:
617 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
618 struct dm_priv *dm = &hal_data->dmpriv;
619 dm->DMFlag = dm->InitDMFlag;
620 odm->SupportAbility = dm->InitODMFlag;
621 } else {
622 odm->SupportAbility |= *((u32 *)val);
623 }
624 break;
625 case HW_VAR_DM_FUNC_CLR:
626 /*
627 * input is already a mask to clear function
628 * don't invert it again! George, Lucas@20130513
629 */
630 odm->SupportAbility &= *((u32 *)val);
631 break;
632 case HW_VAR_AMPDU_MIN_SPACE:
633 /* TODO - Is something needed here? */
634 break;
635 case HW_VAR_WIRELESS_MODE:
636 /* TODO - Is something needed here? */
637 break;
638 default:
639 netdev_dbg(adapter->pnetdev,
640 FUNC_ADPT_FMT " variable(%d) not defined!\n",
641 FUNC_ADPT_ARG(adapter), variable);
642 break;
643 }
644 }
645
GetHwReg(struct adapter * adapter,u8 variable,u8 * val)646 void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
647 {
648 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
649 struct dm_odm_t *odm = &(hal_data->odmpriv);
650
651 switch (variable) {
652 case HW_VAR_BASIC_RATE:
653 *((u16 *)val) = hal_data->BasicRateSet;
654 break;
655 case HW_VAR_DM_FLAG:
656 *((u32 *)val) = odm->SupportAbility;
657 break;
658 default:
659 netdev_dbg(adapter->pnetdev,
660 FUNC_ADPT_FMT " variable(%d) not defined!\n",
661 FUNC_ADPT_ARG(adapter), variable);
662 break;
663 }
664 }
665
GetHalDefVar(struct adapter * adapter,enum hal_def_variable variable,void * value)666 u8 GetHalDefVar(
667 struct adapter *adapter, enum hal_def_variable variable, void *value
668 )
669 {
670 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
671 u8 bResult = _SUCCESS;
672
673 switch (variable) {
674 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
675 {
676 struct mlme_priv *pmlmepriv;
677 struct sta_priv *pstapriv;
678 struct sta_info *psta;
679
680 pmlmepriv = &adapter->mlmepriv;
681 pstapriv = &adapter->stapriv;
682 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.mac_address);
683 if (psta)
684 *((int *)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
685 }
686 break;
687 case HAL_DEF_DBG_DM_FUNC:
688 *((u32 *)value) = hal_data->odmpriv.SupportAbility;
689 break;
690 case HAL_DEF_DBG_DUMP_RXPKT:
691 *((u8 *)value) = hal_data->bDumpRxPkt;
692 break;
693 case HAL_DEF_DBG_DUMP_TXPKT:
694 *((u8 *)value) = hal_data->bDumpTxPkt;
695 break;
696 case HAL_DEF_ANT_DETECT:
697 *((u8 *)value) = hal_data->AntDetection;
698 break;
699 case HAL_DEF_MACID_SLEEP:
700 *(u8 *)value = false;
701 break;
702 case HAL_DEF_TX_PAGE_SIZE:
703 *((u32 *)value) = PAGE_SIZE_128;
704 break;
705 default:
706 netdev_dbg(adapter->pnetdev,
707 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
708 __func__, variable);
709 bResult = _FAIL;
710 break;
711 }
712
713 return bResult;
714 }
715
SetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,bool bSet)716 void SetHalODMVar(
717 struct adapter *Adapter,
718 enum hal_odm_variable eVariable,
719 void *pValue1,
720 bool bSet
721 )
722 {
723 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
724 struct dm_odm_t *podmpriv = &pHalData->odmpriv;
725 /* _irqL irqL; */
726 switch (eVariable) {
727 case HAL_ODM_STA_INFO:
728 {
729 struct sta_info *psta = pValue1;
730 if (bSet) {
731 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
732 } else {
733 /* spin_lock_bh(&pHalData->odm_stainfo_lock); */
734 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
735
736 /* spin_unlock_bh(&pHalData->odm_stainfo_lock); */
737 }
738 }
739 break;
740 case HAL_ODM_P2P_STATE:
741 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
742 break;
743 case HAL_ODM_WIFI_DISPLAY_STATE:
744 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
745 break;
746
747 default:
748 break;
749 }
750 }
751
752
eqNByte(u8 * str1,u8 * str2,u32 num)753 bool eqNByte(u8 *str1, u8 *str2, u32 num)
754 {
755 if (num == 0)
756 return false;
757 while (num > 0) {
758 num--;
759 if (str1[num] != str2[num])
760 return false;
761 }
762 return true;
763 }
764
GetU1ByteIntegerFromStringInDecimal(char * Str,u8 * pInt)765 bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
766 {
767 u16 i = 0;
768 *pInt = 0;
769
770 while (Str[i] != '\0') {
771 if (Str[i] >= '0' && Str[i] <= '9') {
772 *pInt *= 10;
773 *pInt += (Str[i] - '0');
774 } else
775 return false;
776
777 ++i;
778 }
779
780 return true;
781 }
782
rtw_hal_check_rxfifo_full(struct adapter * adapter)783 void rtw_hal_check_rxfifo_full(struct adapter *adapter)
784 {
785 struct dvobj_priv *psdpriv = adapter->dvobj;
786 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
787 int save_cnt = false;
788
789 /* switch counter to RX fifo */
790 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
791 save_cnt = true;
792 /* todo: other chips */
793
794 if (save_cnt) {
795 /* rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); */
796 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
797 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
798 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
799 }
800 }
801
802 static u32 Array_kfreemap[] = {
803 0xf8, 0xe,
804 0xf6, 0xc,
805 0xf4, 0xa,
806 0xf2, 0x8,
807 0xf0, 0x6,
808 0xf3, 0x4,
809 0xf5, 0x2,
810 0xf7, 0x0,
811 0xf9, 0x0,
812 0xfc, 0x0,
813 };
814
815 #define REG_RF_BB_GAIN_OFFSET 0x7f
816 //#define RF_GAIN_OFFSET_MASK 0xfffff
817
rtw_bb_rf_gain_offset(struct adapter * padapter)818 void rtw_bb_rf_gain_offset(struct adapter *padapter)
819 {
820 u8 value = padapter->eeprompriv.EEPROMRFGainOffset;
821 u32 *Array = Array_kfreemap;
822 u32 v1 = 0, v2 = 0, target = 0;
823 u32 i = 0;
824
825 if (value & BIT4) {
826 if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
827 rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
828
829 for (i = 0; i < ARRAY_SIZE(Array_kfreemap); i += 2) {
830 v1 = Array[i];
831 v2 = Array[i+1];
832 if (v1 == padapter->eeprompriv.EEPROMRFGainVal) {
833 target = v2;
834 break;
835 }
836 }
837 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
838
839 rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
840 }
841 }
842 }
843