| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1260 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, ShAmt, Zero, ISD::SETEQ); in LowerSHL_PARTS() local
1308 SDValue SetCC = DAG.getSetCC(dl, MVT::i32, NegatedPlus32, Zero, ISD::SETLE); in LowerSRL_PARTS() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 895 SDValue SetCC = in Expand() local
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| H A D | TargetLowering.cpp | 10895 SDValue SetCC; in expandUADDSUBO() local
10935 SDValue SetCC = DAG.getSetCC(dl, OType, Result, Sat, ISD::SETNE); in expandSADDSUBO() local
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| H A D | DAGCombiner.cpp | 9474 SDValue SetCC = in visitXOR() local
13229 SDValue SetCC = VSel.getOperand(0); in matchVSelectOpSizesWithSetCC() local
13409 SDValue SetCC = N->getOperand(0); in foldExtendedSignBitTest() local
13557 SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC); in foldSextSetcc() local
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| H A D | LegalizeIntegerTypes.cpp | 1359 SDValue SetCC; in PromoteIntRes_SETCC() local
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| H A D | SelectionDAGBuilder.cpp | 7950 SDValue SetCC = DAG.getSetCC(sdl, CCVT, VectorInduction, in visitIntrinsicCall() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 984 SDValue SetCC = N->getOperand(0); in performVSELECTCombine() local
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| H A D | MipsISelLowering.cpp | 691 SDValue SetCC = N->getOperand(0); in performSELECTCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24011 SDValue SetCC = getSETCC(Cond, Overflow, DL, DAG); in LowerXALUO() local
25943 SDValue SetCC; in LowerINTRINSIC_WO_CHAIN() local
26095 SDValue SetCC = getSETCC(X86::COND_B, Res.getValue(1), dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
26252 SDValue SetCC = getSETCC(X86CC, Test, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
26314 SDValue SetCC = getSETCC(X86CC, PCMP, dl, DAG); in LowerINTRINSIC_WO_CHAIN() local
26882 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local
26903 SDValue SetCC = getSETCC(X86::COND_E, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local
26993 SDValue SetCC = getSETCC(X86::COND_B, Operation.getValue(0), dl, DAG); in LowerINTRINSIC_W_CHAIN() local
27228 SDValue SetCC = getSETCC(X86::COND_NE, InTrans, dl, DAG); in LowerINTRINSIC_W_CHAIN() local
31844 SDValue SetCC = getSETCC(IsSigned ? X86::COND_O : X86::COND_B, in LowerADDSUBO_CARRY() local
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 2179 SDValue SetCC = in LowerSETCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4335 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerXALUO() local
4433 SDValue SetCC = emitSETCC(DAG, DL, Result.getValue(1), CCValid, CCMask); in lowerUADDSUBO_CARRY() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 3129 SDValue SetCC = DAG.getNode(ISD::SETCC, dl, ResTy, in WidenHvxSetCC() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6040 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic() local
6069 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic() local
6551 SDNode *SetCC = nullptr; in LowerBRCOND() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 19003 SDValue SetCC = N->getOperand(0); in performANDSETCCCombine() local
21558 const SDValue SetCC = N->getOperand(0); in performSignExtendSetCCCombine() local
24171 SDValue SetCC = N->getOperand(0); in trySwapVSelectOperands() local
24218 SDValue SetCC = N->getOperand(0); in performVSelectCombine() local
24327 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5550 SDValue SetCC = lowerVPCttzElements() local
6967 SDValue SetCC = DAG.getSetCC( LowerOperation() local
9776 SDValue SetCC = DAG.getSetCC(DL, XLenVT, Vec, Zero, CC); lowerVectorMaskVecReduction() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13215 SDValue SetCC; in PerformSELECTCombine() local
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