xref: /linux/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h (revision 597473720f4dc69749542bfcfed4a927a43d935e)
1 /*
2  * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
3  *
4  * This file is licensed under the terms of the GNU General Public
5  * License version 2.  This program is licensed "as is" without any
6  * warranty of any kind, whether express or implied.
7  */
8 
9 #ifndef _SUN8I_VI_SCALER_H_
10 #define _SUN8I_VI_SCALER_H_
11 
12 #include <drm/drm_fourcc.h>
13 #include "sun8i_mixer.h"
14 
15 #define DE2_VI_SCALER_UNIT_BASE 0x20000
16 #define DE2_VI_SCALER_UNIT_SIZE 0x20000
17 
18 #define DE3_VI_SCALER_UNIT_BASE 0x20000
19 #define DE3_VI_SCALER_UNIT_SIZE 0x08000
20 
21 /* this two macros assumes 16 fractional bits which is standard in DRM */
22 #define SUN8I_VI_SCALER_SCALE_MIN		1
23 #define SUN8I_VI_SCALER_SCALE_MAX		((1UL << 20) - 1)
24 
25 #define SUN8I_VI_SCALER_SCALE_FRAC		20
26 #define SUN8I_VI_SCALER_PHASE_FRAC		20
27 #define SUN8I_VI_SCALER_COEFF_COUNT		32
28 #define SUN8I_VI_SCALER_SIZE(w, h)		(((h) - 1) << 16 | ((w) - 1))
29 
30 #define SUN8I_SCALER_VSU_CTRL(base)		((base) + 0x0)
31 #define SUN50I_SCALER_VSU_SCALE_MODE(base)		((base) + 0x10)
32 #define SUN50I_SCALER_VSU_DIR_THR(base)		((base) + 0x20)
33 #define SUN50I_SCALER_VSU_EDGE_THR(base)		((base) + 0x24)
34 #define SUN50I_SCALER_VSU_EDSCL_CTRL(base)		((base) + 0x28)
35 #define SUN50I_SCALER_VSU_ANGLE_THR(base)		((base) + 0x2c)
36 #define SUN8I_SCALER_VSU_OUTSIZE(base)		((base) + 0x40)
37 #define SUN8I_SCALER_VSU_YINSIZE(base)		((base) + 0x80)
38 #define SUN8I_SCALER_VSU_YHSTEP(base)		((base) + 0x88)
39 #define SUN8I_SCALER_VSU_YVSTEP(base)		((base) + 0x8c)
40 #define SUN8I_SCALER_VSU_YHPHASE(base)		((base) + 0x90)
41 #define SUN8I_SCALER_VSU_YVPHASE(base)		((base) + 0x98)
42 #define SUN8I_SCALER_VSU_CINSIZE(base)		((base) + 0xc0)
43 #define SUN8I_SCALER_VSU_CHSTEP(base)		((base) + 0xc8)
44 #define SUN8I_SCALER_VSU_CVSTEP(base)		((base) + 0xcc)
45 #define SUN8I_SCALER_VSU_CHPHASE(base)		((base) + 0xd0)
46 #define SUN8I_SCALER_VSU_CVPHASE(base)		((base) + 0xd8)
47 #define SUN8I_SCALER_VSU_YHCOEFF0(base, i)	((base) + 0x200 + 0x4 * (i))
48 #define SUN8I_SCALER_VSU_YHCOEFF1(base, i)	((base) + 0x300 + 0x4 * (i))
49 #define SUN8I_SCALER_VSU_YVCOEFF(base, i)	((base) + 0x400 + 0x4 * (i))
50 #define SUN8I_SCALER_VSU_CHCOEFF0(base, i)	((base) + 0x600 + 0x4 * (i))
51 #define SUN8I_SCALER_VSU_CHCOEFF1(base, i)	((base) + 0x700 + 0x4 * (i))
52 #define SUN8I_SCALER_VSU_CVCOEFF(base, i)	((base) + 0x800 + 0x4 * (i))
53 
54 #define SUN8I_SCALER_VSU_CTRL_EN		BIT(0)
55 #define SUN8I_SCALER_VSU_CTRL_COEFF_RDY		BIT(4)
56 
57 #define SUN50I_SCALER_VSU_SUB_ZERO_DIR_THR(x)	(((x) << 24) & 0xFF)
58 #define SUN50I_SCALER_VSU_ZERO_DIR_THR(x)		(((x) << 16) & 0xFF)
59 #define SUN50I_SCALER_VSU_HORZ_DIR_THR(x)		(((x) << 8) & 0xFF)
60 #define SUN50I_SCALER_VSU_VERT_DIR_THR(x)		((x) & 0xFF)
61 
62 #define SUN50I_SCALER_VSU_SCALE_MODE_UI		0
63 #define SUN50I_SCALER_VSU_SCALE_MODE_NORMAL	1
64 #define SUN50I_SCALER_VSU_SCALE_MODE_ED_SCALE	2
65 
66 #define SUN50I_SCALER_VSU_EDGE_SHIFT(x)		(((x) << 16) & 0xF)
67 #define SUN50I_SCALER_VSU_EDGE_OFFSET(x)		((x) & 0xFF)
68 
69 #define SUN50I_SCALER_VSU_ANGLE_SHIFT(x)		(((x) << 16) & 0xF)
70 #define SUN50I_SCALER_VSU_ANGLE_OFFSET(x)		((x) & 0xFF)
71 
72 void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
73 void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
74 			   u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
75 			   u32 hscale, u32 vscale, u32 hphase, u32 vphase,
76 			   const struct drm_format_info *format);
77 
78 #endif
79