1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * sst_acpi.c - SST (LPE) driver init file for ACPI enumeration. 4 * 5 * Copyright (c) 2013, Intel Corporation. 6 * 7 * Authors: Ramesh Babu K V <Ramesh.Babu@intel.com> 8 * Authors: Omair Mohammed Abdullah <omair.m.abdullah@intel.com> 9 */ 10 11 #include <linux/module.h> 12 #include <linux/fs.h> 13 #include <linux/interrupt.h> 14 #include <linux/slab.h> 15 #include <linux/string.h> 16 #include <linux/io.h> 17 #include <linux/platform_device.h> 18 #include <linux/firmware.h> 19 #include <linux/pm_qos.h> 20 #include <linux/dmi.h> 21 #include <linux/acpi.h> 22 #include <asm/platform_sst_audio.h> 23 #include <sound/core.h> 24 #include <sound/intel-dsp-config.h> 25 #include <sound/soc.h> 26 #include <sound/compress_driver.h> 27 #include <acpi/acbuffer.h> 28 #include <acpi/platform/acenv.h> 29 #include <acpi/platform/aclinux.h> 30 #include <acpi/actypes.h> 31 #include <acpi/acpi_bus.h> 32 #include <sound/soc-acpi.h> 33 #include <sound/soc-acpi-intel-match.h> 34 #include "../sst-mfld-platform.h" 35 #include "../../common/soc-intel-quirks.h" 36 #include "sst.h" 37 38 /* LPE viewpoint addresses */ 39 #define SST_BYT_IRAM_PHY_START 0xff2c0000 40 #define SST_BYT_IRAM_PHY_END 0xff2d4000 41 #define SST_BYT_DRAM_PHY_START 0xff300000 42 #define SST_BYT_DRAM_PHY_END 0xff320000 43 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */ 44 #define SST_BYT_IMR_VIRT_END 0xc01fffff 45 #define SST_BYT_SHIM_PHY_ADDR 0xff340000 46 #define SST_BYT_MBOX_PHY_ADDR 0xff344000 47 #define SST_BYT_DMA0_PHY_ADDR 0xff298000 48 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000 49 #define SST_BYT_SSP0_PHY_ADDR 0xff2a0000 50 #define SST_BYT_SSP2_PHY_ADDR 0xff2a2000 51 52 #define BYT_FW_MOD_TABLE_OFFSET 0x80000 53 #define BYT_FW_MOD_TABLE_SIZE 0x100 54 #define BYT_FW_MOD_OFFSET (BYT_FW_MOD_TABLE_OFFSET + BYT_FW_MOD_TABLE_SIZE) 55 56 static const struct sst_info byt_fwparse_info = { 57 .use_elf = false, 58 .max_streams = 25, 59 .iram_start = SST_BYT_IRAM_PHY_START, 60 .iram_end = SST_BYT_IRAM_PHY_END, 61 .iram_use = true, 62 .dram_start = SST_BYT_DRAM_PHY_START, 63 .dram_end = SST_BYT_DRAM_PHY_END, 64 .dram_use = true, 65 .imr_start = SST_BYT_IMR_VIRT_START, 66 .imr_end = SST_BYT_IMR_VIRT_END, 67 .imr_use = true, 68 .mailbox_start = SST_BYT_MBOX_PHY_ADDR, 69 .num_probes = 0, 70 .lpe_viewpt_rqd = true, 71 }; 72 73 static const struct sst_ipc_info byt_ipc_info = { 74 .ipc_offset = 0, 75 .mbox_recv_off = 0x400, 76 }; 77 78 static const struct sst_lib_dnld_info byt_lib_dnld_info = { 79 .mod_base = SST_BYT_IMR_VIRT_START, 80 .mod_end = SST_BYT_IMR_VIRT_END, 81 .mod_table_offset = BYT_FW_MOD_TABLE_OFFSET, 82 .mod_table_size = BYT_FW_MOD_TABLE_SIZE, 83 .mod_ddr_dnld = false, 84 }; 85 86 static const struct sst_res_info byt_rvp_res_info = { 87 .shim_offset = 0x140000, 88 .shim_size = 0x000100, 89 .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR, 90 .ssp0_offset = 0xa0000, 91 .ssp0_size = 0x1000, 92 .dma0_offset = 0x98000, 93 .dma0_size = 0x4000, 94 .dma1_offset = 0x9c000, 95 .dma1_size = 0x4000, 96 .iram_offset = 0x0c0000, 97 .iram_size = 0x14000, 98 .dram_offset = 0x100000, 99 .dram_size = 0x28000, 100 .mbox_offset = 0x144000, 101 .mbox_size = 0x1000, 102 .acpi_lpe_res_index = 0, 103 .acpi_ddr_index = 2, 104 .acpi_ipc_irq_index = 5, 105 }; 106 107 /* BYTCR has different BIOS from BYT */ 108 static const struct sst_res_info bytcr_res_info = { 109 .shim_offset = 0x140000, 110 .shim_size = 0x000100, 111 .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR, 112 .ssp0_offset = 0xa0000, 113 .ssp0_size = 0x1000, 114 .dma0_offset = 0x98000, 115 .dma0_size = 0x4000, 116 .dma1_offset = 0x9c000, 117 .dma1_size = 0x4000, 118 .iram_offset = 0x0c0000, 119 .iram_size = 0x14000, 120 .dram_offset = 0x100000, 121 .dram_size = 0x28000, 122 .mbox_offset = 0x144000, 123 .mbox_size = 0x1000, 124 .acpi_lpe_res_index = 0, 125 .acpi_ddr_index = 2, 126 .acpi_ipc_irq_index = 0 127 }; 128 129 /* For "LPE0F28" ACPI device found on some Android factory OS models */ 130 static const struct sst_res_info lpe8086_res_info = { 131 .shim_offset = 0x140000, 132 .shim_size = 0x000100, 133 .shim_phy_addr = SST_BYT_SHIM_PHY_ADDR, 134 .ssp0_offset = 0xa0000, 135 .ssp0_size = 0x1000, 136 .dma0_offset = 0x98000, 137 .dma0_size = 0x4000, 138 .dma1_offset = 0x9c000, 139 .dma1_size = 0x4000, 140 .iram_offset = 0x0c0000, 141 .iram_size = 0x14000, 142 .dram_offset = 0x100000, 143 .dram_size = 0x28000, 144 .mbox_offset = 0x144000, 145 .mbox_size = 0x1000, 146 .acpi_lpe_res_index = 1, 147 .acpi_ddr_index = 0, 148 .acpi_ipc_irq_index = 0 149 }; 150 151 static struct sst_platform_info byt_rvp_platform_data = { 152 .probe_data = &byt_fwparse_info, 153 .ipc_info = &byt_ipc_info, 154 .lib_info = &byt_lib_dnld_info, 155 .res_info = &byt_rvp_res_info, 156 .platform = "sst-mfld-platform", 157 .streams_lost_on_suspend = true, 158 }; 159 160 /* Cherryview (Cherrytrail and Braswell) uses same mrfld dpcm fw as Baytrail, 161 * so pdata is same as Baytrail, minus the streams_lost_on_suspend quirk. 162 */ 163 static struct sst_platform_info chv_platform_data = { 164 .probe_data = &byt_fwparse_info, 165 .ipc_info = &byt_ipc_info, 166 .lib_info = &byt_lib_dnld_info, 167 .res_info = &byt_rvp_res_info, 168 .platform = "sst-mfld-platform", 169 }; 170 171 static int sst_platform_get_resources(struct intel_sst_drv *ctx) 172 { 173 struct resource *rsrc; 174 struct platform_device *pdev = to_platform_device(ctx->dev); 175 176 /* All ACPI resource request here */ 177 /* Get Shim addr */ 178 rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 179 ctx->pdata->res_info->acpi_lpe_res_index); 180 if (!rsrc) { 181 dev_err(ctx->dev, "Invalid SHIM base from IFWI\n"); 182 return -EIO; 183 } 184 dev_info(ctx->dev, "LPE base: %#x size:%#x", (unsigned int) rsrc->start, 185 (unsigned int)resource_size(rsrc)); 186 187 ctx->iram_base = rsrc->start + ctx->pdata->res_info->iram_offset; 188 ctx->iram_end = ctx->iram_base + ctx->pdata->res_info->iram_size - 1; 189 dev_info(ctx->dev, "IRAM base: %#x", ctx->iram_base); 190 ctx->iram = devm_ioremap(ctx->dev, ctx->iram_base, 191 ctx->pdata->res_info->iram_size); 192 if (!ctx->iram) { 193 dev_err(ctx->dev, "unable to map IRAM\n"); 194 return -EIO; 195 } 196 197 ctx->dram_base = rsrc->start + ctx->pdata->res_info->dram_offset; 198 ctx->dram_end = ctx->dram_base + ctx->pdata->res_info->dram_size - 1; 199 dev_info(ctx->dev, "DRAM base: %#x", ctx->dram_base); 200 ctx->dram = devm_ioremap(ctx->dev, ctx->dram_base, 201 ctx->pdata->res_info->dram_size); 202 if (!ctx->dram) { 203 dev_err(ctx->dev, "unable to map DRAM\n"); 204 return -EIO; 205 } 206 207 ctx->shim_phy_add = rsrc->start + ctx->pdata->res_info->shim_offset; 208 dev_info(ctx->dev, "SHIM base: %#x", ctx->shim_phy_add); 209 ctx->shim = devm_ioremap(ctx->dev, ctx->shim_phy_add, 210 ctx->pdata->res_info->shim_size); 211 if (!ctx->shim) { 212 dev_err(ctx->dev, "unable to map SHIM\n"); 213 return -EIO; 214 } 215 216 /* reassign physical address to LPE viewpoint address */ 217 ctx->shim_phy_add = ctx->pdata->res_info->shim_phy_addr; 218 219 /* Get mailbox addr */ 220 ctx->mailbox_add = rsrc->start + ctx->pdata->res_info->mbox_offset; 221 dev_info(ctx->dev, "Mailbox base: %#x", ctx->mailbox_add); 222 ctx->mailbox = devm_ioremap(ctx->dev, ctx->mailbox_add, 223 ctx->pdata->res_info->mbox_size); 224 if (!ctx->mailbox) { 225 dev_err(ctx->dev, "unable to map mailbox\n"); 226 return -EIO; 227 } 228 229 /* reassign physical address to LPE viewpoint address */ 230 ctx->mailbox_add = ctx->info.mailbox_start; 231 232 rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 233 ctx->pdata->res_info->acpi_ddr_index); 234 if (!rsrc) { 235 dev_err(ctx->dev, "Invalid DDR base from IFWI\n"); 236 return -EIO; 237 } 238 ctx->ddr_base = rsrc->start; 239 ctx->ddr_end = rsrc->end; 240 dev_info(ctx->dev, "DDR base: %#x", ctx->ddr_base); 241 ctx->ddr = devm_ioremap(ctx->dev, ctx->ddr_base, 242 resource_size(rsrc)); 243 if (!ctx->ddr) { 244 dev_err(ctx->dev, "unable to map DDR\n"); 245 return -EIO; 246 } 247 248 /* Find the IRQ */ 249 ctx->irq_num = platform_get_irq(pdev, 250 ctx->pdata->res_info->acpi_ipc_irq_index); 251 if (ctx->irq_num <= 0) 252 return ctx->irq_num < 0 ? ctx->irq_num : -EIO; 253 254 return 0; 255 } 256 257 static int sst_acpi_probe(struct platform_device *pdev) 258 { 259 struct device *dev = &pdev->dev; 260 int ret = 0; 261 struct intel_sst_drv *ctx; 262 const struct acpi_device_id *id; 263 struct snd_soc_acpi_mach *mach; 264 struct platform_device *mdev; 265 struct platform_device *plat_dev; 266 struct sst_platform_info *pdata; 267 unsigned int dev_id; 268 269 id = acpi_match_device(dev->driver->acpi_match_table, dev); 270 if (!id) 271 return -ENODEV; 272 273 ret = snd_intel_acpi_dsp_driver_probe(dev, id->id); 274 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SST) { 275 dev_dbg(dev, "SST ACPI driver not selected, aborting probe\n"); 276 return -ENODEV; 277 } 278 279 dev_dbg(dev, "for %s\n", id->id); 280 281 mach = (struct snd_soc_acpi_mach *)id->driver_data; 282 mach = snd_soc_acpi_find_machine(mach); 283 if (mach == NULL) { 284 dev_err(dev, "No matching machine driver found\n"); 285 return -ENODEV; 286 } 287 288 if (soc_intel_is_byt()) 289 mach->pdata = &byt_rvp_platform_data; 290 else 291 mach->pdata = &chv_platform_data; 292 pdata = mach->pdata; 293 294 if (!strcmp(id->id, "LPE0F28")) { 295 struct resource *rsrc; 296 297 /* Use regular BYT SST PCI VID:PID */ 298 dev_id = 0x80860F28; 299 byt_rvp_platform_data.res_info = &lpe8086_res_info; 300 301 /* 302 * The "LPE0F28" ACPI device has separate IO-mem resources for: 303 * DDR, SHIM, MBOX, IRAM, DRAM, CFG 304 * None of which covers the entire LPE base address range. 305 * lpe8086_res_info.acpi_lpe_res_index points to the SHIM. 306 * Patch this to cover the entire base address range as expected 307 * by sst_platform_get_resources(). 308 */ 309 rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 310 pdata->res_info->acpi_lpe_res_index); 311 if (!rsrc) { 312 dev_err(dev, "Invalid SHIM base\n"); 313 return -EIO; 314 } 315 rsrc->start -= pdata->res_info->shim_offset; 316 rsrc->end = rsrc->start + 0x200000 - 1; 317 } else { 318 ret = kstrtouint(id->id, 16, &dev_id); 319 if (ret < 0) { 320 dev_err(dev, "Unique device id conversion error: %d\n", ret); 321 return ret; 322 } 323 324 if (soc_intel_is_byt_cr(pdev)) 325 byt_rvp_platform_data.res_info = &bytcr_res_info; 326 } 327 328 dev_dbg(dev, "ACPI device id: %x\n", dev_id); 329 330 ret = sst_alloc_drv_context(&ctx, dev, dev_id); 331 if (ret < 0) 332 return ret; 333 334 /* update machine parameters */ 335 mach->mach_params.acpi_ipc_irq_index = 336 pdata->res_info->acpi_ipc_irq_index; 337 338 plat_dev = platform_device_register_data(dev, pdata->platform, -1, 339 NULL, 0); 340 if (IS_ERR(plat_dev)) { 341 dev_err(dev, "Failed to create machine device: %s\n", 342 pdata->platform); 343 return PTR_ERR(plat_dev); 344 } 345 346 /* 347 * Create platform device for sst machine driver, 348 * pass machine info as pdata 349 */ 350 mdev = platform_device_register_data(dev, mach->drv_name, -1, 351 (const void *)mach, sizeof(*mach)); 352 if (IS_ERR(mdev)) { 353 dev_err(dev, "Failed to create machine device: %s\n", 354 mach->drv_name); 355 return PTR_ERR(mdev); 356 } 357 358 /* Fill sst platform data */ 359 ctx->pdata = pdata; 360 strscpy(ctx->firmware_name, mach->fw_filename); 361 362 ret = sst_platform_get_resources(ctx); 363 if (ret) 364 return ret; 365 366 ret = sst_context_init(ctx); 367 if (ret < 0) 368 return ret; 369 370 sst_configure_runtime_pm(ctx); 371 platform_set_drvdata(pdev, ctx); 372 return ret; 373 } 374 375 /** 376 * sst_acpi_remove - remove function 377 * 378 * @pdev: platform device structure 379 * 380 * This function is called by OS when a device is unloaded 381 * This frees the interrupt etc 382 */ 383 static void sst_acpi_remove(struct platform_device *pdev) 384 { 385 struct intel_sst_drv *ctx; 386 387 ctx = platform_get_drvdata(pdev); 388 sst_context_cleanup(ctx); 389 platform_set_drvdata(pdev, NULL); 390 } 391 392 static const struct acpi_device_id sst_acpi_ids[] = { 393 { "LPE0F28", (unsigned long)&snd_soc_acpi_intel_baytrail_machines}, 394 { "80860F28", (unsigned long)&snd_soc_acpi_intel_baytrail_machines}, 395 { "808622A8", (unsigned long)&snd_soc_acpi_intel_cherrytrail_machines}, 396 { }, 397 }; 398 399 MODULE_DEVICE_TABLE(acpi, sst_acpi_ids); 400 401 static struct platform_driver sst_acpi_driver = { 402 .driver = { 403 .name = "intel_sst_acpi", 404 .acpi_match_table = ACPI_PTR(sst_acpi_ids), 405 .pm = &intel_sst_pm, 406 }, 407 .probe = sst_acpi_probe, 408 .remove = sst_acpi_remove, 409 }; 410 411 module_platform_driver(sst_acpi_driver); 412 413 MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine ACPI Driver"); 414 MODULE_AUTHOR("Ramesh Babu K V"); 415 MODULE_AUTHOR("Omair Mohammed Abdullah"); 416 MODULE_LICENSE("GPL v2"); 417 MODULE_ALIAS("sst"); 418