1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
4 */
5
6 #include <linux/clk.h>
7 #include <linux/console.h>
8 #include <linux/delay.h>
9 #include <linux/dmaengine.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/dma/sprd-dma.h>
12 #include <linux/io.h>
13 #include <linux/ioport.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial.h>
20 #include <linux/slab.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23
24 /* device name */
25 #define UART_NR_MAX 8
26 #define SPRD_TTY_NAME "ttyS"
27 #define SPRD_FIFO_SIZE 128
28 #define SPRD_DEF_RATE 26000000
29 #define SPRD_BAUD_IO_LIMIT 3000000
30 #define SPRD_TIMEOUT 256000
31
32 /* the offset of serial registers and BITs for them */
33 /* data registers */
34 #define SPRD_TXD 0x0000
35 #define SPRD_RXD 0x0004
36
37 /* line status register and its BITs */
38 #define SPRD_LSR 0x0008
39 #define SPRD_LSR_OE BIT(4)
40 #define SPRD_LSR_FE BIT(3)
41 #define SPRD_LSR_PE BIT(2)
42 #define SPRD_LSR_BI BIT(7)
43 #define SPRD_LSR_TX_OVER BIT(15)
44
45 /* data number in TX and RX fifo */
46 #define SPRD_STS1 0x000C
47 #define SPRD_RX_FIFO_CNT_MASK GENMASK(7, 0)
48 #define SPRD_TX_FIFO_CNT_MASK GENMASK(15, 8)
49
50 /* interrupt enable register and its BITs */
51 #define SPRD_IEN 0x0010
52 #define SPRD_IEN_RX_FULL BIT(0)
53 #define SPRD_IEN_TX_EMPTY BIT(1)
54 #define SPRD_IEN_BREAK_DETECT BIT(7)
55 #define SPRD_IEN_TIMEOUT BIT(13)
56 #define SPRD_IEN_DATA_TIMEOUT BIT(17)
57
58 /* interrupt clear register */
59 #define SPRD_ICLR 0x0014
60 #define SPRD_ICLR_TIMEOUT BIT(13)
61 #define SPRD_ICLR_DATA_TIMEOUT BIT(17)
62
63 /* line control register */
64 #define SPRD_LCR 0x0018
65 #define SPRD_LCR_STOP_1BIT 0x10
66 #define SPRD_LCR_STOP_2BIT 0x30
67 #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
68 #define SPRD_LCR_DATA_LEN5 0x0
69 #define SPRD_LCR_DATA_LEN6 0x4
70 #define SPRD_LCR_DATA_LEN7 0x8
71 #define SPRD_LCR_DATA_LEN8 0xc
72 #define SPRD_LCR_PARITY (BIT(0) | BIT(1))
73 #define SPRD_LCR_PARITY_EN 0x2
74 #define SPRD_LCR_EVEN_PAR 0x0
75 #define SPRD_LCR_ODD_PAR 0x1
76
77 /* control register 1 */
78 #define SPRD_CTL1 0x001C
79 #define SPRD_DMA_EN BIT(15)
80 #define SPRD_LOOPBACK_EN BIT(14)
81 #define RX_HW_FLOW_CTL_THLD BIT(6)
82 #define RX_HW_FLOW_CTL_EN BIT(7)
83 #define TX_HW_FLOW_CTL_EN BIT(8)
84 #define RX_TOUT_THLD_DEF 0x3E00
85 #define RX_HFC_THLD_DEF 0x40
86
87 /* fifo threshold register */
88 #define SPRD_CTL2 0x0020
89 #define THLD_TX_EMPTY 0x40
90 #define THLD_TX_EMPTY_SHIFT 8
91 #define THLD_RX_FULL 0x40
92 #define THLD_RX_FULL_MASK GENMASK(6, 0)
93
94 /* config baud rate register */
95 #define SPRD_CLKD0 0x0024
96 #define SPRD_CLKD0_MASK GENMASK(15, 0)
97 #define SPRD_CLKD1 0x0028
98 #define SPRD_CLKD1_MASK GENMASK(20, 16)
99 #define SPRD_CLKD1_SHIFT 16
100
101 /* interrupt mask status register */
102 #define SPRD_IMSR 0x002C
103 #define SPRD_IMSR_RX_FIFO_FULL BIT(0)
104 #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
105 #define SPRD_IMSR_BREAK_DETECT BIT(7)
106 #define SPRD_IMSR_TIMEOUT BIT(13)
107 #define SPRD_IMSR_DATA_TIMEOUT BIT(17)
108 #define SPRD_DEFAULT_SOURCE_CLK 26000000
109
110 #define SPRD_RX_DMA_STEP 1
111 #define SPRD_RX_FIFO_FULL 1
112 #define SPRD_TX_FIFO_FULL 0x20
113 #define SPRD_UART_RX_SIZE (UART_XMIT_SIZE / 4)
114
115 struct sprd_uart_dma {
116 struct dma_chan *chn;
117 unsigned char *virt;
118 dma_addr_t phys_addr;
119 dma_cookie_t cookie;
120 u32 trans_len;
121 bool enable;
122 };
123
124 struct sprd_uart_data {
125 unsigned int timeout_ien;
126 unsigned int timeout_iclr;
127 unsigned int timeout_imsr;
128 };
129
130 struct sprd_uart_port {
131 struct uart_port port;
132 char name[16];
133 struct clk *clk;
134 struct sprd_uart_dma tx_dma;
135 struct sprd_uart_dma rx_dma;
136 dma_addr_t pos;
137 unsigned char *rx_buf_tail;
138 const struct sprd_uart_data *pdata;
139 };
140
141 static struct sprd_uart_port *sprd_port[UART_NR_MAX];
142 static int sprd_ports_num;
143
144 static int sprd_start_dma_rx(struct uart_port *port);
145 static int sprd_tx_dma_config(struct uart_port *port);
146
147 static const struct sprd_uart_data sc9836_data = {
148 .timeout_ien = SPRD_IEN_TIMEOUT,
149 .timeout_iclr = SPRD_ICLR_TIMEOUT,
150 .timeout_imsr = SPRD_IMSR_TIMEOUT,
151 };
152
153 static const struct sprd_uart_data sc9632_data = {
154 .timeout_ien = SPRD_IEN_DATA_TIMEOUT,
155 .timeout_iclr = SPRD_ICLR_DATA_TIMEOUT,
156 .timeout_imsr = SPRD_IMSR_DATA_TIMEOUT,
157 };
158
serial_in(struct uart_port * port,unsigned int offset)159 static inline unsigned int serial_in(struct uart_port *port,
160 unsigned int offset)
161 {
162 return readl_relaxed(port->membase + offset);
163 }
164
serial_out(struct uart_port * port,unsigned int offset,int value)165 static inline void serial_out(struct uart_port *port, unsigned int offset,
166 int value)
167 {
168 writel_relaxed(value, port->membase + offset);
169 }
170
sprd_tx_empty(struct uart_port * port)171 static unsigned int sprd_tx_empty(struct uart_port *port)
172 {
173 if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
174 return 0;
175 else
176 return TIOCSER_TEMT;
177 }
178
sprd_get_mctrl(struct uart_port * port)179 static unsigned int sprd_get_mctrl(struct uart_port *port)
180 {
181 return TIOCM_DSR | TIOCM_CTS;
182 }
183
sprd_set_mctrl(struct uart_port * port,unsigned int mctrl)184 static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
185 {
186 u32 val = serial_in(port, SPRD_CTL1);
187
188 if (mctrl & TIOCM_LOOP)
189 val |= SPRD_LOOPBACK_EN;
190 else
191 val &= ~SPRD_LOOPBACK_EN;
192
193 serial_out(port, SPRD_CTL1, val);
194 }
195
sprd_stop_rx(struct uart_port * port)196 static void sprd_stop_rx(struct uart_port *port)
197 {
198 struct sprd_uart_port *sp =
199 container_of(port, struct sprd_uart_port, port);
200 unsigned int ien, iclr;
201
202 if (sp->rx_dma.enable)
203 dmaengine_terminate_all(sp->rx_dma.chn);
204
205 iclr = serial_in(port, SPRD_ICLR);
206 ien = serial_in(port, SPRD_IEN);
207
208 ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
209 iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
210
211 serial_out(port, SPRD_IEN, ien);
212 serial_out(port, SPRD_ICLR, iclr);
213 }
214
sprd_uart_dma_enable(struct uart_port * port,bool enable)215 static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
216 {
217 u32 val = serial_in(port, SPRD_CTL1);
218
219 if (enable)
220 val |= SPRD_DMA_EN;
221 else
222 val &= ~SPRD_DMA_EN;
223
224 serial_out(port, SPRD_CTL1, val);
225 }
226
sprd_stop_tx_dma(struct uart_port * port)227 static void sprd_stop_tx_dma(struct uart_port *port)
228 {
229 struct sprd_uart_port *sp =
230 container_of(port, struct sprd_uart_port, port);
231 struct dma_tx_state state;
232 u32 trans_len;
233
234 dmaengine_pause(sp->tx_dma.chn);
235
236 dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
237 if (state.residue) {
238 trans_len = state.residue - sp->tx_dma.phys_addr;
239 uart_xmit_advance(port, trans_len);
240 dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
241 sp->tx_dma.trans_len, DMA_TO_DEVICE);
242 }
243
244 dmaengine_terminate_all(sp->tx_dma.chn);
245 sp->tx_dma.trans_len = 0;
246 }
247
sprd_tx_buf_remap(struct uart_port * port)248 static int sprd_tx_buf_remap(struct uart_port *port)
249 {
250 struct sprd_uart_port *sp =
251 container_of(port, struct sprd_uart_port, port);
252 struct tty_port *tport = &port->state->port;
253 unsigned char *tail;
254
255 sp->tx_dma.trans_len = kfifo_out_linear_ptr(&tport->xmit_fifo, &tail,
256 UART_XMIT_SIZE);
257
258 sp->tx_dma.phys_addr = dma_map_single(port->dev, tail,
259 sp->tx_dma.trans_len,
260 DMA_TO_DEVICE);
261 return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
262 }
263
sprd_complete_tx_dma(void * data)264 static void sprd_complete_tx_dma(void *data)
265 {
266 struct uart_port *port = (struct uart_port *)data;
267 struct sprd_uart_port *sp =
268 container_of(port, struct sprd_uart_port, port);
269 struct tty_port *tport = &port->state->port;
270 unsigned long flags;
271
272 uart_port_lock_irqsave(port, &flags);
273 dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
274 sp->tx_dma.trans_len, DMA_TO_DEVICE);
275
276 uart_xmit_advance(port, sp->tx_dma.trans_len);
277
278 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
279 uart_write_wakeup(port);
280
281 if (kfifo_is_empty(&tport->xmit_fifo) || sprd_tx_buf_remap(port) ||
282 sprd_tx_dma_config(port))
283 sp->tx_dma.trans_len = 0;
284
285 uart_port_unlock_irqrestore(port, flags);
286 }
287
sprd_uart_dma_submit(struct uart_port * port,struct sprd_uart_dma * ud,u32 trans_len,enum dma_transfer_direction direction,dma_async_tx_callback callback)288 static int sprd_uart_dma_submit(struct uart_port *port,
289 struct sprd_uart_dma *ud, u32 trans_len,
290 enum dma_transfer_direction direction,
291 dma_async_tx_callback callback)
292 {
293 struct dma_async_tx_descriptor *dma_des;
294 unsigned long flags;
295
296 flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
297 SPRD_DMA_NO_TRG,
298 SPRD_DMA_FRAG_REQ,
299 SPRD_DMA_TRANS_INT);
300
301 dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
302 direction, flags);
303 if (!dma_des)
304 return -ENODEV;
305
306 dma_des->callback = callback;
307 dma_des->callback_param = port;
308
309 ud->cookie = dmaengine_submit(dma_des);
310 if (dma_submit_error(ud->cookie))
311 return dma_submit_error(ud->cookie);
312
313 dma_async_issue_pending(ud->chn);
314
315 return 0;
316 }
317
sprd_tx_dma_config(struct uart_port * port)318 static int sprd_tx_dma_config(struct uart_port *port)
319 {
320 struct sprd_uart_port *sp =
321 container_of(port, struct sprd_uart_port, port);
322 u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
323 SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
324 int ret;
325 struct dma_slave_config cfg = {
326 .dst_addr = port->mapbase + SPRD_TXD,
327 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
328 .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
329 .src_maxburst = burst,
330 };
331
332 ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
333 if (ret < 0)
334 return ret;
335
336 return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
337 DMA_MEM_TO_DEV, sprd_complete_tx_dma);
338 }
339
sprd_start_tx_dma(struct uart_port * port)340 static void sprd_start_tx_dma(struct uart_port *port)
341 {
342 struct sprd_uart_port *sp =
343 container_of(port, struct sprd_uart_port, port);
344 struct tty_port *tport = &port->state->port;
345
346 if (port->x_char) {
347 serial_out(port, SPRD_TXD, port->x_char);
348 port->icount.tx++;
349 port->x_char = 0;
350 return;
351 }
352
353 if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) {
354 sprd_stop_tx_dma(port);
355 return;
356 }
357
358 if (sp->tx_dma.trans_len)
359 return;
360
361 if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
362 sp->tx_dma.trans_len = 0;
363 }
364
sprd_rx_full_thld(struct uart_port * port,u32 thld)365 static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
366 {
367 u32 val = serial_in(port, SPRD_CTL2);
368
369 val &= ~THLD_RX_FULL_MASK;
370 val |= thld & THLD_RX_FULL_MASK;
371 serial_out(port, SPRD_CTL2, val);
372 }
373
sprd_rx_alloc_buf(struct sprd_uart_port * sp)374 static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
375 {
376 sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
377 &sp->rx_dma.phys_addr, GFP_KERNEL);
378 if (!sp->rx_dma.virt)
379 return -ENOMEM;
380
381 return 0;
382 }
383
sprd_rx_free_buf(struct sprd_uart_port * sp)384 static void sprd_rx_free_buf(struct sprd_uart_port *sp)
385 {
386 if (sp->rx_dma.virt)
387 dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
388 sp->rx_dma.virt, sp->rx_dma.phys_addr);
389 sp->rx_dma.virt = NULL;
390 }
391
sprd_rx_dma_config(struct uart_port * port,u32 burst)392 static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
393 {
394 struct sprd_uart_port *sp =
395 container_of(port, struct sprd_uart_port, port);
396 struct dma_slave_config cfg = {
397 .src_addr = port->mapbase + SPRD_RXD,
398 .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
399 .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
400 .src_maxburst = burst,
401 };
402
403 return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
404 }
405
sprd_uart_dma_rx(struct uart_port * port)406 static void sprd_uart_dma_rx(struct uart_port *port)
407 {
408 struct sprd_uart_port *sp =
409 container_of(port, struct sprd_uart_port, port);
410 struct tty_port *tty = &port->state->port;
411
412 port->icount.rx += sp->rx_dma.trans_len;
413 tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
414 tty_flip_buffer_push(tty);
415 }
416
sprd_uart_dma_irq(struct uart_port * port)417 static void sprd_uart_dma_irq(struct uart_port *port)
418 {
419 struct sprd_uart_port *sp =
420 container_of(port, struct sprd_uart_port, port);
421 struct dma_tx_state state;
422 enum dma_status status;
423
424 status = dmaengine_tx_status(sp->rx_dma.chn,
425 sp->rx_dma.cookie, &state);
426 if (status == DMA_ERROR)
427 sprd_stop_rx(port);
428
429 if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
430 return;
431
432 if (!state.residue) {
433 sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
434 sp->rx_dma.phys_addr - sp->pos;
435 sp->pos = sp->rx_dma.phys_addr;
436 } else {
437 sp->rx_dma.trans_len = state.residue - sp->pos;
438 sp->pos = state.residue;
439 }
440
441 sprd_uart_dma_rx(port);
442 sp->rx_buf_tail += sp->rx_dma.trans_len;
443 }
444
sprd_complete_rx_dma(void * data)445 static void sprd_complete_rx_dma(void *data)
446 {
447 struct uart_port *port = (struct uart_port *)data;
448 struct sprd_uart_port *sp =
449 container_of(port, struct sprd_uart_port, port);
450 struct dma_tx_state state;
451 enum dma_status status;
452 unsigned long flags;
453
454 uart_port_lock_irqsave(port, &flags);
455
456 status = dmaengine_tx_status(sp->rx_dma.chn,
457 sp->rx_dma.cookie, &state);
458 if (status != DMA_COMPLETE) {
459 sprd_stop_rx(port);
460 uart_port_unlock_irqrestore(port, flags);
461 return;
462 }
463
464 if (sp->pos != sp->rx_dma.phys_addr) {
465 sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
466 sp->rx_dma.phys_addr - sp->pos;
467 sprd_uart_dma_rx(port);
468 sp->rx_buf_tail += sp->rx_dma.trans_len;
469 }
470
471 if (sprd_start_dma_rx(port))
472 sprd_stop_rx(port);
473
474 uart_port_unlock_irqrestore(port, flags);
475 }
476
sprd_start_dma_rx(struct uart_port * port)477 static int sprd_start_dma_rx(struct uart_port *port)
478 {
479 struct sprd_uart_port *sp =
480 container_of(port, struct sprd_uart_port, port);
481 int ret;
482
483 if (!sp->rx_dma.enable)
484 return 0;
485
486 sp->pos = sp->rx_dma.phys_addr;
487 sp->rx_buf_tail = sp->rx_dma.virt;
488 sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
489 ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
490 if (ret)
491 return ret;
492
493 return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
494 DMA_DEV_TO_MEM, sprd_complete_rx_dma);
495 }
496
sprd_release_dma(struct uart_port * port)497 static void sprd_release_dma(struct uart_port *port)
498 {
499 struct sprd_uart_port *sp =
500 container_of(port, struct sprd_uart_port, port);
501
502 sprd_uart_dma_enable(port, false);
503
504 if (sp->rx_dma.enable)
505 dma_release_channel(sp->rx_dma.chn);
506
507 if (sp->tx_dma.enable)
508 dma_release_channel(sp->tx_dma.chn);
509
510 sp->tx_dma.enable = false;
511 sp->rx_dma.enable = false;
512 }
513
sprd_request_dma(struct uart_port * port)514 static void sprd_request_dma(struct uart_port *port)
515 {
516 struct sprd_uart_port *sp =
517 container_of(port, struct sprd_uart_port, port);
518
519 sp->tx_dma.enable = true;
520 sp->rx_dma.enable = true;
521
522 sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
523 if (IS_ERR(sp->tx_dma.chn)) {
524 dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
525 PTR_ERR(sp->tx_dma.chn));
526 sp->tx_dma.enable = false;
527 }
528
529 sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
530 if (IS_ERR(sp->rx_dma.chn)) {
531 dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
532 PTR_ERR(sp->rx_dma.chn));
533 sp->rx_dma.enable = false;
534 }
535 }
536
sprd_stop_tx(struct uart_port * port)537 static void sprd_stop_tx(struct uart_port *port)
538 {
539 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
540 port);
541 unsigned int ien, iclr;
542
543 if (sp->tx_dma.enable) {
544 sprd_stop_tx_dma(port);
545 return;
546 }
547
548 iclr = serial_in(port, SPRD_ICLR);
549 ien = serial_in(port, SPRD_IEN);
550
551 iclr |= SPRD_IEN_TX_EMPTY;
552 ien &= ~SPRD_IEN_TX_EMPTY;
553
554 serial_out(port, SPRD_IEN, ien);
555 serial_out(port, SPRD_ICLR, iclr);
556 }
557
sprd_start_tx(struct uart_port * port)558 static void sprd_start_tx(struct uart_port *port)
559 {
560 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
561 port);
562 unsigned int ien;
563
564 if (sp->tx_dma.enable) {
565 sprd_start_tx_dma(port);
566 return;
567 }
568
569 ien = serial_in(port, SPRD_IEN);
570 if (!(ien & SPRD_IEN_TX_EMPTY)) {
571 ien |= SPRD_IEN_TX_EMPTY;
572 serial_out(port, SPRD_IEN, ien);
573 }
574 }
575
576 /* The Sprd serial does not support this function. */
sprd_break_ctl(struct uart_port * port,int break_state)577 static void sprd_break_ctl(struct uart_port *port, int break_state)
578 {
579 /* nothing to do */
580 }
581
handle_lsr_errors(struct uart_port * port,u8 * flag,unsigned int * lsr)582 static int handle_lsr_errors(struct uart_port *port,
583 u8 *flag,
584 unsigned int *lsr)
585 {
586 int ret = 0;
587
588 /* statistics */
589 if (*lsr & SPRD_LSR_BI) {
590 *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
591 port->icount.brk++;
592 ret = uart_handle_break(port);
593 if (ret)
594 return ret;
595 } else if (*lsr & SPRD_LSR_PE)
596 port->icount.parity++;
597 else if (*lsr & SPRD_LSR_FE)
598 port->icount.frame++;
599 if (*lsr & SPRD_LSR_OE)
600 port->icount.overrun++;
601
602 /* mask off conditions which should be ignored */
603 *lsr &= port->read_status_mask;
604 if (*lsr & SPRD_LSR_BI)
605 *flag = TTY_BREAK;
606 else if (*lsr & SPRD_LSR_PE)
607 *flag = TTY_PARITY;
608 else if (*lsr & SPRD_LSR_FE)
609 *flag = TTY_FRAME;
610
611 return ret;
612 }
613
sprd_rx(struct uart_port * port)614 static inline void sprd_rx(struct uart_port *port)
615 {
616 struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
617 port);
618 struct tty_port *tty = &port->state->port;
619 unsigned int lsr, max_count = SPRD_TIMEOUT;
620 u8 ch, flag;
621
622 if (sp->rx_dma.enable) {
623 sprd_uart_dma_irq(port);
624 return;
625 }
626
627 while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
628 max_count--) {
629 lsr = serial_in(port, SPRD_LSR);
630 ch = serial_in(port, SPRD_RXD);
631 flag = TTY_NORMAL;
632 port->icount.rx++;
633
634 if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
635 SPRD_LSR_FE | SPRD_LSR_OE))
636 if (handle_lsr_errors(port, &flag, &lsr))
637 continue;
638 if (uart_handle_sysrq_char(port, ch))
639 continue;
640
641 uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
642 }
643
644 tty_flip_buffer_push(tty);
645 }
646
sprd_tx(struct uart_port * port)647 static inline void sprd_tx(struct uart_port *port)
648 {
649 u8 ch;
650
651 uart_port_tx_limited(port, ch, THLD_TX_EMPTY,
652 true,
653 serial_out(port, SPRD_TXD, ch),
654 ({}));
655 }
656
657 /* this handles the interrupt from one port */
sprd_handle_irq(int irq,void * dev_id)658 static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
659 {
660 struct uart_port *port = dev_id;
661 unsigned int ims;
662 struct sprd_uart_port *sp =
663 container_of(port, struct sprd_uart_port, port);
664
665 uart_port_lock(port);
666
667 ims = serial_in(port, SPRD_IMSR);
668
669 if (!ims) {
670 uart_port_unlock(port);
671 return IRQ_NONE;
672 }
673
674 if (ims & sp->pdata->timeout_imsr)
675 serial_out(port, SPRD_ICLR, sp->pdata->timeout_iclr);
676
677 if (ims & SPRD_IMSR_BREAK_DETECT)
678 serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
679
680 if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
681 sp->pdata->timeout_imsr))
682 sprd_rx(port);
683
684 if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
685 sprd_tx(port);
686
687 uart_port_unlock(port);
688
689 return IRQ_HANDLED;
690 }
691
sprd_uart_dma_startup(struct uart_port * port,struct sprd_uart_port * sp)692 static void sprd_uart_dma_startup(struct uart_port *port,
693 struct sprd_uart_port *sp)
694 {
695 int ret;
696
697 sprd_request_dma(port);
698 if (!(sp->rx_dma.enable || sp->tx_dma.enable))
699 return;
700
701 ret = sprd_start_dma_rx(port);
702 if (ret) {
703 sp->rx_dma.enable = false;
704 dma_release_channel(sp->rx_dma.chn);
705 dev_warn(port->dev, "fail to start RX dma mode\n");
706 }
707
708 sprd_uart_dma_enable(port, true);
709 }
710
sprd_startup(struct uart_port * port)711 static int sprd_startup(struct uart_port *port)
712 {
713 int ret = 0;
714 unsigned int ien, fc;
715 unsigned int timeout;
716 struct sprd_uart_port *sp;
717 unsigned long flags;
718
719 serial_out(port, SPRD_CTL2,
720 THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
721
722 /* clear rx fifo */
723 timeout = SPRD_TIMEOUT;
724 while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
725 serial_in(port, SPRD_RXD);
726
727 /* clear tx fifo */
728 timeout = SPRD_TIMEOUT;
729 while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
730 cpu_relax();
731
732 /* clear interrupt */
733 serial_out(port, SPRD_IEN, 0);
734 serial_out(port, SPRD_ICLR, ~0);
735
736 /* allocate irq */
737 sp = container_of(port, struct sprd_uart_port, port);
738 snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
739
740 sprd_uart_dma_startup(port, sp);
741
742 ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
743 IRQF_SHARED, sp->name, port);
744 if (ret) {
745 dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
746 port->irq, ret);
747 return ret;
748 }
749 fc = serial_in(port, SPRD_CTL1);
750 fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
751 serial_out(port, SPRD_CTL1, fc);
752
753 /* enable interrupt */
754 uart_port_lock_irqsave(port, &flags);
755 ien = serial_in(port, SPRD_IEN);
756 ien |= SPRD_IEN_BREAK_DETECT | sp->pdata->timeout_ien;
757 if (!sp->rx_dma.enable)
758 ien |= SPRD_IEN_RX_FULL;
759 serial_out(port, SPRD_IEN, ien);
760 uart_port_unlock_irqrestore(port, flags);
761
762 return 0;
763 }
764
sprd_shutdown(struct uart_port * port)765 static void sprd_shutdown(struct uart_port *port)
766 {
767 sprd_release_dma(port);
768 serial_out(port, SPRD_IEN, 0);
769 serial_out(port, SPRD_ICLR, ~0);
770 devm_free_irq(port->dev, port->irq, port);
771 }
772
sprd_set_termios(struct uart_port * port,struct ktermios * termios,const struct ktermios * old)773 static void sprd_set_termios(struct uart_port *port, struct ktermios *termios,
774 const struct ktermios *old)
775 {
776 unsigned int baud, quot;
777 unsigned int lcr = 0, fc;
778 unsigned long flags;
779
780 /* ask the core to calculate the divisor for us */
781 baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
782
783 quot = port->uartclk / baud;
784
785 /* set data length */
786 switch (termios->c_cflag & CSIZE) {
787 case CS5:
788 lcr |= SPRD_LCR_DATA_LEN5;
789 break;
790 case CS6:
791 lcr |= SPRD_LCR_DATA_LEN6;
792 break;
793 case CS7:
794 lcr |= SPRD_LCR_DATA_LEN7;
795 break;
796 case CS8:
797 default:
798 lcr |= SPRD_LCR_DATA_LEN8;
799 break;
800 }
801
802 /* calculate stop bits */
803 lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
804 if (termios->c_cflag & CSTOPB)
805 lcr |= SPRD_LCR_STOP_2BIT;
806 else
807 lcr |= SPRD_LCR_STOP_1BIT;
808
809 /* calculate parity */
810 lcr &= ~SPRD_LCR_PARITY;
811 termios->c_cflag &= ~CMSPAR; /* no support mark/space */
812 if (termios->c_cflag & PARENB) {
813 lcr |= SPRD_LCR_PARITY_EN;
814 if (termios->c_cflag & PARODD)
815 lcr |= SPRD_LCR_ODD_PAR;
816 else
817 lcr |= SPRD_LCR_EVEN_PAR;
818 }
819
820 uart_port_lock_irqsave(port, &flags);
821
822 /* update the per-port timeout */
823 uart_update_timeout(port, termios->c_cflag, baud);
824
825 port->read_status_mask = SPRD_LSR_OE;
826 if (termios->c_iflag & INPCK)
827 port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
828 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
829 port->read_status_mask |= SPRD_LSR_BI;
830
831 /* characters to ignore */
832 port->ignore_status_mask = 0;
833 if (termios->c_iflag & IGNPAR)
834 port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
835 if (termios->c_iflag & IGNBRK) {
836 port->ignore_status_mask |= SPRD_LSR_BI;
837 /*
838 * If we're ignoring parity and break indicators,
839 * ignore overruns too (for real raw support).
840 */
841 if (termios->c_iflag & IGNPAR)
842 port->ignore_status_mask |= SPRD_LSR_OE;
843 }
844
845 /* flow control */
846 fc = serial_in(port, SPRD_CTL1);
847 fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
848 if (termios->c_cflag & CRTSCTS) {
849 fc |= RX_HW_FLOW_CTL_THLD;
850 fc |= RX_HW_FLOW_CTL_EN;
851 fc |= TX_HW_FLOW_CTL_EN;
852 }
853
854 /* clock divider bit0~bit15 */
855 serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
856
857 /* clock divider bit16~bit20 */
858 serial_out(port, SPRD_CLKD1,
859 (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
860 serial_out(port, SPRD_LCR, lcr);
861 fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
862 serial_out(port, SPRD_CTL1, fc);
863
864 uart_port_unlock_irqrestore(port, flags);
865
866 /* Don't rewrite B0 */
867 if (tty_termios_baud_rate(termios))
868 tty_termios_encode_baud_rate(termios, baud, baud);
869 }
870
sprd_type(struct uart_port * port)871 static const char *sprd_type(struct uart_port *port)
872 {
873 return "SPX";
874 }
875
sprd_release_port(struct uart_port * port)876 static void sprd_release_port(struct uart_port *port)
877 {
878 /* nothing to do */
879 }
880
sprd_request_port(struct uart_port * port)881 static int sprd_request_port(struct uart_port *port)
882 {
883 return 0;
884 }
885
sprd_config_port(struct uart_port * port,int flags)886 static void sprd_config_port(struct uart_port *port, int flags)
887 {
888 if (flags & UART_CONFIG_TYPE)
889 port->type = PORT_SPRD;
890 }
891
sprd_verify_port(struct uart_port * port,struct serial_struct * ser)892 static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
893 {
894 if (ser->type != PORT_SPRD)
895 return -EINVAL;
896 if (port->irq != ser->irq)
897 return -EINVAL;
898 if (port->iotype != ser->io_type)
899 return -EINVAL;
900 return 0;
901 }
902
sprd_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)903 static void sprd_pm(struct uart_port *port, unsigned int state,
904 unsigned int oldstate)
905 {
906 struct sprd_uart_port *sup =
907 container_of(port, struct sprd_uart_port, port);
908
909 switch (state) {
910 case UART_PM_STATE_ON:
911 clk_prepare_enable(sup->clk);
912 break;
913 case UART_PM_STATE_OFF:
914 clk_disable_unprepare(sup->clk);
915 break;
916 }
917 }
918
919 #ifdef CONFIG_CONSOLE_POLL
sprd_poll_init(struct uart_port * port)920 static int sprd_poll_init(struct uart_port *port)
921 {
922 if (port->state->pm_state != UART_PM_STATE_ON) {
923 sprd_pm(port, UART_PM_STATE_ON, 0);
924 port->state->pm_state = UART_PM_STATE_ON;
925 }
926
927 return 0;
928 }
929
sprd_poll_get_char(struct uart_port * port)930 static int sprd_poll_get_char(struct uart_port *port)
931 {
932 while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK))
933 cpu_relax();
934
935 return serial_in(port, SPRD_RXD);
936 }
937
sprd_poll_put_char(struct uart_port * port,unsigned char ch)938 static void sprd_poll_put_char(struct uart_port *port, unsigned char ch)
939 {
940 while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
941 cpu_relax();
942
943 serial_out(port, SPRD_TXD, ch);
944 }
945 #endif
946
947 static const struct uart_ops serial_sprd_ops = {
948 .tx_empty = sprd_tx_empty,
949 .get_mctrl = sprd_get_mctrl,
950 .set_mctrl = sprd_set_mctrl,
951 .stop_tx = sprd_stop_tx,
952 .start_tx = sprd_start_tx,
953 .stop_rx = sprd_stop_rx,
954 .break_ctl = sprd_break_ctl,
955 .startup = sprd_startup,
956 .shutdown = sprd_shutdown,
957 .set_termios = sprd_set_termios,
958 .type = sprd_type,
959 .release_port = sprd_release_port,
960 .request_port = sprd_request_port,
961 .config_port = sprd_config_port,
962 .verify_port = sprd_verify_port,
963 .pm = sprd_pm,
964 #ifdef CONFIG_CONSOLE_POLL
965 .poll_init = sprd_poll_init,
966 .poll_get_char = sprd_poll_get_char,
967 .poll_put_char = sprd_poll_put_char,
968 #endif
969 };
970
971 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
wait_for_xmitr(struct uart_port * port)972 static void wait_for_xmitr(struct uart_port *port)
973 {
974 unsigned int status, tmout = 10000;
975
976 /* wait up to 10ms for the character(s) to be sent */
977 do {
978 status = serial_in(port, SPRD_STS1);
979 if (--tmout == 0)
980 break;
981 udelay(1);
982 } while (status & SPRD_TX_FIFO_CNT_MASK);
983 }
984
sprd_console_putchar(struct uart_port * port,unsigned char ch)985 static void sprd_console_putchar(struct uart_port *port, unsigned char ch)
986 {
987 wait_for_xmitr(port);
988 serial_out(port, SPRD_TXD, ch);
989 }
990
sprd_console_write(struct console * co,const char * s,unsigned int count)991 static void sprd_console_write(struct console *co, const char *s,
992 unsigned int count)
993 {
994 struct uart_port *port = &sprd_port[co->index]->port;
995 int locked = 1;
996 unsigned long flags;
997
998 if (port->sysrq)
999 locked = 0;
1000 else if (oops_in_progress)
1001 locked = uart_port_trylock_irqsave(port, &flags);
1002 else
1003 uart_port_lock_irqsave(port, &flags);
1004
1005 uart_console_write(port, s, count, sprd_console_putchar);
1006
1007 /* wait for transmitter to become empty */
1008 wait_for_xmitr(port);
1009
1010 if (locked)
1011 uart_port_unlock_irqrestore(port, flags);
1012 }
1013
sprd_console_setup(struct console * co,char * options)1014 static int sprd_console_setup(struct console *co, char *options)
1015 {
1016 struct sprd_uart_port *sprd_uart_port;
1017 int baud = 115200;
1018 int bits = 8;
1019 int parity = 'n';
1020 int flow = 'n';
1021
1022 if (co->index >= UART_NR_MAX || co->index < 0)
1023 co->index = 0;
1024
1025 sprd_uart_port = sprd_port[co->index];
1026 if (!sprd_uart_port || !sprd_uart_port->port.membase) {
1027 pr_info("serial port %d not yet initialized\n", co->index);
1028 return -ENODEV;
1029 }
1030
1031 if (options)
1032 uart_parse_options(options, &baud, &parity, &bits, &flow);
1033
1034 return uart_set_options(&sprd_uart_port->port, co, baud,
1035 parity, bits, flow);
1036 }
1037
1038 static struct uart_driver sprd_uart_driver;
1039 static struct console sprd_console = {
1040 .name = SPRD_TTY_NAME,
1041 .write = sprd_console_write,
1042 .device = uart_console_device,
1043 .setup = sprd_console_setup,
1044 .flags = CON_PRINTBUFFER,
1045 .index = -1,
1046 .data = &sprd_uart_driver,
1047 };
1048
sprd_serial_console_init(void)1049 static int __init sprd_serial_console_init(void)
1050 {
1051 register_console(&sprd_console);
1052 return 0;
1053 }
1054 console_initcall(sprd_serial_console_init);
1055
1056 #define SPRD_CONSOLE (&sprd_console)
1057
1058 /* Support for earlycon */
sprd_putc(struct uart_port * port,unsigned char c)1059 static void sprd_putc(struct uart_port *port, unsigned char c)
1060 {
1061 unsigned int timeout = SPRD_TIMEOUT;
1062
1063 while (timeout-- &&
1064 !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
1065 cpu_relax();
1066
1067 writeb(c, port->membase + SPRD_TXD);
1068 }
1069
sprd_early_write(struct console * con,const char * s,unsigned int n)1070 static void sprd_early_write(struct console *con, const char *s, unsigned int n)
1071 {
1072 struct earlycon_device *dev = con->data;
1073
1074 uart_console_write(&dev->port, s, n, sprd_putc);
1075 }
1076
sprd_early_console_setup(struct earlycon_device * device,const char * opt)1077 static int __init sprd_early_console_setup(struct earlycon_device *device,
1078 const char *opt)
1079 {
1080 if (!device->port.membase)
1081 return -ENODEV;
1082
1083 device->con->write = sprd_early_write;
1084 return 0;
1085 }
1086 OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
1087 sprd_early_console_setup);
1088
1089 #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1090 #define SPRD_CONSOLE NULL
1091 #endif
1092
1093 static struct uart_driver sprd_uart_driver = {
1094 .owner = THIS_MODULE,
1095 .driver_name = "sprd_serial",
1096 .dev_name = SPRD_TTY_NAME,
1097 .major = 0,
1098 .minor = 0,
1099 .nr = UART_NR_MAX,
1100 .cons = SPRD_CONSOLE,
1101 };
1102
sprd_remove(struct platform_device * dev)1103 static void sprd_remove(struct platform_device *dev)
1104 {
1105 struct sprd_uart_port *sup = platform_get_drvdata(dev);
1106
1107 if (sup) {
1108 uart_remove_one_port(&sprd_uart_driver, &sup->port);
1109 sprd_port[sup->port.line] = NULL;
1110 sprd_rx_free_buf(sup);
1111 sprd_ports_num--;
1112 }
1113
1114 if (!sprd_ports_num)
1115 uart_unregister_driver(&sprd_uart_driver);
1116 }
1117
sprd_uart_is_console(struct uart_port * uport)1118 static bool sprd_uart_is_console(struct uart_port *uport)
1119 {
1120 struct console *cons = sprd_uart_driver.cons;
1121
1122 if ((cons && cons->index >= 0 && cons->index == uport->line) ||
1123 of_console_check(uport->dev->of_node, SPRD_TTY_NAME, uport->line))
1124 return true;
1125
1126 return false;
1127 }
1128
sprd_clk_init(struct uart_port * uport)1129 static int sprd_clk_init(struct uart_port *uport)
1130 {
1131 struct clk *clk_uart, *clk_parent;
1132 struct sprd_uart_port *u = container_of(uport, struct sprd_uart_port, port);
1133
1134 clk_uart = devm_clk_get(uport->dev, "uart");
1135 if (IS_ERR(clk_uart)) {
1136 dev_warn(uport->dev, "uart%d can't get uart clock\n",
1137 uport->line);
1138 clk_uart = NULL;
1139 }
1140
1141 clk_parent = devm_clk_get(uport->dev, "source");
1142 if (IS_ERR(clk_parent)) {
1143 dev_warn(uport->dev, "uart%d can't get source clock\n",
1144 uport->line);
1145 clk_parent = NULL;
1146 }
1147
1148 if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
1149 uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
1150 else
1151 uport->uartclk = clk_get_rate(clk_uart);
1152
1153 u->clk = devm_clk_get(uport->dev, "enable");
1154 if (IS_ERR(u->clk)) {
1155 if (PTR_ERR(u->clk) == -EPROBE_DEFER)
1156 return -EPROBE_DEFER;
1157
1158 dev_warn(uport->dev, "uart%d can't get enable clock\n",
1159 uport->line);
1160
1161 /* To keep console alive even if the error occurred */
1162 if (!sprd_uart_is_console(uport))
1163 return PTR_ERR(u->clk);
1164
1165 u->clk = NULL;
1166 }
1167
1168 return 0;
1169 }
1170
sprd_probe(struct platform_device * pdev)1171 static int sprd_probe(struct platform_device *pdev)
1172 {
1173 struct resource *res;
1174 struct uart_port *up;
1175 struct sprd_uart_port *sport;
1176 int irq;
1177 int index;
1178 int ret;
1179
1180 index = of_alias_get_id(pdev->dev.of_node, "serial");
1181 if (index < 0 || index >= UART_NR_MAX) {
1182 dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index);
1183 return -EINVAL;
1184 }
1185
1186 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
1187 if (!sport)
1188 return -ENOMEM;
1189
1190 up = &sport->port;
1191 up->dev = &pdev->dev;
1192 up->line = index;
1193 up->type = PORT_SPRD;
1194 up->iotype = UPIO_MEM;
1195 up->uartclk = SPRD_DEF_RATE;
1196 up->fifosize = SPRD_FIFO_SIZE;
1197 up->ops = &serial_sprd_ops;
1198 up->flags = UPF_BOOT_AUTOCONF;
1199 up->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE);
1200
1201 ret = sprd_clk_init(up);
1202 if (ret)
1203 return ret;
1204
1205 up->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1206 if (IS_ERR(up->membase))
1207 return PTR_ERR(up->membase);
1208
1209 up->mapbase = res->start;
1210
1211 sport->pdata = of_device_get_match_data(&pdev->dev);
1212 if (!sport->pdata) {
1213 dev_err(&pdev->dev, "get match data failed!\n");
1214 return -EINVAL;
1215 }
1216
1217 irq = platform_get_irq(pdev, 0);
1218 if (irq < 0)
1219 return irq;
1220 up->irq = irq;
1221
1222 /*
1223 * Allocate one dma buffer to prepare for receive transfer, in case
1224 * memory allocation failure at runtime.
1225 */
1226 ret = sprd_rx_alloc_buf(sport);
1227 if (ret)
1228 return ret;
1229
1230 if (!sprd_ports_num) {
1231 ret = uart_register_driver(&sprd_uart_driver);
1232 if (ret < 0) {
1233 pr_err("Failed to register SPRD-UART driver\n");
1234 goto free_rx_buf;
1235 }
1236 }
1237
1238 sprd_ports_num++;
1239 sprd_port[index] = sport;
1240
1241 ret = uart_add_one_port(&sprd_uart_driver, up);
1242 if (ret)
1243 goto clean_port;
1244
1245 platform_set_drvdata(pdev, up);
1246
1247 return 0;
1248
1249 clean_port:
1250 sprd_port[index] = NULL;
1251 if (--sprd_ports_num == 0)
1252 uart_unregister_driver(&sprd_uart_driver);
1253 free_rx_buf:
1254 sprd_rx_free_buf(sport);
1255 return ret;
1256 }
1257
1258 #ifdef CONFIG_PM_SLEEP
sprd_suspend(struct device * dev)1259 static int sprd_suspend(struct device *dev)
1260 {
1261 struct sprd_uart_port *sup = dev_get_drvdata(dev);
1262
1263 uart_suspend_port(&sprd_uart_driver, &sup->port);
1264
1265 return 0;
1266 }
1267
sprd_resume(struct device * dev)1268 static int sprd_resume(struct device *dev)
1269 {
1270 struct sprd_uart_port *sup = dev_get_drvdata(dev);
1271
1272 uart_resume_port(&sprd_uart_driver, &sup->port);
1273
1274 return 0;
1275 }
1276 #endif
1277
1278 static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
1279
1280 static const struct of_device_id serial_ids[] = {
1281 {.compatible = "sprd,sc9836-uart", .data = &sc9836_data},
1282 {.compatible = "sprd,sc9632-uart", .data = &sc9632_data},
1283 {}
1284 };
1285 MODULE_DEVICE_TABLE(of, serial_ids);
1286
1287 static struct platform_driver sprd_platform_driver = {
1288 .probe = sprd_probe,
1289 .remove = sprd_remove,
1290 .driver = {
1291 .name = "sprd_serial",
1292 .of_match_table = serial_ids,
1293 .pm = &sprd_pm_ops,
1294 },
1295 };
1296
1297 module_platform_driver(sprd_platform_driver);
1298
1299 MODULE_LICENSE("GPL v2");
1300 MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");
1301