1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
9
10 #include "sfdp.h"
11
12 #define SPI_NOR_MAX_ID_LEN 6
13 /*
14 * 256 bytes is a sane default for most older flashes. Newer flashes will
15 * have the page size defined within their SFDP tables.
16 */
17 #define SPI_NOR_DEFAULT_PAGE_SIZE 256
18 #define SPI_NOR_DEFAULT_N_BANKS 1
19 #define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K
20
21 /* Standard SPI NOR flash operations. */
22 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \
23 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \
24 SPI_MEM_OP_ADDR(naddr, 0, 0), \
25 SPI_MEM_OP_DUMMY(ndummy, 0), \
26 SPI_MEM_OP_DATA_IN(len, buf, 0))
27
28 #define SPI_NOR_WREN_OP \
29 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \
30 SPI_MEM_OP_NO_ADDR, \
31 SPI_MEM_OP_NO_DUMMY, \
32 SPI_MEM_OP_NO_DATA)
33
34 #define SPI_NOR_WRDI_OP \
35 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \
36 SPI_MEM_OP_NO_ADDR, \
37 SPI_MEM_OP_NO_DUMMY, \
38 SPI_MEM_OP_NO_DATA)
39
40 #define SPI_NOR_RDSR_OP(buf) \
41 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \
42 SPI_MEM_OP_NO_ADDR, \
43 SPI_MEM_OP_NO_DUMMY, \
44 SPI_MEM_OP_DATA_IN(1, buf, 0))
45
46 #define SPI_NOR_WRSR_OP(buf, len) \
47 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \
48 SPI_MEM_OP_NO_ADDR, \
49 SPI_MEM_OP_NO_DUMMY, \
50 SPI_MEM_OP_DATA_OUT(len, buf, 0))
51
52 #define SPI_NOR_RDSR2_OP(buf) \
53 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \
54 SPI_MEM_OP_NO_ADDR, \
55 SPI_MEM_OP_NO_DUMMY, \
56 SPI_MEM_OP_DATA_OUT(1, buf, 0))
57
58 #define SPI_NOR_WRSR2_OP(buf) \
59 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \
60 SPI_MEM_OP_NO_ADDR, \
61 SPI_MEM_OP_NO_DUMMY, \
62 SPI_MEM_OP_DATA_OUT(1, buf, 0))
63
64 #define SPI_NOR_RDCR_OP(buf) \
65 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \
66 SPI_MEM_OP_NO_ADDR, \
67 SPI_MEM_OP_NO_DUMMY, \
68 SPI_MEM_OP_DATA_IN(1, buf, 0))
69
70 #define SPI_NOR_EN4B_EX4B_OP(enable) \
71 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \
72 SPI_MEM_OP_NO_ADDR, \
73 SPI_MEM_OP_NO_DUMMY, \
74 SPI_MEM_OP_NO_DATA)
75
76 #define SPI_NOR_BRWR_OP(buf) \
77 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \
78 SPI_MEM_OP_NO_ADDR, \
79 SPI_MEM_OP_NO_DUMMY, \
80 SPI_MEM_OP_DATA_OUT(1, buf, 0))
81
82 #define SPI_NOR_GBULK_OP \
83 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \
84 SPI_MEM_OP_NO_ADDR, \
85 SPI_MEM_OP_NO_DUMMY, \
86 SPI_MEM_OP_NO_DATA)
87
88 #define SPI_NOR_DIE_ERASE_OP(opcode, addr_nbytes, addr, dice) \
89 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
90 SPI_MEM_OP_ADDR(dice ? addr_nbytes : 0, addr, 0), \
91 SPI_MEM_OP_NO_DUMMY, \
92 SPI_MEM_OP_NO_DATA)
93
94 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \
95 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
96 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \
97 SPI_MEM_OP_NO_DUMMY, \
98 SPI_MEM_OP_NO_DATA)
99
100 #define SPI_NOR_READ_OP(opcode) \
101 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
102 SPI_MEM_OP_ADDR(3, 0, 0), \
103 SPI_MEM_OP_DUMMY(1, 0), \
104 SPI_MEM_OP_DATA_IN(2, NULL, 0))
105
106 #define SPI_NOR_PP_OP(opcode) \
107 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \
108 SPI_MEM_OP_ADDR(3, 0, 0), \
109 SPI_MEM_OP_NO_DUMMY, \
110 SPI_MEM_OP_DATA_OUT(2, NULL, 0))
111
112 #define SPINOR_SRSTEN_OP \
113 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \
114 SPI_MEM_OP_NO_DUMMY, \
115 SPI_MEM_OP_NO_ADDR, \
116 SPI_MEM_OP_NO_DATA)
117
118 #define SPINOR_SRST_OP \
119 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \
120 SPI_MEM_OP_NO_DUMMY, \
121 SPI_MEM_OP_NO_ADDR, \
122 SPI_MEM_OP_NO_DATA)
123
124 /* Keep these in sync with the list in debugfs.c */
125 enum spi_nor_option_flags {
126 SNOR_F_HAS_SR_TB = BIT(0),
127 SNOR_F_NO_OP_CHIP_ERASE = BIT(1),
128 SNOR_F_BROKEN_RESET = BIT(2),
129 SNOR_F_4B_OPCODES = BIT(3),
130 SNOR_F_HAS_4BAIT = BIT(4),
131 SNOR_F_HAS_LOCK = BIT(5),
132 SNOR_F_HAS_16BIT_SR = BIT(6),
133 SNOR_F_NO_READ_CR = BIT(7),
134 SNOR_F_HAS_SR_TB_BIT6 = BIT(8),
135 SNOR_F_HAS_4BIT_BP = BIT(9),
136 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10),
137 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
138 SNOR_F_SOFT_RESET = BIT(12),
139 SNOR_F_SWP_IS_VOLATILE = BIT(13),
140 SNOR_F_RWW = BIT(14),
141 SNOR_F_ECC = BIT(15),
142 SNOR_F_NO_WP = BIT(16),
143 SNOR_F_SWAP16 = BIT(17),
144 };
145
146 struct spi_nor_read_command {
147 u8 num_mode_clocks;
148 u8 num_wait_states;
149 u8 opcode;
150 enum spi_nor_protocol proto;
151 };
152
153 struct spi_nor_pp_command {
154 u8 opcode;
155 enum spi_nor_protocol proto;
156 };
157
158 enum spi_nor_read_command_index {
159 SNOR_CMD_READ,
160 SNOR_CMD_READ_FAST,
161 SNOR_CMD_READ_1_1_1_DTR,
162
163 /* Dual SPI */
164 SNOR_CMD_READ_1_1_2,
165 SNOR_CMD_READ_1_2_2,
166 SNOR_CMD_READ_2_2_2,
167 SNOR_CMD_READ_1_2_2_DTR,
168
169 /* Quad SPI */
170 SNOR_CMD_READ_1_1_4,
171 SNOR_CMD_READ_1_4_4,
172 SNOR_CMD_READ_4_4_4,
173 SNOR_CMD_READ_1_4_4_DTR,
174
175 /* Octal SPI */
176 SNOR_CMD_READ_1_1_8,
177 SNOR_CMD_READ_1_8_8,
178 SNOR_CMD_READ_8_8_8,
179 SNOR_CMD_READ_1_8_8_DTR,
180 SNOR_CMD_READ_8_8_8_DTR,
181
182 SNOR_CMD_READ_MAX
183 };
184
185 enum spi_nor_pp_command_index {
186 SNOR_CMD_PP,
187
188 /* Quad SPI */
189 SNOR_CMD_PP_1_1_4,
190 SNOR_CMD_PP_1_4_4,
191 SNOR_CMD_PP_4_4_4,
192
193 /* Octal SPI */
194 SNOR_CMD_PP_1_1_8,
195 SNOR_CMD_PP_1_8_8,
196 SNOR_CMD_PP_8_8_8,
197 SNOR_CMD_PP_8_8_8_DTR,
198
199 SNOR_CMD_PP_MAX
200 };
201
202 /**
203 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
204 * @size: the size of the sector/block erased by the erase type.
205 * JEDEC JESD216B imposes erase sizes to be a power of 2.
206 * @size_shift: @size is a power of 2, the shift is stored in
207 * @size_shift.
208 * @size_mask: the size mask based on @size_shift.
209 * @opcode: the SPI command op code to erase the sector/block.
210 * @idx: Erase Type index as sorted in the Basic Flash Parameter
211 * Table. It will be used to synchronize the supported
212 * Erase Types with the ones identified in the SFDP
213 * optional tables.
214 */
215 struct spi_nor_erase_type {
216 u32 size;
217 u32 size_shift;
218 u32 size_mask;
219 u8 opcode;
220 u8 idx;
221 };
222
223 /**
224 * struct spi_nor_erase_command - Used for non-uniform erases
225 * The structure is used to describe a list of erase commands to be executed
226 * once we validate that the erase can be performed. The elements in the list
227 * are run-length encoded.
228 * @list: for inclusion into the list of erase commands.
229 * @count: how many times the same erase command should be
230 * consecutively used.
231 * @size: the size of the sector/block erased by the command.
232 * @opcode: the SPI command op code to erase the sector/block.
233 */
234 struct spi_nor_erase_command {
235 struct list_head list;
236 u32 count;
237 u32 size;
238 u8 opcode;
239 };
240
241 /**
242 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
243 * @offset: the offset in the data array of erase region start.
244 * @size: the size of the region in bytes.
245 * @erase_mask: bitmask to indicate all the supported erase commands
246 * inside this region. The erase types are sorted in
247 * ascending order with the smallest Erase Type size being
248 * at BIT(0).
249 * @overlaid: determine if this region is overlaid.
250 */
251 struct spi_nor_erase_region {
252 u64 offset;
253 u64 size;
254 u8 erase_mask;
255 bool overlaid;
256 };
257
258 #define SNOR_ERASE_TYPE_MAX 4
259
260 /**
261 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
262 * @regions: array of erase regions. The regions are consecutive in
263 * address space. Walking through the regions is done
264 * incrementally.
265 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
266 * sector size (legacy implementation).
267 * @erase_type: an array of erase types shared by all the regions.
268 * The erase types are sorted in ascending order, with the
269 * smallest Erase Type size being the first member in the
270 * erase_type array.
271 * @n_regions: number of erase regions.
272 */
273 struct spi_nor_erase_map {
274 struct spi_nor_erase_region *regions;
275 struct spi_nor_erase_region uniform_region;
276 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
277 unsigned int n_regions;
278 };
279
280 /**
281 * struct spi_nor_locking_ops - SPI NOR locking methods
282 * @lock: lock a region of the SPI NOR.
283 * @unlock: unlock a region of the SPI NOR.
284 * @is_locked: check if a region of the SPI NOR is completely locked
285 */
286 struct spi_nor_locking_ops {
287 int (*lock)(struct spi_nor *nor, loff_t ofs, u64 len);
288 int (*unlock)(struct spi_nor *nor, loff_t ofs, u64 len);
289 int (*is_locked)(struct spi_nor *nor, loff_t ofs, u64 len);
290 };
291
292 /**
293 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
294 * @len: size of one OTP region in bytes.
295 * @base: start address of the OTP area.
296 * @offset: offset between consecutive OTP regions if there are more
297 * than one.
298 * @n_regions: number of individual OTP regions.
299 */
300 struct spi_nor_otp_organization {
301 size_t len;
302 loff_t base;
303 loff_t offset;
304 unsigned int n_regions;
305 };
306
307 /**
308 * struct spi_nor_otp_ops - SPI NOR OTP methods
309 * @read: read from the SPI NOR OTP area.
310 * @write: write to the SPI NOR OTP area.
311 * @lock: lock an OTP region.
312 * @erase: erase an OTP region.
313 * @is_locked: check if an OTP region of the SPI NOR is locked.
314 */
315 struct spi_nor_otp_ops {
316 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
317 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
318 const u8 *buf);
319 int (*lock)(struct spi_nor *nor, unsigned int region);
320 int (*erase)(struct spi_nor *nor, loff_t addr);
321 int (*is_locked)(struct spi_nor *nor, unsigned int region);
322 };
323
324 /**
325 * struct spi_nor_otp - SPI NOR OTP grouping structure
326 * @org: OTP region organization
327 * @ops: OTP access ops
328 */
329 struct spi_nor_otp {
330 const struct spi_nor_otp_organization *org;
331 const struct spi_nor_otp_ops *ops;
332 };
333
334 /**
335 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
336 * Includes legacy flash parameters and settings that can be overwritten
337 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
338 * Serial Flash Discoverable Parameters (SFDP) tables.
339 *
340 * @bank_size: the flash memory bank density in bytes.
341 * @size: the total flash memory density in bytes.
342 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
343 * ECC unit size for ECC-ed flashes.
344 * @page_size: the page size of the SPI NOR flash memory.
345 * @addr_nbytes: number of address bytes to send.
346 * @addr_mode_nbytes: number of address bytes of current address mode. Useful
347 * when the flash operates with 4B opcodes but needs the
348 * internal address mode for opcodes that don't have a 4B
349 * opcode correspondent.
350 * @rdsr_dummy: dummy cycles needed for Read Status Register command
351 * in octal DTR mode.
352 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
353 * command in octal DTR mode.
354 * @n_banks: number of banks.
355 * @n_dice: number of dice in the flash memory.
356 * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE.
357 * @vreg_offset: volatile register offset for each die.
358 * @hwcaps: describes the read and page program hardware
359 * capabilities.
360 * @reads: read capabilities ordered by priority: the higher index
361 * in the array, the higher priority.
362 * @page_programs: page program capabilities ordered by priority: the
363 * higher index in the array, the higher priority.
364 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
365 * Table.
366 * @otp: SPI NOR OTP info.
367 * @set_octal_dtr: enables or disables SPI NOR octal DTR mode.
368 * @quad_enable: enables SPI NOR quad mode.
369 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
370 * @ready: (optional) flashes might use a different mechanism
371 * than reading the status register to indicate they
372 * are ready for a new command
373 * @locking_ops: SPI NOR locking methods.
374 * @priv: flash's private data.
375 */
376 struct spi_nor_flash_parameter {
377 u64 bank_size;
378 u64 size;
379 u32 writesize;
380 u32 page_size;
381 u8 addr_nbytes;
382 u8 addr_mode_nbytes;
383 u8 rdsr_dummy;
384 u8 rdsr_addr_nbytes;
385 u8 n_banks;
386 u8 n_dice;
387 u8 die_erase_opcode;
388 u32 *vreg_offset;
389
390 struct spi_nor_hwcaps hwcaps;
391 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
392 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
393
394 struct spi_nor_erase_map erase_map;
395 struct spi_nor_otp otp;
396
397 int (*set_octal_dtr)(struct spi_nor *nor, bool enable);
398 int (*quad_enable)(struct spi_nor *nor);
399 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
400 int (*ready)(struct spi_nor *nor);
401
402 const struct spi_nor_locking_ops *locking_ops;
403 void *priv;
404 };
405
406 /**
407 * struct spi_nor_fixups - SPI NOR fixup hooks
408 * @default_init: called after default flash parameters init. Used to tweak
409 * flash parameters when information provided by the flash_info
410 * table is incomplete or wrong.
411 * @post_bfpt: called after the BFPT table has been parsed
412 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
413 * that do not support RDSFDP). Typically used to tweak various
414 * parameters that could not be extracted by other means (i.e.
415 * when information provided by the SFDP/flash_info tables are
416 * incomplete or wrong).
417 * @late_init: used to initialize flash parameters that are not declared in the
418 * JESD216 SFDP standard, or where SFDP tables not defined at all.
419 * Will replace the default_init() hook.
420 *
421 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
422 * table is broken or not available.
423 */
424 struct spi_nor_fixups {
425 void (*default_init)(struct spi_nor *nor);
426 int (*post_bfpt)(struct spi_nor *nor,
427 const struct sfdp_parameter_header *bfpt_header,
428 const struct sfdp_bfpt *bfpt);
429 int (*post_sfdp)(struct spi_nor *nor);
430 int (*late_init)(struct spi_nor *nor);
431 };
432
433 /**
434 * struct spi_nor_id - SPI NOR flash ID.
435 *
436 * @bytes: the bytes returned by the flash when issuing command 9F. Typically,
437 * the first byte is the manufacturer ID code (see JEP106) and the next
438 * two bytes are a flash part specific ID.
439 * @len: the number of bytes of ID.
440 */
441 struct spi_nor_id {
442 const u8 *bytes;
443 u8 len;
444 };
445
446 /**
447 * struct flash_info - SPI NOR flash_info entry.
448 * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly
449 * older chips).
450 * @name: (obsolete) the name of the flash. Do not set it for new additions.
451 * @size: the size of the flash in bytes.
452 * @sector_size: (optional) the size listed here is what works with
453 * SPINOR_OP_SE, which isn't necessarily called a "sector" by
454 * the vendor. Defaults to 64k.
455 * @n_banks: (optional) the number of banks. Defaults to 1.
456 * @page_size: (optional) the flash's page size. Defaults to 256.
457 * @addr_nbytes: number of address bytes to send.
458 *
459 * @flags: flags that indicate support that is not defined by the
460 * JESD216 standard in its SFDP tables. Flag meanings:
461 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR
462 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be
463 * used with SPI_NOR_HAS_LOCK.
464 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register.
465 * Must be used with SPI_NOR_HAS_TB.
466 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block
467 * protection.
468 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with
469 * SPI_NOR_4BIT_BP.
470 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
471 * Usually these will power-up in a write-protected
472 * state.
473 * SPI_NOR_NO_ERASE: no erase command needed.
474 * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program.
475 * SPI_NOR_RWW: flash supports reads while write.
476 *
477 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
478 * Used when SFDP tables are not defined in the flash. These
479 * flags are used together with the SPI_NOR_SKIP_SFDP flag.
480 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables.
481 * SECT_4K: SPINOR_OP_BE_4K works uniformly.
482 * SPI_NOR_DUAL_READ: flash supports Dual Read.
483 * SPI_NOR_QUAD_READ: flash supports Quad Read.
484 * SPI_NOR_OCTAL_READ: flash supports Octal Read.
485 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
486 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
487 *
488 * @fixup_flags: flags that indicate support that can be discovered via SFDP
489 * ideally, but can not be discovered for this particular flash
490 * because the SFDP table that indicates this support is not
491 * defined by the flash. In case the table for this support is
492 * defined but has wrong values, one should instead use a
493 * post_sfdp() hook to set the SNOR_F equivalent flag.
494 *
495 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support
496 * memory size above 128Mib.
497 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
498 * via a volatile bit.
499 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup
500 * hooks to differentiate support between flashes of the same
501 * manufacturer.
502 * @otp_org: flash's OTP organization.
503 * @fixups: part specific fixup hooks.
504 */
505 struct flash_info {
506 char *name;
507 const struct spi_nor_id *id;
508 size_t size;
509 unsigned sector_size;
510 u16 page_size;
511 u8 n_banks;
512 u8 addr_nbytes;
513
514 u16 flags;
515 #define SPI_NOR_HAS_LOCK BIT(0)
516 #define SPI_NOR_HAS_TB BIT(1)
517 #define SPI_NOR_TB_SR_BIT6 BIT(2)
518 #define SPI_NOR_4BIT_BP BIT(3)
519 #define SPI_NOR_BP3_SR_BIT6 BIT(4)
520 #define SPI_NOR_SWP_IS_VOLATILE BIT(5)
521 #define SPI_NOR_NO_ERASE BIT(6)
522 #define SPI_NOR_QUAD_PP BIT(8)
523 #define SPI_NOR_RWW BIT(9)
524
525 u8 no_sfdp_flags;
526 #define SPI_NOR_SKIP_SFDP BIT(0)
527 #define SECT_4K BIT(1)
528 #define SPI_NOR_DUAL_READ BIT(3)
529 #define SPI_NOR_QUAD_READ BIT(4)
530 #define SPI_NOR_OCTAL_READ BIT(5)
531 #define SPI_NOR_OCTAL_DTR_READ BIT(6)
532 #define SPI_NOR_OCTAL_DTR_PP BIT(7)
533
534 u8 fixup_flags;
535 #define SPI_NOR_4B_OPCODES BIT(0)
536 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
537
538 u8 mfr_flags;
539
540 const struct spi_nor_otp_organization *otp;
541 const struct spi_nor_fixups *fixups;
542 };
543
544 #define SNOR_ID(...) \
545 (&(const struct spi_nor_id){ \
546 .bytes = (const u8[]){ __VA_ARGS__ }, \
547 .len = sizeof((u8[]){ __VA_ARGS__ }), \
548 })
549
550 #define SNOR_OTP(_len, _n_regions, _base, _offset) \
551 (&(const struct spi_nor_otp_organization){ \
552 .len = (_len), \
553 .base = (_base), \
554 .offset = (_offset), \
555 .n_regions = (_n_regions), \
556 })
557
558 /**
559 * struct spi_nor_manufacturer - SPI NOR manufacturer object
560 * @name: manufacturer name
561 * @parts: array of parts supported by this manufacturer
562 * @nparts: number of entries in the parts array
563 * @fixups: hooks called at various points in time during spi_nor_scan()
564 */
565 struct spi_nor_manufacturer {
566 const char *name;
567 const struct flash_info *parts;
568 unsigned int nparts;
569 const struct spi_nor_fixups *fixups;
570 };
571
572 /**
573 * struct sfdp - SFDP data
574 * @num_dwords: number of entries in the dwords array
575 * @dwords: array of double words of the SFDP data
576 */
577 struct sfdp {
578 size_t num_dwords;
579 u32 *dwords;
580 };
581
582 /* Manufacturer drivers. */
583 extern const struct spi_nor_manufacturer spi_nor_atmel;
584 extern const struct spi_nor_manufacturer spi_nor_eon;
585 extern const struct spi_nor_manufacturer spi_nor_esmt;
586 extern const struct spi_nor_manufacturer spi_nor_everspin;
587 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
588 extern const struct spi_nor_manufacturer spi_nor_intel;
589 extern const struct spi_nor_manufacturer spi_nor_issi;
590 extern const struct spi_nor_manufacturer spi_nor_macronix;
591 extern const struct spi_nor_manufacturer spi_nor_micron;
592 extern const struct spi_nor_manufacturer spi_nor_st;
593 extern const struct spi_nor_manufacturer spi_nor_spansion;
594 extern const struct spi_nor_manufacturer spi_nor_sst;
595 extern const struct spi_nor_manufacturer spi_nor_winbond;
596 extern const struct spi_nor_manufacturer spi_nor_xmc;
597
598 extern const struct attribute_group *spi_nor_sysfs_groups[];
599
600 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
601 struct spi_mem_op *op,
602 const enum spi_nor_protocol proto);
603 int spi_nor_write_enable(struct spi_nor *nor);
604 int spi_nor_write_disable(struct spi_nor *nor);
605 int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable);
606 int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor,
607 bool enable);
608 int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable);
609 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
610 int spi_nor_wait_till_ready(struct spi_nor *nor);
611 int spi_nor_global_block_unlock(struct spi_nor *nor);
612 int spi_nor_prep_and_lock(struct spi_nor *nor);
613 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
614 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
615 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
616 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
617 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
618 enum spi_nor_protocol reg_proto);
619 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
620 int spi_nor_sr_ready(struct spi_nor *nor);
621 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
622 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
623 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
624 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
625
626 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
627 u8 *buf);
628 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
629 const u8 *buf);
630 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
631 enum spi_nor_protocol proto);
632 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
633 enum spi_nor_protocol proto);
634 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
635
636 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
637 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
638 const u8 *buf);
639 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
640 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
641 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
642
643 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
644 int spi_nor_hwcaps_pp2cmd(u32 hwcaps);
645 u8 spi_nor_convert_3to4_read(u8 opcode);
646 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
647 u8 num_mode_clocks,
648 u8 num_wait_states,
649 u8 opcode,
650 enum spi_nor_protocol proto);
651 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
652 enum spi_nor_protocol proto);
653
654 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
655 u8 opcode);
656 void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase);
657 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
658 u8 erase_mask, u64 flash_size);
659
660 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
661 const struct sfdp_parameter_header *bfpt_header,
662 const struct sfdp_bfpt *bfpt);
663
664 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
665 void spi_nor_try_unlock_all(struct spi_nor *nor);
666 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
667 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
668
669 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
670 u8 *buf, size_t len);
671 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
672 const u8 *buf, size_t len);
673
674 int spi_nor_check_sfdp_signature(struct spi_nor *nor);
675 int spi_nor_parse_sfdp(struct spi_nor *nor);
676
mtd_to_spi_nor(struct mtd_info * mtd)677 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
678 {
679 return container_of(mtd, struct spi_nor, mtd);
680 }
681
682 /**
683 * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this flash.
684 *
685 * Return: true if SFDP parsing is needed
686 */
spi_nor_needs_sfdp(const struct spi_nor * nor)687 static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor)
688 {
689 /*
690 * The flash size is one property parsed by the SFDP. We use it as an
691 * indicator whether we need SFDP parsing for a particular flash. I.e.
692 * non-legacy flash entries in flash_info will have a size of zero iff
693 * SFDP should be used.
694 */
695 return !nor->info->size;
696 }
697
698 #ifdef CONFIG_DEBUG_FS
699 void spi_nor_debugfs_register(struct spi_nor *nor);
700 void spi_nor_debugfs_shutdown(void);
701 #else
spi_nor_debugfs_register(struct spi_nor * nor)702 static inline void spi_nor_debugfs_register(struct spi_nor *nor) {}
spi_nor_debugfs_shutdown(void)703 static inline void spi_nor_debugfs_shutdown(void) {}
704 #endif
705
706 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */
707