xref: /linux/arch/mips/include/asm/txx9/smsc_fdc37m81x.h (revision e5451c8f8330e03ad3cfa16048b4daf961af434f)
1 /*
2  * Interface for smsc fdc48m81x Super IO chip
3  *
4  * Author: MontaVista Software, Inc. source@mvista.com
5  *
6  * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
7  * the terms of the GNU General Public License version 2. This program
8  * is licensed "as is" without any warranty of any kind, whether express
9  * or implied.
10  *
11  * Copyright (C) 2004 MontaVista Software Inc.
12  * Manish Lachwani, mlachwani@mvista.com
13  */
14 
15 #ifndef _SMSC_FDC37M81X_H_
16 #define _SMSC_FDC37M81X_H_
17 
18 /* Common Registers */
19 #define SMSC_FDC37M81X_CONFIG_INDEX  0x00
20 #define SMSC_FDC37M81X_CONFIG_DATA   0x01
21 #define SMSC_FDC37M81X_CONF	     0x02
22 #define SMSC_FDC37M81X_INDEX	     0x03
23 #define SMSC_FDC37M81X_DNUM	     0x07
24 #define SMSC_FDC37M81X_DID	     0x20
25 #define SMSC_FDC37M81X_DREV	     0x21
26 #define SMSC_FDC37M81X_PCNT	     0x22
27 #define SMSC_FDC37M81X_PMGT	     0x23
28 #define SMSC_FDC37M81X_OSC	     0x24
29 #define SMSC_FDC37M81X_CONFPA0	     0x26
30 #define SMSC_FDC37M81X_CONFPA1	     0x27
31 #define SMSC_FDC37M81X_TEST4	     0x2B
32 #define SMSC_FDC37M81X_TEST5	     0x2C
33 #define SMSC_FDC37M81X_TEST1	     0x2D
34 #define SMSC_FDC37M81X_TEST2	     0x2E
35 #define SMSC_FDC37M81X_TEST3	     0x2F
36 
37 /* Logical device numbers */
38 #define SMSC_FDC37M81X_FDD	     0x00
39 #define SMSC_FDC37M81X_PARALLEL	     0x03
40 #define SMSC_FDC37M81X_SERIAL1	     0x04
41 #define SMSC_FDC37M81X_SERIAL2	     0x05
42 #define SMSC_FDC37M81X_KBD	     0x07
43 #define SMSC_FDC37M81X_AUXIO	     0x08
44 #define SMSC_FDC37M81X_NONE	     0xff
45 
46 /* Logical device Config Registers */
47 #define SMSC_FDC37M81X_ACTIVE	     0x30
48 #define SMSC_FDC37M81X_BASEADDR0     0x60
49 #define SMSC_FDC37M81X_BASEADDR1     0x61
50 #define SMSC_FDC37M81X_INT	     0x70
51 #define SMSC_FDC37M81X_INT2	     0x72
52 #define SMSC_FDC37M81X_LDCR_F0	     0xF0
53 
54 /* Chip Config Values */
55 #define SMSC_FDC37M81X_CONFIG_ENTER  0x55
56 #define SMSC_FDC37M81X_CONFIG_EXIT   0xaa
57 #define SMSC_FDC37M81X_CHIP_ID	     0x4d
58 
59 unsigned long smsc_fdc37m81x_init(unsigned long port);
60 
61 void smsc_fdc37m81x_config_beg(void);
62 
63 void smsc_fdc37m81x_config_end(void);
64 
65 u8 smsc_fdc37m81x_config_get(u8 reg);
66 void smsc_fdc37m81x_config_set(u8 reg, u8 val);
67 
68 #endif
69