1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2017-2019, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/soc/qcom/socinfo.h>
15 #include <linux/string.h>
16 #include <linux/stringify.h>
17 #include <linux/sys_soc.h>
18 #include <linux/types.h>
19
20 #include <linux/unaligned.h>
21
22 #include <dt-bindings/arm/qcom,ids.h>
23
24 /* Helper macros to create soc_id table */
25 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
26 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
27
28 #ifdef CONFIG_DEBUG_FS
29 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
30 #define SMEM_IMAGE_VERSION_SIZE 4096
31 #define SMEM_IMAGE_VERSION_NAME_SIZE 75
32 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
33 #define SMEM_IMAGE_VERSION_OEM_SIZE 32
34
35 /*
36 * SMEM Image table indices
37 */
38 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0
39 #define SMEM_IMAGE_TABLE_TZ_INDEX 1
40 #define SMEM_IMAGE_TABLE_RPM_INDEX 3
41 #define SMEM_IMAGE_TABLE_APPS_INDEX 10
42 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11
43 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12
44 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13
45 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
46 #define SMEM_IMAGE_TABLE_DSPS_INDEX 15
47 #define SMEM_IMAGE_TABLE_CDSP_INDEX 16
48 #define SMEM_IMAGE_TABLE_CDSP1_INDEX 19
49 #define SMEM_IMAGE_TABLE_GPDSP_INDEX 20
50 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX 21
51 #define SMEM_IMAGE_VERSION_TABLE 469
52
53 /*
54 * SMEM Image table names
55 */
56 static const char *const socinfo_image_names[] = {
57 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
58 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
59 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
60 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
61 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
62 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
63 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
64 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
65 [SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps",
66 [SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp",
67 [SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1",
68 [SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp",
69 [SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1",
70 };
71
72 static const char *const pmic_models[] = {
73 [0] = "Unknown PMIC model",
74 [1] = "PM8941",
75 [2] = "PM8841",
76 [3] = "PM8019",
77 [4] = "PM8226",
78 [5] = "PM8110",
79 [6] = "PMA8084",
80 [7] = "PMI8962",
81 [8] = "PMD9635",
82 [9] = "PM8994",
83 [10] = "PMI8994",
84 [11] = "PM8916",
85 [12] = "PM8004",
86 [13] = "PM8909/PM8058",
87 [14] = "PM8028",
88 [15] = "PM8901",
89 [16] = "PM8950/PM8027",
90 [17] = "PMI8950/ISL9519",
91 [18] = "PMK8001/PM8921",
92 [19] = "PMI8996/PM8018",
93 [20] = "PM8998/PM8015",
94 [21] = "PMI8998/PM8014",
95 [22] = "PM8821",
96 [23] = "PM8038",
97 [24] = "PM8005/PM8922",
98 [25] = "PM8917/PM8937",
99 [26] = "PM660L",
100 [27] = "PM660",
101 [30] = "PM8150",
102 [31] = "PM8150L",
103 [32] = "PM8150B",
104 [33] = "PMK8002",
105 [36] = "PM8009",
106 [37] = "PMI632",
107 [38] = "PM8150C",
108 [40] = "PM6150",
109 [41] = "SMB2351",
110 [44] = "PM8008",
111 [45] = "PM6125",
112 [46] = "PM7250B",
113 [47] = "PMK8350",
114 [48] = "PM8350",
115 [49] = "PM8350C",
116 [50] = "PM8350B",
117 [51] = "PMR735A",
118 [52] = "PMR735B",
119 [54] = "PM6350",
120 [55] = "PM4125",
121 [58] = "PM8450",
122 [65] = "PM8010",
123 [69] = "PM8550VS",
124 [70] = "PM8550VE",
125 [71] = "PM8550B",
126 [72] = "PMR735D",
127 [73] = "PM8550",
128 [74] = "PMK8550",
129 [82] = "PMC8380",
130 [83] = "SMB2360",
131 };
132
133 struct socinfo_params {
134 u32 raw_device_family;
135 u32 hw_plat_subtype;
136 u32 accessory_chip;
137 u32 raw_device_num;
138 u32 chip_family;
139 u32 foundry_id;
140 u32 plat_ver;
141 u32 raw_ver;
142 u32 hw_plat;
143 u32 fmt;
144 u32 nproduct_id;
145 u32 num_clusters;
146 u32 ncluster_array_offset;
147 u32 num_subset_parts;
148 u32 nsubset_parts_array_offset;
149 u32 nmodem_supported;
150 u32 feature_code;
151 u32 pcode;
152 u32 oem_variant;
153 u32 num_func_clusters;
154 u32 boot_cluster;
155 u32 boot_core;
156 };
157
158 struct smem_image_version {
159 char name[SMEM_IMAGE_VERSION_NAME_SIZE];
160 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
161 char pad;
162 char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
163 };
164 #endif /* CONFIG_DEBUG_FS */
165
166 struct qcom_socinfo {
167 struct soc_device *soc_dev;
168 struct soc_device_attribute attr;
169 #ifdef CONFIG_DEBUG_FS
170 struct dentry *dbg_root;
171 struct socinfo_params info;
172 #endif /* CONFIG_DEBUG_FS */
173 };
174
175 struct soc_id {
176 unsigned int id;
177 const char *name;
178 };
179
180 static const struct soc_id soc_id[] = {
181 { qcom_board_id(MSM8260) },
182 { qcom_board_id(MSM8660) },
183 { qcom_board_id(APQ8060) },
184 { qcom_board_id(MSM8960) },
185 { qcom_board_id(APQ8064) },
186 { qcom_board_id(MSM8930) },
187 { qcom_board_id(MSM8630) },
188 { qcom_board_id(MSM8230) },
189 { qcom_board_id(APQ8030) },
190 { qcom_board_id(MSM8627) },
191 { qcom_board_id(MSM8227) },
192 { qcom_board_id(MSM8660A) },
193 { qcom_board_id(MSM8260A) },
194 { qcom_board_id(APQ8060A) },
195 { qcom_board_id(MSM8974) },
196 { qcom_board_id(MSM8225) },
197 { qcom_board_id(MSM8625) },
198 { qcom_board_id(MPQ8064) },
199 { qcom_board_id(MSM8960AB) },
200 { qcom_board_id(APQ8060AB) },
201 { qcom_board_id(MSM8260AB) },
202 { qcom_board_id(MSM8660AB) },
203 { qcom_board_id(MSM8930AA) },
204 { qcom_board_id(MSM8630AA) },
205 { qcom_board_id(MSM8230AA) },
206 { qcom_board_id(MSM8626) },
207 { qcom_board_id(MSM8610) },
208 { qcom_board_id(APQ8064AB) },
209 { qcom_board_id(MSM8930AB) },
210 { qcom_board_id(MSM8630AB) },
211 { qcom_board_id(MSM8230AB) },
212 { qcom_board_id(APQ8030AB) },
213 { qcom_board_id(MSM8226) },
214 { qcom_board_id(MSM8526) },
215 { qcom_board_id(APQ8030AA) },
216 { qcom_board_id(MSM8110) },
217 { qcom_board_id(MSM8210) },
218 { qcom_board_id(MSM8810) },
219 { qcom_board_id(MSM8212) },
220 { qcom_board_id(MSM8612) },
221 { qcom_board_id(MSM8112) },
222 { qcom_board_id(MSM8125) },
223 { qcom_board_id(MSM8225Q) },
224 { qcom_board_id(MSM8625Q) },
225 { qcom_board_id(MSM8125Q) },
226 { qcom_board_id(APQ8064AA) },
227 { qcom_board_id(APQ8084) },
228 { qcom_board_id(MSM8130) },
229 { qcom_board_id(MSM8130AA) },
230 { qcom_board_id(MSM8130AB) },
231 { qcom_board_id(MSM8627AA) },
232 { qcom_board_id(MSM8227AA) },
233 { qcom_board_id(APQ8074) },
234 { qcom_board_id(MSM8274) },
235 { qcom_board_id(MSM8674) },
236 { qcom_board_id(MDM9635) },
237 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") },
238 { qcom_board_id(MSM8126) },
239 { qcom_board_id(APQ8026) },
240 { qcom_board_id(MSM8926) },
241 { qcom_board_id(IPQ8062) },
242 { qcom_board_id(IPQ8064) },
243 { qcom_board_id(IPQ8066) },
244 { qcom_board_id(IPQ8068) },
245 { qcom_board_id(MSM8326) },
246 { qcom_board_id(MSM8916) },
247 { qcom_board_id(MSM8994) },
248 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") },
249 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") },
250 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") },
251 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") },
252 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") },
253 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") },
254 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") },
255 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") },
256 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") },
257 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") },
258 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") },
259 { qcom_board_id(APQ8028) },
260 { qcom_board_id(MSM8128) },
261 { qcom_board_id(MSM8228) },
262 { qcom_board_id(MSM8528) },
263 { qcom_board_id(MSM8628) },
264 { qcom_board_id(MSM8928) },
265 { qcom_board_id(MSM8510) },
266 { qcom_board_id(MSM8512) },
267 { qcom_board_id(MSM8936) },
268 { qcom_board_id(MDM9640) },
269 { qcom_board_id(MSM8939) },
270 { qcom_board_id(APQ8036) },
271 { qcom_board_id(APQ8039) },
272 { qcom_board_id(MSM8236) },
273 { qcom_board_id(MSM8636) },
274 { qcom_board_id(MSM8909) },
275 { qcom_board_id(MSM8996) },
276 { qcom_board_id(APQ8016) },
277 { qcom_board_id(MSM8216) },
278 { qcom_board_id(MSM8116) },
279 { qcom_board_id(MSM8616) },
280 { qcom_board_id(MSM8992) },
281 { qcom_board_id(APQ8092) },
282 { qcom_board_id(APQ8094) },
283 { qcom_board_id(MSM8209) },
284 { qcom_board_id(MSM8208) },
285 { qcom_board_id(MDM9209) },
286 { qcom_board_id(MDM9309) },
287 { qcom_board_id(MDM9609) },
288 { qcom_board_id(MSM8239) },
289 { qcom_board_id(MSM8952) },
290 { qcom_board_id(APQ8009) },
291 { qcom_board_id(MSM8956) },
292 { qcom_board_id(MSM8929) },
293 { qcom_board_id(MSM8629) },
294 { qcom_board_id(MSM8229) },
295 { qcom_board_id(APQ8029) },
296 { qcom_board_id(APQ8056) },
297 { qcom_board_id(MSM8609) },
298 { qcom_board_id(APQ8076) },
299 { qcom_board_id(MSM8976) },
300 { qcom_board_id(IPQ8065) },
301 { qcom_board_id(IPQ8069) },
302 { qcom_board_id(MDM9650) },
303 { qcom_board_id(MDM9655) },
304 { qcom_board_id(MDM9250) },
305 { qcom_board_id(MDM9255) },
306 { qcom_board_id(MDM9350) },
307 { qcom_board_id(APQ8052) },
308 { qcom_board_id(MDM9607) },
309 { qcom_board_id(APQ8096) },
310 { qcom_board_id(MSM8998) },
311 { qcom_board_id(MSM8953) },
312 { qcom_board_id(MSM8937) },
313 { qcom_board_id(APQ8037) },
314 { qcom_board_id(MDM8207) },
315 { qcom_board_id(MDM9207) },
316 { qcom_board_id(MDM9307) },
317 { qcom_board_id(MDM9628) },
318 { qcom_board_id(MSM8909W) },
319 { qcom_board_id(APQ8009W) },
320 { qcom_board_id(MSM8996L) },
321 { qcom_board_id(MSM8917) },
322 { qcom_board_id(APQ8053) },
323 { qcom_board_id(MSM8996SG) },
324 { qcom_board_id(APQ8017) },
325 { qcom_board_id(MSM8217) },
326 { qcom_board_id(MSM8617) },
327 { qcom_board_id(MSM8996AU) },
328 { qcom_board_id(APQ8096AU) },
329 { qcom_board_id(APQ8096SG) },
330 { qcom_board_id(MSM8940) },
331 { qcom_board_id(SDX201) },
332 { qcom_board_id(SDM660) },
333 { qcom_board_id(SDM630) },
334 { qcom_board_id(APQ8098) },
335 { qcom_board_id(MSM8920) },
336 { qcom_board_id(SDM845) },
337 { qcom_board_id(MDM9206) },
338 { qcom_board_id(IPQ8074) },
339 { qcom_board_id(SDA660) },
340 { qcom_board_id(SDM658) },
341 { qcom_board_id(SDA658) },
342 { qcom_board_id(SDA630) },
343 { qcom_board_id(MSM8905) },
344 { qcom_board_id(SDX202) },
345 { qcom_board_id(SDM670) },
346 { qcom_board_id(SDM450) },
347 { qcom_board_id(SM8150) },
348 { qcom_board_id(SDA845) },
349 { qcom_board_id(IPQ8072) },
350 { qcom_board_id(IPQ8076) },
351 { qcom_board_id(IPQ8078) },
352 { qcom_board_id(SDM636) },
353 { qcom_board_id(SDA636) },
354 { qcom_board_id(SDM632) },
355 { qcom_board_id(SDA632) },
356 { qcom_board_id(SDA450) },
357 { qcom_board_id(SDM439) },
358 { qcom_board_id(SDM429) },
359 { qcom_board_id(SM8250) },
360 { qcom_board_id(SA8155) },
361 { qcom_board_id(SDA439) },
362 { qcom_board_id(SDA429) },
363 { qcom_board_id(SM7150) },
364 { qcom_board_id(SM7150P) },
365 { qcom_board_id(IPQ8070) },
366 { qcom_board_id(IPQ8071) },
367 { qcom_board_id(QM215) },
368 { qcom_board_id(IPQ8072A) },
369 { qcom_board_id(IPQ8074A) },
370 { qcom_board_id(IPQ8076A) },
371 { qcom_board_id(IPQ8078A) },
372 { qcom_board_id(SM6125) },
373 { qcom_board_id(IPQ8070A) },
374 { qcom_board_id(IPQ8071A) },
375 { qcom_board_id(IPQ8172) },
376 { qcom_board_id(IPQ8173) },
377 { qcom_board_id(IPQ8174) },
378 { qcom_board_id(IPQ6018) },
379 { qcom_board_id(IPQ6028) },
380 { qcom_board_id(SDM429W) },
381 { qcom_board_id(SM4250) },
382 { qcom_board_id(IPQ6000) },
383 { qcom_board_id(IPQ6010) },
384 { qcom_board_id(SC7180) },
385 { qcom_board_id(SM6350) },
386 { qcom_board_id(QCM2150) },
387 { qcom_board_id(SDA429W) },
388 { qcom_board_id(SM8350) },
389 { qcom_board_id(QCM2290) },
390 { qcom_board_id(SM7125) },
391 { qcom_board_id(SM6115) },
392 { qcom_board_id(IPQ5010) },
393 { qcom_board_id(IPQ5018) },
394 { qcom_board_id(IPQ5028) },
395 { qcom_board_id(SC8280XP) },
396 { qcom_board_id(IPQ6005) },
397 { qcom_board_id(QRB5165) },
398 { qcom_board_id(SM8450) },
399 { qcom_board_id(SM7225) },
400 { qcom_board_id(SA8295P) },
401 { qcom_board_id(SA8540P) },
402 { qcom_board_id(QCM4290) },
403 { qcom_board_id(QCS4290) },
404 { qcom_board_id(SM7325) },
405 { qcom_board_id_named(SM8450_2, "SM8450") },
406 { qcom_board_id_named(SM8450_3, "SM8450") },
407 { qcom_board_id(SC7280) },
408 { qcom_board_id(SC7180P) },
409 { qcom_board_id(QCM6490) },
410 { qcom_board_id(SM7325P) },
411 { qcom_board_id(IPQ5000) },
412 { qcom_board_id(IPQ0509) },
413 { qcom_board_id(IPQ0518) },
414 { qcom_board_id(SM6375) },
415 { qcom_board_id(IPQ9514) },
416 { qcom_board_id(IPQ9550) },
417 { qcom_board_id(IPQ9554) },
418 { qcom_board_id(IPQ9570) },
419 { qcom_board_id(IPQ9574) },
420 { qcom_board_id(SM8550) },
421 { qcom_board_id(IPQ5016) },
422 { qcom_board_id(IPQ9510) },
423 { qcom_board_id(QRB4210) },
424 { qcom_board_id(QRB2210) },
425 { qcom_board_id(SAR2130P) },
426 { qcom_board_id(SM8475) },
427 { qcom_board_id(SM8475P) },
428 { qcom_board_id(SA8255P) },
429 { qcom_board_id(SA8775P) },
430 { qcom_board_id(QRU1000) },
431 { qcom_board_id(SM8475_2) },
432 { qcom_board_id(QDU1000) },
433 { qcom_board_id(X1E80100) },
434 { qcom_board_id(SM8650) },
435 { qcom_board_id(SM4450) },
436 { qcom_board_id(SAR1130P) },
437 { qcom_board_id(QDU1010) },
438 { qcom_board_id(QRU1032) },
439 { qcom_board_id(QRU1052) },
440 { qcom_board_id(QRU1062) },
441 { qcom_board_id(IPQ5332) },
442 { qcom_board_id(IPQ5322) },
443 { qcom_board_id(IPQ5312) },
444 { qcom_board_id(IPQ5302) },
445 { qcom_board_id(QCS8550) },
446 { qcom_board_id(QCM8550) },
447 { qcom_board_id(IPQ5300) },
448 { qcom_board_id(IPQ5321) },
449 { qcom_board_id(IPQ5424) },
450 { qcom_board_id(IPQ5404) },
451 { qcom_board_id(QCS9100) },
452 { qcom_board_id(QCS8300) },
453 { qcom_board_id(QCS8275) },
454 { qcom_board_id(QCS615) },
455 };
456
socinfo_machine(struct device * dev,unsigned int id)457 static const char *socinfo_machine(struct device *dev, unsigned int id)
458 {
459 int idx;
460
461 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
462 if (soc_id[idx].id == id)
463 return soc_id[idx].name;
464 }
465
466 return NULL;
467 }
468
469 #ifdef CONFIG_DEBUG_FS
470
471 #define QCOM_OPEN(name, _func) \
472 static int qcom_open_##name(struct inode *inode, struct file *file) \
473 { \
474 return single_open(file, _func, inode->i_private); \
475 } \
476 \
477 static const struct file_operations qcom_ ##name## _ops = { \
478 .open = qcom_open_##name, \
479 .read = seq_read, \
480 .llseek = seq_lseek, \
481 .release = single_release, \
482 }
483
484 #define DEBUGFS_ADD(info, name) \
485 debugfs_create_file(__stringify(name), 0444, \
486 qcom_socinfo->dbg_root, \
487 info, &qcom_ ##name## _ops)
488
489
qcom_show_build_id(struct seq_file * seq,void * p)490 static int qcom_show_build_id(struct seq_file *seq, void *p)
491 {
492 struct socinfo *socinfo = seq->private;
493
494 seq_printf(seq, "%s\n", socinfo->build_id);
495
496 return 0;
497 }
498
qcom_show_pmic_model(struct seq_file * seq,void * p)499 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
500 {
501 struct socinfo *socinfo = seq->private;
502 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
503
504 if (model < 0)
505 return -EINVAL;
506
507 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
508 seq_printf(seq, "%s\n", pmic_models[model]);
509 else
510 seq_printf(seq, "unknown (%d)\n", model);
511
512 return 0;
513 }
514
qcom_show_pmic_model_array(struct seq_file * seq,void * p)515 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
516 {
517 struct socinfo *socinfo = seq->private;
518 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
519 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
520 int i;
521 void *ptr = socinfo;
522
523 ptr += pmic_array_offset;
524
525 /* No need for bounds checking, it happened at socinfo_debugfs_init */
526 for (i = 0; i < num_pmics; i++) {
527 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
528 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
529
530 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
531 seq_printf(seq, "%s %u.%u\n", pmic_models[model],
532 SOCINFO_MAJOR(die_rev),
533 SOCINFO_MINOR(die_rev));
534 else
535 seq_printf(seq, "unknown (%d)\n", model);
536 }
537
538 return 0;
539 }
540
qcom_show_pmic_die_revision(struct seq_file * seq,void * p)541 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
542 {
543 struct socinfo *socinfo = seq->private;
544
545 seq_printf(seq, "%u.%u\n",
546 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
547 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
548
549 return 0;
550 }
551
qcom_show_chip_id(struct seq_file * seq,void * p)552 static int qcom_show_chip_id(struct seq_file *seq, void *p)
553 {
554 struct socinfo *socinfo = seq->private;
555
556 seq_printf(seq, "%s\n", socinfo->chip_id);
557
558 return 0;
559 }
560
561 QCOM_OPEN(build_id, qcom_show_build_id);
562 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
563 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
564 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
565 QCOM_OPEN(chip_id, qcom_show_chip_id);
566
567 #define DEFINE_IMAGE_OPS(type) \
568 static int show_image_##type(struct seq_file *seq, void *p) \
569 { \
570 struct smem_image_version *image_version = seq->private; \
571 if (image_version->type[0] != '\0') \
572 seq_printf(seq, "%s\n", image_version->type); \
573 return 0; \
574 } \
575 static int open_image_##type(struct inode *inode, struct file *file) \
576 { \
577 return single_open(file, show_image_##type, inode->i_private); \
578 } \
579 \
580 static const struct file_operations qcom_image_##type##_ops = { \
581 .open = open_image_##type, \
582 .read = seq_read, \
583 .llseek = seq_lseek, \
584 .release = single_release, \
585 }
586
587 DEFINE_IMAGE_OPS(name);
588 DEFINE_IMAGE_OPS(variant);
589 DEFINE_IMAGE_OPS(oem);
590
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)591 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
592 struct socinfo *info, size_t info_size)
593 {
594 struct smem_image_version *versions;
595 struct dentry *dentry;
596 size_t size;
597 int i;
598 unsigned int num_pmics;
599 unsigned int pmic_array_offset;
600
601 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
602
603 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
604
605 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
606 &qcom_socinfo->info.fmt);
607
608 switch (qcom_socinfo->info.fmt) {
609 case SOCINFO_VERSION(0, 19):
610 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters);
611 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster);
612 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core);
613
614 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root,
615 &qcom_socinfo->info.num_func_clusters);
616 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root,
617 &qcom_socinfo->info.boot_cluster);
618 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root,
619 &qcom_socinfo->info.boot_core);
620 fallthrough;
621 case SOCINFO_VERSION(0, 18):
622 case SOCINFO_VERSION(0, 17):
623 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant);
624 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root,
625 &qcom_socinfo->info.oem_variant);
626 fallthrough;
627 case SOCINFO_VERSION(0, 16):
628 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code);
629 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode);
630
631 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root,
632 &qcom_socinfo->info.feature_code);
633 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root,
634 &qcom_socinfo->info.pcode);
635 fallthrough;
636 case SOCINFO_VERSION(0, 15):
637 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
638
639 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
640 &qcom_socinfo->info.nmodem_supported);
641 fallthrough;
642 case SOCINFO_VERSION(0, 14):
643 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
644 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
645 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts);
646 qcom_socinfo->info.nsubset_parts_array_offset =
647 __le32_to_cpu(info->nsubset_parts_array_offset);
648
649 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
650 &qcom_socinfo->info.num_clusters);
651 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
652 &qcom_socinfo->info.ncluster_array_offset);
653 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root,
654 &qcom_socinfo->info.num_subset_parts);
655 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root,
656 &qcom_socinfo->info.nsubset_parts_array_offset);
657 fallthrough;
658 case SOCINFO_VERSION(0, 13):
659 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
660
661 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
662 &qcom_socinfo->info.nproduct_id);
663 DEBUGFS_ADD(info, chip_id);
664 fallthrough;
665 case SOCINFO_VERSION(0, 12):
666 qcom_socinfo->info.chip_family =
667 __le32_to_cpu(info->chip_family);
668 qcom_socinfo->info.raw_device_family =
669 __le32_to_cpu(info->raw_device_family);
670 qcom_socinfo->info.raw_device_num =
671 __le32_to_cpu(info->raw_device_num);
672
673 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
674 &qcom_socinfo->info.chip_family);
675 debugfs_create_x32("raw_device_family", 0444,
676 qcom_socinfo->dbg_root,
677 &qcom_socinfo->info.raw_device_family);
678 debugfs_create_x32("raw_device_number", 0444,
679 qcom_socinfo->dbg_root,
680 &qcom_socinfo->info.raw_device_num);
681 fallthrough;
682 case SOCINFO_VERSION(0, 11):
683 num_pmics = le32_to_cpu(info->num_pmics);
684 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
685 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
686 DEBUGFS_ADD(info, pmic_model_array);
687 fallthrough;
688 case SOCINFO_VERSION(0, 10):
689 case SOCINFO_VERSION(0, 9):
690 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
691
692 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
693 &qcom_socinfo->info.foundry_id);
694 fallthrough;
695 case SOCINFO_VERSION(0, 8):
696 case SOCINFO_VERSION(0, 7):
697 DEBUGFS_ADD(info, pmic_model);
698 DEBUGFS_ADD(info, pmic_die_rev);
699 fallthrough;
700 case SOCINFO_VERSION(0, 6):
701 qcom_socinfo->info.hw_plat_subtype =
702 __le32_to_cpu(info->hw_plat_subtype);
703
704 debugfs_create_u32("hardware_platform_subtype", 0444,
705 qcom_socinfo->dbg_root,
706 &qcom_socinfo->info.hw_plat_subtype);
707 fallthrough;
708 case SOCINFO_VERSION(0, 5):
709 qcom_socinfo->info.accessory_chip =
710 __le32_to_cpu(info->accessory_chip);
711
712 debugfs_create_u32("accessory_chip", 0444,
713 qcom_socinfo->dbg_root,
714 &qcom_socinfo->info.accessory_chip);
715 fallthrough;
716 case SOCINFO_VERSION(0, 4):
717 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
718
719 debugfs_create_u32("platform_version", 0444,
720 qcom_socinfo->dbg_root,
721 &qcom_socinfo->info.plat_ver);
722 fallthrough;
723 case SOCINFO_VERSION(0, 3):
724 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
725
726 debugfs_create_u32("hardware_platform", 0444,
727 qcom_socinfo->dbg_root,
728 &qcom_socinfo->info.hw_plat);
729 fallthrough;
730 case SOCINFO_VERSION(0, 2):
731 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
732
733 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
734 &qcom_socinfo->info.raw_ver);
735 fallthrough;
736 case SOCINFO_VERSION(0, 1):
737 DEBUGFS_ADD(info, build_id);
738 break;
739 }
740
741 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
742 &size);
743
744 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
745 if (!socinfo_image_names[i])
746 continue;
747
748 dentry = debugfs_create_dir(socinfo_image_names[i],
749 qcom_socinfo->dbg_root);
750 debugfs_create_file("name", 0444, dentry, &versions[i],
751 &qcom_image_name_ops);
752 debugfs_create_file("variant", 0444, dentry, &versions[i],
753 &qcom_image_variant_ops);
754 debugfs_create_file("oem", 0444, dentry, &versions[i],
755 &qcom_image_oem_ops);
756 }
757 }
758
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)759 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
760 {
761 debugfs_remove_recursive(qcom_socinfo->dbg_root);
762 }
763 #else
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)764 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
765 struct socinfo *info, size_t info_size)
766 {
767 }
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)768 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
769 #endif /* CONFIG_DEBUG_FS */
770
qcom_socinfo_probe(struct platform_device * pdev)771 static int qcom_socinfo_probe(struct platform_device *pdev)
772 {
773 struct qcom_socinfo *qs;
774 struct socinfo *info;
775 size_t item_size;
776
777 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
778 &item_size);
779 if (IS_ERR(info)) {
780 dev_err(&pdev->dev, "Couldn't find socinfo\n");
781 return PTR_ERR(info);
782 }
783
784 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
785 if (!qs)
786 return -ENOMEM;
787
788 qs->attr.family = "Snapdragon";
789 qs->attr.machine = socinfo_machine(&pdev->dev,
790 le32_to_cpu(info->id));
791 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
792 le32_to_cpu(info->id));
793 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
794 SOCINFO_MAJOR(le32_to_cpu(info->ver)),
795 SOCINFO_MINOR(le32_to_cpu(info->ver)));
796 if (!qs->attr.soc_id || !qs->attr.revision)
797 return -ENOMEM;
798
799 if (offsetof(struct socinfo, serial_num) <= item_size) {
800 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
801 "%u",
802 le32_to_cpu(info->serial_num));
803 if (!qs->attr.serial_number)
804 return -ENOMEM;
805 }
806
807 qs->soc_dev = soc_device_register(&qs->attr);
808 if (IS_ERR(qs->soc_dev))
809 return PTR_ERR(qs->soc_dev);
810
811 socinfo_debugfs_init(qs, info, item_size);
812
813 /* Feed the soc specific unique data into entropy pool */
814 add_device_randomness(info, item_size);
815
816 platform_set_drvdata(pdev, qs);
817
818 return 0;
819 }
820
qcom_socinfo_remove(struct platform_device * pdev)821 static void qcom_socinfo_remove(struct platform_device *pdev)
822 {
823 struct qcom_socinfo *qs = platform_get_drvdata(pdev);
824
825 soc_device_unregister(qs->soc_dev);
826
827 socinfo_debugfs_exit(qs);
828 }
829
830 static struct platform_driver qcom_socinfo_driver = {
831 .probe = qcom_socinfo_probe,
832 .remove = qcom_socinfo_remove,
833 .driver = {
834 .name = "qcom-socinfo",
835 },
836 };
837
838 module_platform_driver(qcom_socinfo_driver);
839
840 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
841 MODULE_LICENSE("GPL v2");
842 MODULE_ALIAS("platform:qcom-socinfo");
843