1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 #ifndef INTERCONNECT_QCOM_IPQ5332_H 3 #define INTERCONNECT_QCOM_IPQ5332_H 4 5 #define MASTER_SNOC_PCIE3_1_M 0 6 #define SLAVE_SNOC_PCIE3_1_M 1 7 #define MASTER_ANOC_PCIE3_1_S 2 8 #define SLAVE_ANOC_PCIE3_1_S 3 9 #define MASTER_SNOC_PCIE3_2_M 4 10 #define SLAVE_SNOC_PCIE3_2_M 5 11 #define MASTER_ANOC_PCIE3_2_S 6 12 #define SLAVE_ANOC_PCIE3_2_S 7 13 #define MASTER_SNOC_USB 8 14 #define SLAVE_SNOC_USB 9 15 #define MASTER_NSSNOC_NSSCC 10 16 #define SLAVE_NSSNOC_NSSCC 11 17 #define MASTER_NSSNOC_SNOC_0 12 18 #define SLAVE_NSSNOC_SNOC_0 13 19 #define MASTER_NSSNOC_SNOC_1 14 20 #define SLAVE_NSSNOC_SNOC_1 15 21 #define MASTER_NSSNOC_ATB 16 22 #define SLAVE_NSSNOC_ATB 17 23 #define MASTER_NSSNOC_PCNOC_1 18 24 #define SLAVE_NSSNOC_PCNOC_1 19 25 #define MASTER_NSSNOC_QOSGEN_REF 20 26 #define SLAVE_NSSNOC_QOSGEN_REF 21 27 #define MASTER_NSSNOC_TIMEOUT_REF 22 28 #define SLAVE_NSSNOC_TIMEOUT_REF 23 29 #define MASTER_NSSNOC_XO_DCD 24 30 #define SLAVE_NSSNOC_XO_DCD 25 31 32 #define MASTER_NSSNOC_PPE 0 33 #define SLAVE_NSSNOC_PPE 1 34 #define MASTER_NSSNOC_PPE_CFG 2 35 #define SLAVE_NSSNOC_PPE_CFG 3 36 #define MASTER_NSSNOC_NSS_CSR 4 37 #define SLAVE_NSSNOC_NSS_CSR 5 38 #define MASTER_NSSNOC_CE_APB 6 39 #define SLAVE_NSSNOC_CE_APB 7 40 #define MASTER_NSSNOC_CE_AXI 8 41 #define SLAVE_NSSNOC_CE_AXI 9 42 43 #define MASTER_CNOC_AHB 0 44 #define SLAVE_CNOC_AHB 1 45 46 #endif /* INTERCONNECT_QCOM_IPQ5332_H */ 47