1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 #ifndef INTERCONNECT_QCOM_IPQ5424_H 3 #define INTERCONNECT_QCOM_IPQ5424_H 4 5 #define MASTER_ANOC_PCIE0 0 6 #define SLAVE_ANOC_PCIE0 1 7 #define MASTER_CNOC_PCIE0 2 8 #define SLAVE_CNOC_PCIE0 3 9 #define MASTER_ANOC_PCIE1 4 10 #define SLAVE_ANOC_PCIE1 5 11 #define MASTER_CNOC_PCIE1 6 12 #define SLAVE_CNOC_PCIE1 7 13 #define MASTER_ANOC_PCIE2 8 14 #define SLAVE_ANOC_PCIE2 9 15 #define MASTER_CNOC_PCIE2 10 16 #define SLAVE_CNOC_PCIE2 11 17 #define MASTER_ANOC_PCIE3 12 18 #define SLAVE_ANOC_PCIE3 13 19 #define MASTER_CNOC_PCIE3 14 20 #define SLAVE_CNOC_PCIE3 15 21 #define MASTER_CNOC_USB 16 22 #define SLAVE_CNOC_USB 17 23 #define MASTER_NSSNOC_NSSCC 18 24 #define SLAVE_NSSNOC_NSSCC 19 25 #define MASTER_NSSNOC_SNOC_0 20 26 #define SLAVE_NSSNOC_SNOC_0 21 27 #define MASTER_NSSNOC_SNOC_1 22 28 #define SLAVE_NSSNOC_SNOC_1 23 29 #define MASTER_NSSNOC_PCNOC_1 24 30 #define SLAVE_NSSNOC_PCNOC_1 25 31 #define MASTER_NSSNOC_QOSGEN_REF 26 32 #define SLAVE_NSSNOC_QOSGEN_REF 27 33 #define MASTER_NSSNOC_TIMEOUT_REF 28 34 #define SLAVE_NSSNOC_TIMEOUT_REF 29 35 #define MASTER_NSSNOC_XO_DCD 30 36 #define SLAVE_NSSNOC_XO_DCD 31 37 #define MASTER_NSSNOC_ATB 32 38 #define SLAVE_NSSNOC_ATB 33 39 #define MASTER_CNOC_LPASS_CFG 34 40 #define SLAVE_CNOC_LPASS_CFG 35 41 #define MASTER_SNOC_LPASS 36 42 #define SLAVE_SNOC_LPASS 37 43 44 #define MASTER_CPU 0 45 #define SLAVE_L3 1 46 47 #define MASTER_NSSNOC_PPE 0 48 #define SLAVE_NSSNOC_PPE 1 49 #define MASTER_NSSNOC_PPE_CFG 2 50 #define SLAVE_NSSNOC_PPE_CFG 3 51 #define MASTER_NSSNOC_NSS_CSR 4 52 #define SLAVE_NSSNOC_NSS_CSR 5 53 #define MASTER_NSSNOC_CE_AXI 6 54 #define SLAVE_NSSNOC_CE_AXI 7 55 #define MASTER_NSSNOC_CE_APB 8 56 #define SLAVE_NSSNOC_CE_APB 9 57 #define MASTER_NSSNOC_EIP 10 58 #define SLAVE_NSSNOC_EIP 11 59 60 #endif /* INTERCONNECT_QCOM_IPQ5424_H */ 61