1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO
4 *
5 * Copyright (C) 2010, 2011 Ericsson AB.
6 * Copyright (C) 2011 Guenter Roeck.
7 * Copyright (C) 2011 - 2021 Xilinx Inc.
8 *
9 * Author: Guenter Roeck <guenter.roeck@ericsson.com>
10 * Sören Brinkmann <soren.brinkmann@xilinx.com>
11 */
12
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/slab.h>
20
21 /* Si570 registers */
22 #define SI570_REG_HS_N1 7
23 #define SI570_REG_N1_RFREQ0 8
24 #define SI570_REG_RFREQ1 9
25 #define SI570_REG_RFREQ2 10
26 #define SI570_REG_RFREQ3 11
27 #define SI570_REG_RFREQ4 12
28 #define SI570_REG_CONTROL 135
29 #define SI570_REG_FREEZE_DCO 137
30 #define SI570_DIV_OFFSET_7PPM 6
31
32 #define HS_DIV_SHIFT 5
33 #define HS_DIV_MASK 0xe0
34 #define HS_DIV_OFFSET 4
35 #define N1_6_2_MASK 0x1f
36 #define N1_1_0_MASK 0xc0
37 #define RFREQ_37_32_MASK 0x3f
38
39 #define SI570_MIN_FREQ 10000000L
40 #define SI570_MAX_FREQ 1417500000L
41 #define SI598_MAX_FREQ 525000000L
42
43 #define FDCO_MIN 4850000000LL
44 #define FDCO_MAX 5670000000LL
45
46 #define SI570_CNTRL_RECALL (1 << 0)
47 #define SI570_CNTRL_FREEZE_M (1 << 5)
48 #define SI570_CNTRL_NEWFREQ (1 << 6)
49
50 #define SI570_FREEZE_DCO (1 << 4)
51
52 /**
53 * struct clk_si570_info:
54 * @max_freq: Maximum frequency for this device
55 * @has_temperature_stability: Device support temperature stability
56 */
57 struct clk_si570_info {
58 u64 max_freq;
59 bool has_temperature_stability;
60 };
61
62 /**
63 * struct clk_si570:
64 * @hw: Clock hw struct
65 * @regmap: Device's regmap
66 * @div_offset: Register offset for dividers
67 * @info: Device info
68 * @fxtal: Factory xtal frequency
69 * @n1: Clock divider N1
70 * @hs_div: Clock divider HSDIV
71 * @rfreq: Clock multiplier RFREQ
72 * @frequency: Current output frequency
73 * @i2c_client: I2C client pointer
74 */
75 struct clk_si570 {
76 struct clk_hw hw;
77 struct regmap *regmap;
78 unsigned int div_offset;
79 const struct clk_si570_info *info;
80 u64 fxtal;
81 unsigned int n1;
82 unsigned int hs_div;
83 u64 rfreq;
84 u64 frequency;
85 struct i2c_client *i2c_client;
86 };
87 #define to_clk_si570(_hw) container_of(_hw, struct clk_si570, hw)
88
89 /**
90 * si570_get_divs() - Read clock dividers from HW
91 * @data: Pointer to struct clk_si570
92 * @rfreq: Fractional multiplier (output)
93 * @n1: Divider N1 (output)
94 * @hs_div: Divider HSDIV (output)
95 * Returns 0 on success, negative errno otherwise.
96 *
97 * Retrieve clock dividers and multipliers from the HW.
98 */
si570_get_divs(struct clk_si570 * data,u64 * rfreq,unsigned int * n1,unsigned int * hs_div)99 static int si570_get_divs(struct clk_si570 *data, u64 *rfreq,
100 unsigned int *n1, unsigned int *hs_div)
101 {
102 int err;
103 u8 reg[6];
104 u64 tmp;
105
106 err = regmap_bulk_read(data->regmap, SI570_REG_HS_N1 + data->div_offset,
107 reg, ARRAY_SIZE(reg));
108 if (err)
109 return err;
110
111 *hs_div = ((reg[0] & HS_DIV_MASK) >> HS_DIV_SHIFT) + HS_DIV_OFFSET;
112 *n1 = ((reg[0] & N1_6_2_MASK) << 2) + ((reg[1] & N1_1_0_MASK) >> 6) + 1;
113 /* Handle invalid cases */
114 if (*n1 > 1)
115 *n1 &= ~1;
116
117 tmp = reg[1] & RFREQ_37_32_MASK;
118 tmp = (tmp << 8) + reg[2];
119 tmp = (tmp << 8) + reg[3];
120 tmp = (tmp << 8) + reg[4];
121 tmp = (tmp << 8) + reg[5];
122 *rfreq = tmp;
123
124 return 0;
125 }
126
127 /**
128 * si570_get_defaults() - Get default values
129 * @data: Driver data structure
130 * @fout: Factory frequency output
131 * @skip_recall: If true, don't recall NVM into RAM
132 * Returns 0 on success, negative errno otherwise.
133 */
si570_get_defaults(struct clk_si570 * data,u64 fout,bool skip_recall)134 static int si570_get_defaults(struct clk_si570 *data, u64 fout,
135 bool skip_recall)
136 {
137 int err;
138 u64 fdco;
139
140 if (!skip_recall)
141 regmap_write(data->regmap, SI570_REG_CONTROL,
142 SI570_CNTRL_RECALL);
143
144 err = si570_get_divs(data, &data->rfreq, &data->n1, &data->hs_div);
145 if (err)
146 return err;
147
148 /*
149 * Accept optional precision loss to avoid arithmetic overflows.
150 * Acceptable per Silicon Labs Application Note AN334.
151 */
152 fdco = fout * data->n1 * data->hs_div;
153 if (fdco >= (1LL << 36))
154 data->fxtal = div64_u64(fdco << 24, data->rfreq >> 4);
155 else
156 data->fxtal = div64_u64(fdco << 28, data->rfreq);
157
158 data->frequency = fout;
159
160 return 0;
161 }
162
163 /**
164 * si570_update_rfreq() - Update clock multiplier
165 * @data: Driver data structure
166 * Passes on regmap_bulk_write() return value.
167 */
si570_update_rfreq(struct clk_si570 * data)168 static int si570_update_rfreq(struct clk_si570 *data)
169 {
170 u8 reg[5];
171
172 reg[0] = ((data->n1 - 1) << 6) |
173 ((data->rfreq >> 32) & RFREQ_37_32_MASK);
174 reg[1] = (data->rfreq >> 24) & 0xff;
175 reg[2] = (data->rfreq >> 16) & 0xff;
176 reg[3] = (data->rfreq >> 8) & 0xff;
177 reg[4] = data->rfreq & 0xff;
178
179 return regmap_bulk_write(data->regmap, SI570_REG_N1_RFREQ0 +
180 data->div_offset, reg, ARRAY_SIZE(reg));
181 }
182
183 /**
184 * si570_calc_divs() - Calculate clock dividers
185 * @frequency: Target frequency
186 * @data: Driver data structure
187 * @out_rfreq: RFREG fractional multiplier (output)
188 * @out_n1: Clock divider N1 (output)
189 * @out_hs_div: Clock divider HSDIV (output)
190 * Returns 0 on success, negative errno otherwise.
191 *
192 * Calculate the clock dividers (@out_hs_div, @out_n1) and clock multiplier
193 * (@out_rfreq) for a given target @frequency.
194 */
si570_calc_divs(unsigned long frequency,struct clk_si570 * data,u64 * out_rfreq,unsigned int * out_n1,unsigned int * out_hs_div)195 static int si570_calc_divs(unsigned long frequency, struct clk_si570 *data,
196 u64 *out_rfreq, unsigned int *out_n1, unsigned int *out_hs_div)
197 {
198 int i;
199 unsigned int n1, hs_div;
200 u64 fdco, best_fdco = ULLONG_MAX;
201 static const uint8_t si570_hs_div_values[] = { 11, 9, 7, 6, 5, 4 };
202
203 for (i = 0; i < ARRAY_SIZE(si570_hs_div_values); i++) {
204 hs_div = si570_hs_div_values[i];
205 /* Calculate lowest possible value for n1 */
206 n1 = div_u64(div_u64(FDCO_MIN, hs_div), frequency);
207 if (!n1 || (n1 & 1))
208 n1++;
209 while (n1 <= 128) {
210 fdco = (u64)frequency * (u64)hs_div * (u64)n1;
211 if (fdco > FDCO_MAX)
212 break;
213 if (fdco >= FDCO_MIN && fdco < best_fdco) {
214 *out_n1 = n1;
215 *out_hs_div = hs_div;
216 *out_rfreq = div64_u64(fdco << 28, data->fxtal);
217 best_fdco = fdco;
218 }
219 n1 += (n1 == 1 ? 1 : 2);
220 }
221 }
222
223 if (best_fdco == ULLONG_MAX)
224 return -EINVAL;
225
226 return 0;
227 }
228
si570_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)229 static unsigned long si570_recalc_rate(struct clk_hw *hw,
230 unsigned long parent_rate)
231 {
232 int err;
233 u64 rfreq, rate;
234 unsigned int n1, hs_div;
235 struct clk_si570 *data = to_clk_si570(hw);
236
237 err = si570_get_divs(data, &rfreq, &n1, &hs_div);
238 if (err) {
239 dev_err(&data->i2c_client->dev, "unable to recalc rate\n");
240 return data->frequency;
241 }
242
243 rfreq = div_u64(rfreq, hs_div * n1);
244 rate = (data->fxtal * rfreq) >> 28;
245
246 return rate;
247 }
248
si570_determine_rate(struct clk_hw * hw,struct clk_rate_request * req)249 static int si570_determine_rate(struct clk_hw *hw,
250 struct clk_rate_request *req)
251 {
252 int err;
253 u64 rfreq;
254 unsigned int n1, hs_div;
255 struct clk_si570 *data = to_clk_si570(hw);
256
257 if (!req->rate) {
258 req->rate = 0;
259
260 return 0;
261 }
262
263 if (div64_u64(abs(req->rate - data->frequency) * 10000LL,
264 data->frequency) < 35) {
265 rfreq = div64_u64((data->rfreq * req->rate) +
266 div64_u64(data->frequency, 2),
267 data->frequency);
268 n1 = data->n1;
269 hs_div = data->hs_div;
270
271 } else {
272 err = si570_calc_divs(req->rate, data, &rfreq, &n1, &hs_div);
273 if (err) {
274 dev_err(&data->i2c_client->dev,
275 "unable to round rate\n");
276 req->rate = 0;
277
278 return 0;
279 }
280 }
281
282 return 0;
283 }
284
285 /**
286 * si570_set_frequency() - Adjust output frequency
287 * @data: Driver data structure
288 * @frequency: Target frequency
289 * Returns 0 on success.
290 *
291 * Update output frequency for big frequency changes (> 3,500 ppm).
292 */
si570_set_frequency(struct clk_si570 * data,unsigned long frequency)293 static int si570_set_frequency(struct clk_si570 *data, unsigned long frequency)
294 {
295 int err;
296
297 err = si570_calc_divs(frequency, data, &data->rfreq, &data->n1,
298 &data->hs_div);
299 if (err)
300 return err;
301
302 /*
303 * The DCO reg should be accessed with a read-modify-write operation
304 * per AN334
305 */
306 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, SI570_FREEZE_DCO);
307 regmap_write(data->regmap, SI570_REG_HS_N1 + data->div_offset,
308 ((data->hs_div - HS_DIV_OFFSET) << HS_DIV_SHIFT) |
309 (((data->n1 - 1) >> 2) & N1_6_2_MASK));
310 si570_update_rfreq(data);
311 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, 0);
312 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_NEWFREQ);
313
314 /* Applying a new frequency can take up to 10ms */
315 usleep_range(10000, 12000);
316
317 return 0;
318 }
319
320 /**
321 * si570_set_frequency_small() - Adjust output frequency
322 * @data: Driver data structure
323 * @frequency: Target frequency
324 * Returns 0 on success.
325 *
326 * Update output frequency for small frequency changes (< 3,500 ppm).
327 */
si570_set_frequency_small(struct clk_si570 * data,unsigned long frequency)328 static int si570_set_frequency_small(struct clk_si570 *data,
329 unsigned long frequency)
330 {
331 /*
332 * This is a re-implementation of DIV_ROUND_CLOSEST
333 * using the div64_u64 function lieu of letting the compiler
334 * insert EABI calls
335 */
336 data->rfreq = div64_u64((data->rfreq * frequency) +
337 div_u64(data->frequency, 2), data->frequency);
338 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_FREEZE_M);
339 si570_update_rfreq(data);
340 regmap_write(data->regmap, SI570_REG_CONTROL, 0);
341
342 /* Applying a new frequency (small change) can take up to 100us */
343 usleep_range(100, 200);
344
345 return 0;
346 }
347
si570_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)348 static int si570_set_rate(struct clk_hw *hw, unsigned long rate,
349 unsigned long parent_rate)
350 {
351 struct clk_si570 *data = to_clk_si570(hw);
352 struct i2c_client *client = data->i2c_client;
353 int err;
354
355 if (rate < SI570_MIN_FREQ || rate > data->info->max_freq) {
356 dev_err(&client->dev,
357 "requested frequency %lu Hz is out of range\n", rate);
358 return -EINVAL;
359 }
360
361 if (div64_u64(abs(rate - data->frequency) * 10000LL,
362 data->frequency) < 35)
363 err = si570_set_frequency_small(data, rate);
364 else
365 err = si570_set_frequency(data, rate);
366
367 if (err)
368 return err;
369
370 data->frequency = rate;
371
372 return 0;
373 }
374
375 static const struct clk_ops si570_clk_ops = {
376 .recalc_rate = si570_recalc_rate,
377 .determine_rate = si570_determine_rate,
378 .set_rate = si570_set_rate,
379 };
380
si570_regmap_is_volatile(struct device * dev,unsigned int reg)381 static bool si570_regmap_is_volatile(struct device *dev, unsigned int reg)
382 {
383 switch (reg) {
384 case SI570_REG_CONTROL:
385 return true;
386 default:
387 return false;
388 }
389 }
390
si570_regmap_is_writeable(struct device * dev,unsigned int reg)391 static bool si570_regmap_is_writeable(struct device *dev, unsigned int reg)
392 {
393 switch (reg) {
394 case SI570_REG_HS_N1 ... (SI570_REG_RFREQ4 + SI570_DIV_OFFSET_7PPM):
395 case SI570_REG_CONTROL:
396 case SI570_REG_FREEZE_DCO:
397 return true;
398 default:
399 return false;
400 }
401 }
402
403 static const struct regmap_config si570_regmap_config = {
404 .reg_bits = 8,
405 .val_bits = 8,
406 .cache_type = REGCACHE_MAPLE,
407 .max_register = 137,
408 .writeable_reg = si570_regmap_is_writeable,
409 .volatile_reg = si570_regmap_is_volatile,
410 };
411
si570_probe(struct i2c_client * client)412 static int si570_probe(struct i2c_client *client)
413 {
414 struct clk_si570 *data;
415 struct clk_init_data init;
416 u32 initial_fout, factory_fout, stability;
417 bool skip_recall;
418 int err;
419
420 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
421 if (!data)
422 return -ENOMEM;
423
424 init.ops = &si570_clk_ops;
425 init.flags = 0;
426 init.num_parents = 0;
427 data->hw.init = &init;
428 data->i2c_client = client;
429
430 data->info = i2c_get_match_data(client);
431 if (data->info->has_temperature_stability) {
432 err = of_property_read_u32(client->dev.of_node,
433 "temperature-stability", &stability);
434 if (err) {
435 dev_err(&client->dev,
436 "'temperature-stability' property missing\n");
437 return err;
438 }
439 /* adjust register offsets for 7ppm devices */
440 if (stability == 7)
441 data->div_offset = SI570_DIV_OFFSET_7PPM;
442 }
443
444 if (of_property_read_string(client->dev.of_node, "clock-output-names",
445 &init.name))
446 init.name = client->dev.of_node->name;
447
448 err = of_property_read_u32(client->dev.of_node, "factory-fout",
449 &factory_fout);
450 if (err) {
451 dev_err(&client->dev, "'factory-fout' property missing\n");
452 return err;
453 }
454
455 skip_recall = of_property_read_bool(client->dev.of_node,
456 "silabs,skip-recall");
457
458 data->regmap = devm_regmap_init_i2c(client, &si570_regmap_config);
459 if (IS_ERR(data->regmap)) {
460 dev_err(&client->dev, "failed to allocate register map\n");
461 return PTR_ERR(data->regmap);
462 }
463
464 i2c_set_clientdata(client, data);
465 err = si570_get_defaults(data, factory_fout, skip_recall);
466 if (err)
467 return err;
468
469 err = devm_clk_hw_register(&client->dev, &data->hw);
470 if (err) {
471 dev_err(&client->dev, "clock registration failed\n");
472 return err;
473 }
474 err = devm_of_clk_add_hw_provider(&client->dev, of_clk_hw_simple_get,
475 &data->hw);
476 if (err) {
477 dev_err(&client->dev, "unable to add clk provider\n");
478 return err;
479 }
480
481 /* Read the requested initial output frequency from device tree */
482 if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
483 &initial_fout)) {
484 err = clk_set_rate(data->hw.clk, initial_fout);
485 if (err)
486 return err;
487 }
488
489 /* Display a message indicating that we've successfully registered */
490 dev_info(&client->dev, "registered, current frequency %llu Hz\n",
491 data->frequency);
492
493 return 0;
494 }
495
496 static const struct clk_si570_info clk_si570_info = {
497 .max_freq = SI570_MAX_FREQ,
498 .has_temperature_stability = true,
499 };
500
501 static const struct clk_si570_info clk_si590_info = {
502 .max_freq = SI598_MAX_FREQ,
503 };
504
505 static const struct i2c_device_id si570_id[] = {
506 { "si570", (kernel_ulong_t)&clk_si570_info },
507 { "si571", (kernel_ulong_t)&clk_si570_info },
508 { "si598", (kernel_ulong_t)&clk_si590_info },
509 { "si599", (kernel_ulong_t)&clk_si590_info },
510 { }
511 };
512 MODULE_DEVICE_TABLE(i2c, si570_id);
513
514 static const struct of_device_id clk_si570_of_match[] = {
515 { .compatible = "silabs,si570", .data = &clk_si570_info },
516 { .compatible = "silabs,si571", .data = &clk_si570_info },
517 { .compatible = "silabs,si598", .data = &clk_si590_info },
518 { .compatible = "silabs,si599", .data = &clk_si590_info },
519 { }
520 };
521 MODULE_DEVICE_TABLE(of, clk_si570_of_match);
522
523 static struct i2c_driver si570_driver = {
524 .driver = {
525 .name = "si570",
526 .of_match_table = clk_si570_of_match,
527 },
528 .probe = si570_probe,
529 .id_table = si570_id,
530 };
531 module_i2c_driver(si570_driver);
532
533 MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
534 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
535 MODULE_DESCRIPTION("Si570 driver");
536 MODULE_LICENSE("GPL");
537