xref: /linux/include/dt-bindings/power/qcom,rpmhpd.h (revision cf38b2340c0e60ef695b7137440a4d187ed49c88)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
4  */
5 
6 #ifndef _DT_BINDINGS_POWER_QCOM_RPMHPD_H
7 #define _DT_BINDINGS_POWER_QCOM_RPMHPD_H
8 
9 /* Generic RPMH Power Domain Indexes */
10 #define RPMHPD_CX               0
11 #define RPMHPD_CX_AO		1
12 #define RPMHPD_EBI		2
13 #define RPMHPD_GFX		3
14 #define RPMHPD_LCX		4
15 #define RPMHPD_LMX		5
16 #define RPMHPD_MMCX		6
17 #define RPMHPD_MMCX_AO		7
18 #define RPMHPD_MX		8
19 #define RPMHPD_MX_AO		9
20 #define RPMHPD_MXC		10
21 #define RPMHPD_MXC_AO		11
22 #define RPMHPD_MSS              12
23 #define RPMHPD_NSP		13
24 #define RPMHPD_NSP0             14
25 #define RPMHPD_NSP1             15
26 #define RPMHPD_QPHY             16
27 #define RPMHPD_DDR              17
28 #define RPMHPD_XO               18
29 #define RPMHPD_NSP2             19
30 #define RPMHPD_GMXC		20
31 
32 /* RPMh Power Domain performance levels */
33 #define RPMH_REGULATOR_LEVEL_RETENTION		16
34 #define RPMH_REGULATOR_LEVEL_MIN_SVS		48
35 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D3		50
36 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2_1	51
37 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2		52
38 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1_1	54
39 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1		56
40 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0		60
41 #define RPMH_REGULATOR_LEVEL_LOW_SVS		64
42 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1		72
43 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L0		76
44 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1		80
45 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2		96
46 #define RPMH_REGULATOR_LEVEL_SVS		128
47 #define RPMH_REGULATOR_LEVEL_SVS_L0		144
48 #define RPMH_REGULATOR_LEVEL_SVS_L1		192
49 #define RPMH_REGULATOR_LEVEL_SVS_L2		224
50 #define RPMH_REGULATOR_LEVEL_NOM		256
51 #define RPMH_REGULATOR_LEVEL_NOM_L0		288
52 #define RPMH_REGULATOR_LEVEL_NOM_L1		320
53 #define RPMH_REGULATOR_LEVEL_NOM_L2		336
54 #define RPMH_REGULATOR_LEVEL_TURBO		384
55 #define RPMH_REGULATOR_LEVEL_TURBO_L0		400
56 #define RPMH_REGULATOR_LEVEL_TURBO_L1		416
57 #define RPMH_REGULATOR_LEVEL_TURBO_L2		432
58 #define RPMH_REGULATOR_LEVEL_TURBO_L3		448
59 #define RPMH_REGULATOR_LEVEL_TURBO_L4		452
60 #define RPMH_REGULATOR_LEVEL_TURBO_L5		456
61 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO	464
62 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR	480
63 
64 /*
65  * Platform-specific power domain bindings. Don't add new entries here, use
66  * RPMHPD_* above.
67  */
68 
69 /* SA8775P Power Domain Indexes */
70 #define SA8775P_CX	0
71 #define SA8775P_CX_AO	1
72 #define SA8775P_DDR	2
73 #define SA8775P_EBI	3
74 #define SA8775P_GFX	4
75 #define SA8775P_LCX	5
76 #define SA8775P_LMX	6
77 #define SA8775P_MMCX	7
78 #define SA8775P_MMCX_AO	8
79 #define SA8775P_MSS	9
80 #define SA8775P_MX	10
81 #define SA8775P_MX_AO	11
82 #define SA8775P_MXC	12
83 #define SA8775P_MXC_AO	13
84 #define SA8775P_NSP0	14
85 #define SA8775P_NSP1	15
86 #define SA8775P_XO	16
87 
88 /* SDM670 Power Domain Indexes */
89 #define SDM670_MX	0
90 #define SDM670_MX_AO	1
91 #define SDM670_CX	2
92 #define SDM670_CX_AO	3
93 #define SDM670_LMX	4
94 #define SDM670_LCX	5
95 #define SDM670_GFX	6
96 #define SDM670_MSS	7
97 
98 /* SDM845 Power Domain Indexes */
99 #define SDM845_EBI	0
100 #define SDM845_MX	1
101 #define SDM845_MX_AO	2
102 #define SDM845_CX	3
103 #define SDM845_CX_AO	4
104 #define SDM845_LMX	5
105 #define SDM845_LCX	6
106 #define SDM845_GFX	7
107 #define SDM845_MSS	8
108 
109 /* SDX55 Power Domain Indexes */
110 #define SDX55_MSS	0
111 #define SDX55_MX	1
112 #define SDX55_CX	2
113 
114 /* SDX65 Power Domain Indexes */
115 #define SDX65_MSS	0
116 #define SDX65_MX	1
117 #define SDX65_MX_AO	2
118 #define SDX65_CX	3
119 #define SDX65_CX_AO	4
120 #define SDX65_MXC	5
121 
122 /* SM6350 Power Domain Indexes */
123 #define SM6350_CX	0
124 #define SM6350_GFX	1
125 #define SM6350_LCX	2
126 #define SM6350_LMX	3
127 #define SM6350_MSS	4
128 #define SM6350_MX	5
129 
130 /* SM8150 Power Domain Indexes */
131 #define SM8150_MSS	0
132 #define SM8150_EBI	1
133 #define SM8150_LMX	2
134 #define SM8150_LCX	3
135 #define SM8150_GFX	4
136 #define SM8150_MX	5
137 #define SM8150_MX_AO	6
138 #define SM8150_CX	7
139 #define SM8150_CX_AO	8
140 #define SM8150_MMCX	9
141 #define SM8150_MMCX_AO	10
142 
143 /* SA8155P is a special case, kept for backwards compatibility */
144 #define SA8155P_CX	SM8150_CX
145 #define SA8155P_CX_AO	SM8150_CX_AO
146 #define SA8155P_EBI	SM8150_EBI
147 #define SA8155P_GFX	SM8150_GFX
148 #define SA8155P_MSS	SM8150_MSS
149 #define SA8155P_MX	SM8150_MX
150 #define SA8155P_MX_AO	SM8150_MX_AO
151 
152 /* SM8250 Power Domain Indexes */
153 #define SM8250_CX	0
154 #define SM8250_CX_AO	1
155 #define SM8250_EBI	2
156 #define SM8250_GFX	3
157 #define SM8250_LCX	4
158 #define SM8250_LMX	5
159 #define SM8250_MMCX	6
160 #define SM8250_MMCX_AO	7
161 #define SM8250_MX	8
162 #define SM8250_MX_AO	9
163 
164 /* SM8350 Power Domain Indexes */
165 #define SM8350_CX	0
166 #define SM8350_CX_AO	1
167 #define SM8350_EBI	2
168 #define SM8350_GFX	3
169 #define SM8350_LCX	4
170 #define SM8350_LMX	5
171 #define SM8350_MMCX	6
172 #define SM8350_MMCX_AO	7
173 #define SM8350_MX	8
174 #define SM8350_MX_AO	9
175 #define SM8350_MXC	10
176 #define SM8350_MXC_AO	11
177 #define SM8350_MSS	12
178 
179 /* SM8450 Power Domain Indexes */
180 #define SM8450_CX	0
181 #define SM8450_CX_AO	1
182 #define SM8450_EBI	2
183 #define SM8450_GFX	3
184 #define SM8450_LCX	4
185 #define SM8450_LMX	5
186 #define SM8450_MMCX	6
187 #define SM8450_MMCX_AO	7
188 #define SM8450_MX	8
189 #define SM8450_MX_AO	9
190 #define SM8450_MXC	10
191 #define SM8450_MXC_AO	11
192 #define SM8450_MSS	12
193 
194 /* SM8550 Power Domain Indexes */
195 #define SM8550_CX	0
196 #define SM8550_CX_AO	1
197 #define SM8550_EBI	2
198 #define SM8550_GFX	3
199 #define SM8550_LCX	4
200 #define SM8550_LMX	5
201 #define SM8550_MMCX	6
202 #define SM8550_MMCX_AO	7
203 #define SM8550_MX	8
204 #define SM8550_MX_AO	9
205 #define SM8550_MXC	10
206 #define SM8550_MXC_AO	11
207 #define SM8550_MSS	12
208 #define SM8550_NSP	13
209 
210 /* QDU1000/QRU1000 Power Domain Indexes */
211 #define QDU1000_EBI	0
212 #define QDU1000_MSS	1
213 #define QDU1000_CX	2
214 #define QDU1000_MX	3
215 
216 /* SC7180 Power Domain Indexes */
217 #define SC7180_CX	0
218 #define SC7180_CX_AO	1
219 #define SC7180_GFX	2
220 #define SC7180_MX	3
221 #define SC7180_MX_AO	4
222 #define SC7180_LMX	5
223 #define SC7180_LCX	6
224 #define SC7180_MSS	7
225 
226 /* SC7280 Power Domain Indexes */
227 #define SC7280_CX	0
228 #define SC7280_CX_AO	1
229 #define SC7280_EBI	2
230 #define SC7280_GFX	3
231 #define SC7280_MX	4
232 #define SC7280_MX_AO	5
233 #define SC7280_LMX	6
234 #define SC7280_LCX	7
235 #define SC7280_MSS	8
236 
237 /* SC8180X Power Domain Indexes */
238 #define SC8180X_CX	0
239 #define SC8180X_CX_AO	1
240 #define SC8180X_EBI	2
241 #define SC8180X_GFX	3
242 #define SC8180X_LCX	4
243 #define SC8180X_LMX	5
244 #define SC8180X_MMCX	6
245 #define SC8180X_MMCX_AO	7
246 #define SC8180X_MSS	8
247 #define SC8180X_MX	9
248 #define SC8180X_MX_AO	10
249 
250 /* SC8280XP Power Domain Indexes */
251 #define SC8280XP_CX		0
252 #define SC8280XP_CX_AO		1
253 #define SC8280XP_DDR		2
254 #define SC8280XP_EBI		3
255 #define SC8280XP_GFX		4
256 #define SC8280XP_LCX		5
257 #define SC8280XP_LMX		6
258 #define SC8280XP_MMCX		7
259 #define SC8280XP_MMCX_AO	8
260 #define SC8280XP_MSS		9
261 #define SC8280XP_MX		10
262 #define SC8280XP_MXC		12
263 #define SC8280XP_MX_AO		11
264 #define SC8280XP_NSP		13
265 #define SC8280XP_QPHY		14
266 #define SC8280XP_XO		15
267 #define SC8280XP_MXC_AO		16
268 
269 #endif
270