| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | BPF.cpp | 40 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), 64); in classifyArgumentType() local
|
| H A D | PPC.cpp | 881 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits); in classifyArgumentType() local
|
| /freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | BoolAssignmentChecker.cpp | 67 QualType RegTy = TR->getValueType(); in checkBind() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterBankInfo.cpp | 432 LLT RegTy = MRI.getType(Op.getReg()); in getInstrMapping() local
|
| H A D | MipsCallLowering.cpp | 428 LLT RegTy = LLT::scalar(RegSize * 8); in lowerFormalArguments() local
|
| H A D | MipsISelLowering.cpp | 4401 MVT RegTy = MVT::getIntegerVT(GPRSizeInBytes * 8); in copyByValRegs() local
4430 RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); in passByValArg() local
4520 MVT RegTy = MVT::getIntegerVT(RegSizeInBytes * 8); in writeVarArgRegs() local
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.cpp | 174 LLT RegTy = MRI->getType(MO.getReg()); in repairReg() local
|
| H A D | Utils.cpp | 502 bool llvm::extractParts(Register Reg, LLT RegTy, LLT MainTy, LLT &LeftoverTy, in extractParts()
601 LLT RegTy = MRI.getType(Reg); in extractVectorParts() local
907 const DebugLoc &DL, LLT RegTy) { in getFunctionLiveInPhysReg()
|
| H A D | CallLowering.cpp | 1388 const LLT RegTy = MRI.getType(ValVReg); in assignValueToReg() local
|
| H A D | LegalizerHelper.cpp | 5923 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarAddSub() local
6100 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarInsert() local
|
| H A D | CombinerHelper.cpp | 920 LLT RegTy = MRI.getType(LoadReg); in matchCombineLoadWithAndMask() local
1034 LLT RegTy = MRI.getType(DstReg); in matchSextInRegOfLoad() local
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 96 const LLT RegTy = getType(Reg); in constrainRegAttrs() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 207 struct RegTy { struct
208 unsigned RegNum;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 1621 const LLT RegTy = MRI.getType(DstReg); in selectMulDivRem() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 5126 unsigned RegTy = StackAccess::AccessType::GPR; in emitRemarks() local
|
| H A D | AArch64ISelDAGToDAG.cpp | 4110 MVT RegTy = MemTy == MVT::i64 ? MVT::i64 : MVT::i32; in SelectCMP_SWAP() local
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 6561 LLT RegTy; in legalizeImageIntrinsic() local
|