| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64TargetStreamer.h | 51 virtual void emitARM64WinCFISaveReg(unsigned Reg, int Offset) {} in emitARM64WinCFISaveReg()
52 virtual void emitARM64WinCFISaveRegX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegX()
53 virtual void emitARM64WinCFISaveRegP(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegP()
54 virtual void emitARM64WinCFISaveRegPX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveRegPX()
55 virtual void emitARM64WinCFISaveLRPair(unsigned Reg, int Offset) {} in emitARM64WinCFISaveLRPair()
56 virtual void emitARM64WinCFISaveFReg(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFReg()
57 virtual void emitARM64WinCFISaveFRegX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegX()
58 virtual void emitARM64WinCFISaveFRegP(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegP()
59 virtual void emitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) {} in emitARM64WinCFISaveFRegPX()
73 virtual void emitARM64WinCFISaveAnyRegI(unsigned Reg, int Offset) {} in emitARM64WinCFISaveAnyRegI()
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| H A D | AArch64WinCOFFStreamer.cpp | 70 int Reg, int Offset) { in emitARM64WinUnwindCode()
103 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveReg(unsigned Reg, in emitARM64WinCFISaveReg()
110 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegX(unsigned Reg, in emitARM64WinCFISaveRegX()
115 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegP(unsigned Reg, in emitARM64WinCFISaveRegP()
120 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveRegPX(unsigned Reg, in emitARM64WinCFISaveRegPX()
125 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveLRPair(unsigned Reg, in emitARM64WinCFISaveLRPair()
130 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFReg(unsigned Reg, in emitARM64WinCFISaveFReg()
137 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegX(unsigned Reg, in emitARM64WinCFISaveFRegX()
142 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegP(unsigned Reg, in emitARM64WinCFISaveFRegP()
147 void AArch64TargetWinCOFFStreamer::emitARM64WinCFISaveFRegPX(unsigned Reg, in emitARM64WinCFISaveFRegPX()
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| H A D | AArch64ELFStreamer.cpp | 68 void emitARM64WinCFISaveReg(unsigned Reg, int Offset) override { in emitARM64WinCFISaveReg()
71 void emitARM64WinCFISaveRegX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegX()
74 void emitARM64WinCFISaveRegP(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegP()
77 void emitARM64WinCFISaveRegPX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveRegPX()
80 void emitARM64WinCFISaveLRPair(unsigned Reg, int Offset) override { in emitARM64WinCFISaveLRPair()
83 void emitARM64WinCFISaveFReg(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFReg()
86 void emitARM64WinCFISaveFRegX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegX()
89 void emitARM64WinCFISaveFRegP(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegP()
92 void emitARM64WinCFISaveFRegPX(unsigned Reg, int Offset) override { in emitARM64WinCFISaveFRegPX()
115 void emitARM64WinCFISaveAnyRegI(unsigned Reg, int Offset) override { in emitARM64WinCFISaveAnyRegI()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 20 unsigned Reg; variable
23 constexpr Register(unsigned Val = 0) : Reg(Val) {} in Reg() function
44 static constexpr bool isStackSlot(unsigned Reg) { in isStackSlot()
52 static int stackSlot2Index(Register Reg) { in stackSlot2Index()
65 static constexpr bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
71 static constexpr bool isVirtualRegister(unsigned Reg) { in isVirtualRegister()
77 static unsigned virtReg2Index(Register Reg) { in virtReg2Index()
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| H A D | MachineRegisterInfo.h | 177 void noteNewVirtualRegister(Register Reg) { in noteNewVirtualRegister()
300 inline iterator_range<reg_iterator> reg_operands(Register Reg) const { in reg_operands()
316 reg_instructions(Register Reg) const { in reg_instructions()
331 inline iterator_range<reg_bundle_iterator> reg_bundles(Register Reg) const { in reg_bundles()
351 reg_nodbg_operands(Register Reg) const { in reg_nodbg_operands()
368 reg_nodbg_instructions(Register Reg) const { in reg_nodbg_instructions()
385 reg_nodbg_bundles(Register Reg) const { in reg_nodbg_bundles()
403 inline iterator_range<def_iterator> def_operands(Register Reg) const { in def_operands()
419 def_instructions(Register Reg) const { in def_instructions()
434 inline iterator_range<def_bundle_iterator> def_bundles(Register Reg) const { in def_bundles()
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| H A D | LiveRegUnits.h | 56 Register Reg = O->getReg(); in accumulateUsedDefed() local
86 void addReg(MCPhysReg Reg) { in addReg()
93 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { in addRegMasked()
102 void removeReg(MCPhysReg Reg) { in removeReg()
116 bool available(MCPhysReg Reg) const { in available()
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| H A D | LiveIntervals.h | 125 LiveInterval &getInterval(Register Reg) { in getInterval()
132 const LiveInterval &getInterval(Register Reg) const { in getInterval()
136 bool hasInterval(Register Reg) const { in hasInterval()
141 LiveInterval &createEmptyInterval(Register Reg) { in createEmptyInterval()
148 LiveInterval &createAndComputeVirtRegInterval(Register Reg) { in createAndComputeVirtRegInterval()
157 LiveInterval &getOrCreateEmptyInterval(Register Reg) { in getOrCreateEmptyInterval()
162 void removeInterval(Register Reg) { in removeInterval()
434 void removeAllRegUnitsForPhysReg(MCRegister Reg) { in removeAllRegUnitsForPhysReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.h | 46 static inline bool isARMArea1Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea1Register()
62 static inline bool isARMArea2Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea2Register()
74 static inline bool isSplitFPArea1Register(unsigned Reg, in isSplitFPArea1Register()
89 static inline bool isSplitFPArea2Register(unsigned Reg, in isSplitFPArea2Register()
101 static inline bool isARMArea3Register(unsigned Reg, bool SplitFramePushPop) { in isARMArea3Register()
119 static inline bool isCalleeSavedRegister(unsigned Reg, in isCalleeSavedRegister()
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| H A D | Thumb1FrameLowering.cpp | 210 Register Reg = I.getReg(); in emitPrologue() local
360 Register Reg = I.getReg(); in emitPrologue() local
394 Register Reg = I.getReg(); in emitPrologue() local
423 Register Reg = I.getReg(); in emitPrologue() local
544 Register Reg = I.getReg(); in emitEpilogue() local
617 for (auto Reg : GPRsNoLRSP.set_bits()) { in findTemporariesForLR() local
843 for (Register Reg : Regs) { in splitLowAndHighRegs() local
858 [&](Register Reg) { return RegSet.count(Reg); }); in getNextOrderedReg()
877 for (unsigned Reg : OrderedLowRegs) { in pushRegsToStack() local
943 for (unsigned Reg : llvm::reverse(RegsToPush)) in pushRegsToStack() local
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 70 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup()
83 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
104 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) { in LeaveGroup()
114 bool AggressiveAntiDepState::IsLive(unsigned Reg) { in IsLive()
158 unsigned Reg = *AI; in StartBlock() local
172 unsigned Reg = *I; in StartBlock() local
203 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
228 Register Reg = MO.getReg(); in IsImplicitDefUse() local
248 const Register Reg = MO.getReg(); in GetPassthruRegs() local
291 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse()
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| H A D | MachineRegisterInfo.cpp | 59 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass()
64 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
70 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
86 Register Reg, const TargetRegisterClass *RC, unsigned MinNumRegs) { in constrainRegClass()
93 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
123 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
148 Register Reg = Register::index2VirtReg(getNumVirtRegs()); in createIncompleteVirtualRegister() local
166 Register Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
174 Register Reg = createIncompleteVirtualRegister(Name); in createVirtualRegister() local
183 Register Reg = createIncompleteVirtualRegister(Name); in cloneVirtualRegister() local
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| H A D | LiveVariables.cpp | 81 const Register Reg = Register::index2VirtReg(I); in print() local
114 LiveVariables::VarInfo &LiveVariables::getVarInfo(Register Reg) { in getVarInfo()
157 void LiveVariables::HandleVirtRegUse(Register Reg, MachineBasicBlock *MBB, in HandleVirtRegUse()
208 void LiveVariables::HandleVirtRegDef(Register Reg, MachineInstr &MI) { in HandleVirtRegDef()
219 LiveVariables::FindLastPartialDef(Register Reg, in FindLastPartialDef()
255 void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) { in HandlePhysRegUse()
303 MachineInstr *LiveVariables::FindLastRefOrPartRef(Register Reg) { in FindLastRefOrPartRef()
332 bool LiveVariables::HandlePhysRegKill(Register Reg, MachineInstr *MI) { in HandlePhysRegKill()
444 for (unsigned Reg = 1; Reg != NumRegs; ++Reg) { in HandleRegMask() local
462 void LiveVariables::HandlePhysRegDef(Register Reg, MachineInstr *MI, in HandlePhysRegDef()
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| H A D | RegisterScavenging.cpp | 51 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) { in setRegUsed() argument
98 return !LiveUnits.available(Reg); in addRegUnits() argument
103 if (!isRegUsed(Reg)) { in removeRegUnits() argument
137 MCRegister Reg = MO.getReg().asMCReg(); determineKillsAndDefs() local
186 Register Reg = MO.getReg(); forward() local
248 isRegUsed(Register Reg,bool includeReserved) const isRegUsed() argument
305 for (MCPhysReg Reg : AllocationOrder) { findSurvivorBackwards() local
330 for (MCPhysReg Reg : AllocationOrder) { findSurvivorBackwards() local
376 spill(Register Reg,const TargetRegisterClass & RC,int SPAdj,MachineBasicBlock::iterator Before,MachineBasicBlock::iterator & UseMI) spill() argument
462 MCPhysReg Reg = P.first; scavengeRegisterBackwards() local
567 Register Reg = MO.getReg(); scavengeFrameVirtualRegsInBlock() local
589 Register Reg = MO.getReg(); scavengeFrameVirtualRegsInBlock() local
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| H A D | CriticalAntiDepBreaker.cpp | 70 unsigned Reg = *AI; in StartBlock() local
84 unsigned Reg = *I; in StartBlock() local
88 unsigned Reg = *AI; in StartBlock() local
114 for (unsigned Reg = 1; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
184 Register Reg = MO.getReg(); in PrescanInstruction() local
225 Register Reg = MO.getReg(); in PrescanInstruction() local
280 Register Reg = MO.getReg(); in ScanInstruction() local
310 Register Reg = MO.getReg(); in ScanInstruction() local
466 for (unsigned Reg = 1; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
614 Register Reg = MO.getReg(); in BreakAntiDependencies() local
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| H A D | MIRVRegNamerUtils.h | 36 Register Reg; variable
40 NamedVReg(Register Reg, std::string Name = "") : Reg(Reg), Name(Name) {} in Reg() argument
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| H A D | MachineInstrBundle.cpp | 159 Register Reg = MO.getReg(); in finalizeBundle() local
181 Register Reg = MO->getReg(); in finalizeBundle() local
210 for (Register Reg : LocalDefs) { in finalizeBundle() local
219 for (Register Reg : ExternUses) { in finalizeBundle() local
278 MachineInstr &MI, Register Reg, in AnalyzeVirtRegInBundle()
308 llvm::AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg, in AnalyzeVirtRegLanesInBundle()
334 PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, in AnalyzePhysRegInBundle()
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| H A D | FixupStatepointCallerSaved.cpp | 92 static unsigned getRegisterSize(const TargetRegisterInfo &TRI, Register Reg) { in getRegisterSize()
110 static Register performCopyPropagation(Register Reg, in performCopyPropagation()
183 void recordReload(Register Reg, int FI, const MachineBasicBlock *MBB) { in recordReload()
191 bool hasReload(Register Reg, int FI, const MachineBasicBlock *MBB) { in hasReload()
251 int getFrameIndex(Register Reg, MachineBasicBlock *EHPad) { in getFrameIndex()
367 bool isCalleeSaved(Register Reg) { return (Mask[Reg / 32] >> Reg % 32) & 1; } in isCalleeSaved()
388 Register Reg = MO.getReg(); in findRegistersToSpill() local
408 for (Register Reg : RegsToSpill) { in spillRegisters() local
429 void insertReloadBefore(unsigned Reg, MachineBasicBlock::iterator It, in insertReloadBefore()
457 for (auto Reg : RegsToReload) { in insertReloads() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIProgramInfo.cpp | 80 uint64_t Reg = S_00B848_PRIORITY(ProgInfo.Priority) | in getComputePGMRSrc1Reg() local
101 uint64_t Reg = S_00B848_PRIORITY(ProgInfo.Priority) | in getPGMRSrc1Reg() local
137 uint64_t Reg = S_00B84C_USER_SGPR(ProgInfo.UserSGPR) | in getComputePGMRSrc2Reg() local
166 uint64_t Reg = getComputePGMRSrc1Reg(*this, ST); in getComputePGMRSrc1() local
181 uint64_t Reg = getPGMRSrc1Reg(*this, CC, ST); in getPGMRSrc1() local
190 uint64_t Reg = getComputePGMRSrc2Reg(*this); in getComputePGMRSrc2() local
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| H A D | SIOptimizeVGPRLiveRange.cpp | 212 Register Reg, MachineBasicBlock *MBB, in findNonPHIUsesInBlock()
279 Register Reg = MO.getReg(); in collectCandidateRegisters() local
300 auto IsLiveThroughThen = [&](Register Reg) { in collectCandidateRegisters()
322 for (auto Reg : KillsInElse) { in collectCandidateRegisters() local
401 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow) const { in updateLiveRangeInThenRegion()
470 Register Reg, Register NewReg, MachineBasicBlock *Flow, in updateLiveRangeInElseRegion()
500 Register Reg, MachineBasicBlock *If, MachineBasicBlock *Flow, in optimizeLiveRange()
553 Register Reg, MachineBasicBlock *LoopHeader, in optimizeWaterfallLiveRange()
679 for (auto Reg : CandidateRegs) in runOnMachineFunction() local
696 for (auto Reg : CandidateRegs) in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegister.h | 35 unsigned Reg; variable
38 constexpr MCRegister(unsigned Val = 0) : Reg(Val) {} in Reg() function
61 static constexpr bool isStackSlot(unsigned Reg) { in isStackSlot()
67 static constexpr bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 73 static bool isVecReg(unsigned Reg) { in isVecReg()
96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg, in addAsmInstr()
108 static bool getInstrVecReg(const MachineInstr &MI, unsigned &Reg) { in getInstrVecReg()
144 unsigned Reg = 0; in runOnMachineFunction() local
152 unsigned Reg = 0; in runOnMachineFunction() local
168 unsigned Reg = 0; in runOnMachineFunction() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.h | 60 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64() argument
65 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32() argument
70 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32() argument
75 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 60 unsigned Reg; member
81 void setReg(unsigned Reg) { in setReg()
294 Register Reg = getRegForValue(Op); in computeAddress() local
380 Register Reg = getRegForValue(Obj); in computeAddress() local
389 unsigned Reg = Addr.getReg(); in materializeLoadStoreOperands() local
422 unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { in maskI1Value()
438 Register Reg = getRegForValue(V); in getRegForI1Value() local
444 unsigned WebAssemblyFastISel::zeroExtendToI32(unsigned Reg, const Value *V, in zeroExtendToI32()
480 unsigned WebAssemblyFastISel::signExtendToI32(unsigned Reg, const Value *V, in signExtendToI32()
516 unsigned WebAssemblyFastISel::zeroExtend(unsigned Reg, const Value *V, in zeroExtend()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 136 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { in getRegTy()
167 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; in eraseGPOpnd() local
233 unsigned Reg; in visitNode() local
265 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg, in isCallViaRegister()
307 unsigned Reg = ScopedHT.lookup(Entry).second; in getReg() local
312 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) { in incCntAndSetReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 1349 unsigned Reg = getReg(Decoder, Mips::GPR64RegClassID, RegNo); in DecodeGPR64RegisterClass() local
1359 unsigned Reg = getReg(Decoder, Mips::GPRMM16RegClassID, RegNo); in DecodeGPRMM16RegisterClass() local
1369 unsigned Reg = getReg(Decoder, Mips::GPRMM16ZeroRegClassID, RegNo); in DecodeGPRMM16ZeroRegisterClass() local
1379 unsigned Reg = getReg(Decoder, Mips::GPRMM16MovePRegClassID, RegNo); in DecodeGPRMM16MovePRegisterClass() local
1389 unsigned Reg = getReg(Decoder, Mips::GPR32RegClassID, RegNo); in DecodeGPR32RegisterClass() local
1415 unsigned Reg = getReg(Decoder, Mips::FGR64RegClassID, RegNo); in DecodeFGR64RegisterClass() local
1426 unsigned Reg = getReg(Decoder, Mips::FGR32RegClassID, RegNo); in DecodeFGR32RegisterClass() local
1436 unsigned Reg = getReg(Decoder, Mips::CCRRegClassID, RegNo); in DecodeCCRRegisterClass() local
1446 unsigned Reg = getReg(Decoder, Mips::FCCRegClassID, RegNo); in DecodeFCCRegisterClass() local
1457 unsigned Reg = getReg(Decoder, Mips::FGRCCRegClassID, RegNo); in DecodeFGRCCRegisterClass() local
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