1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. 5 * 6 * Modifications for inclusion into the Linux staging tree are 7 * Copyright(c) 2010 Larry Finger. All rights reserved. 8 * 9 * Contact information: 10 * WLAN FAE <wlanfae@realtek.com> 11 * Larry Finger <Larry.Finger@lwfinger.net> 12 * 13 ******************************************************************************/ 14 #ifndef __RTL8712_HAL_H__ 15 #define __RTL8712_HAL_H__ 16 17 enum _HW_VERSION { 18 RTL8712_FPGA, 19 RTL8712_1stCUT, /*A Cut (RTL8712_ASIC)*/ 20 RTL8712_2ndCUT, /*B Cut*/ 21 RTL8712_3rdCUT, /*C Cut*/ 22 }; 23 24 enum _LOOPBACK_TYPE { 25 RTL8712_AIR_TRX = 0, 26 RTL8712_MAC_LBK, 27 RTL8712_BB_LBK, 28 RTL8712_MAC_FW_LBK = 4, 29 RTL8712_BB_FW_LBK = 8, 30 }; 31 32 enum RTL871X_HCI_TYPE { 33 RTL8712_SDIO, 34 RTL8712_USB, 35 }; 36 37 enum RTL8712_RF_CONFIG { 38 RTL8712_RF_1T1R, 39 RTL8712_RF_1T2R, 40 RTL8712_RF_2T2R 41 }; 42 43 enum _RTL8712_HCI_TYPE_ { 44 RTL8712_HCI_TYPE_PCIE = 0x01, 45 RTL8712_HCI_TYPE_AP_PCIE = 0x81, 46 RTL8712_HCI_TYPE_USB = 0x02, 47 RTL8712_HCI_TYPE_92USB = 0x02, 48 RTL8712_HCI_TYPE_AP_USB = 0x82, 49 RTL8712_HCI_TYPE_72USB = 0x12, 50 RTL8712_HCI_TYPE_SDIO = 0x04, 51 RTL8712_HCI_TYPE_72SDIO = 0x14 52 }; 53 54 struct fw_priv { /*8-bytes alignment required*/ 55 /*--- long word 0 ----*/ 56 unsigned char signature_0; /*0x12: CE product, 0x92: IT product*/ 57 unsigned char signature_1; /*0x87: CE product, 0x81: IT product*/ 58 unsigned char hci_sel; /*0x81: PCI-AP, 01:PCIe, 02: 92S-U, 0x82: USB-AP, 59 * 0x12: 72S-U, 03:SDIO 60 */ 61 unsigned char chip_version; /*the same value as register value*/ 62 unsigned char customer_ID_0; /*customer ID low byte*/ 63 unsigned char customer_ID_1; /*customer ID high byte*/ 64 unsigned char rf_config; /*0x11: 1T1R, 0x12: 1T2R, 0x92: 1T2R turbo, 65 * 0x22: 2T2R 66 */ 67 unsigned char usb_ep_num; /* 4: 4EP, 6: 6EP, 11: 11EP*/ 68 /*--- long word 1 ----*/ 69 unsigned char regulatory_class_0; /*regulatory class bit map 0*/ 70 unsigned char regulatory_class_1; /*regulatory class bit map 1*/ 71 unsigned char regulatory_class_2; /*regulatory class bit map 2*/ 72 unsigned char regulatory_class_3; /*regulatory class bit map 3*/ 73 unsigned char rfintfs; /* 0:SWSI, 1:HWSI, 2:HWPI*/ 74 unsigned char def_nettype; 75 unsigned char turbo_mode; 76 unsigned char low_power_mode;/* 0: normal mode, 1: low power mode*/ 77 /*--- long word 2 ----*/ 78 unsigned char lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/ 79 unsigned char mp_mode; /* 1: for MP use, 0: for normal driver */ 80 unsigned char vcs_type; /* 0:off 1:on 2:auto */ 81 unsigned char vcs_mode; /* 1:RTS/CTS 2:CTS to self */ 82 unsigned char rsvd022; 83 unsigned char rsvd023; 84 unsigned char rsvd024; 85 unsigned char rsvd025; 86 /*--- long word 3 ----*/ 87 unsigned char qos_en; /*1: QoS enable*/ 88 unsigned char bw_40MHz_en; /*1: 40MHz BW enable*/ 89 unsigned char AMSDU2AMPDU_en; /*1: 4181 convert AMSDU to AMPDU, 90 * 0: disable 91 */ 92 unsigned char AMPDU_en; /*1: 11n AMPDU enable*/ 93 unsigned char rate_control_offload; /*1: FW offloads,0: driver handles*/ 94 unsigned char aggregation_offload; /*1: FW offloads,0: driver handles*/ 95 unsigned char rsvd030; 96 unsigned char rsvd031; 97 /*--- long word 4 ----*/ 98 unsigned char beacon_offload; /* 1. FW offloads, 0: driver handles*/ 99 unsigned char MLME_offload; /* 2. FW offloads, 0: driver handles*/ 100 unsigned char hwpc_offload; /* 3. FW offloads, 0: driver handles*/ 101 unsigned char tcp_checksum_offload; /*4. FW offloads,0: driver handles*/ 102 unsigned char tcp_offload; /* 5. FW offloads, 0: driver handles*/ 103 unsigned char ps_control_offload; /* 6. FW offloads, 0: driver handles*/ 104 unsigned char WWLAN_offload; /* 7. FW offloads, 0: driver handles*/ 105 unsigned char rsvd040; 106 /*--- long word 5 ----*/ 107 unsigned char tcp_tx_frame_len_L; /*tcp tx packet length low byte*/ 108 unsigned char tcp_tx_frame_len_H; /*tcp tx packet length high byte*/ 109 unsigned char tcp_rx_frame_len_L; /*tcp rx packet length low byte*/ 110 unsigned char tcp_rx_frame_len_H; /*tcp rx packet length high byte*/ 111 unsigned char rsvd050; 112 unsigned char rsvd051; 113 unsigned char rsvd052; 114 unsigned char rsvd053; 115 }; 116 117 struct fw_hdr {/*8-byte alignment required*/ 118 unsigned short signature; 119 unsigned short version; /* 0x8000 ~ 0x8FFF for FPGA version, 120 * 0x0000 ~ 0x7FFF for ASIC version, 121 */ 122 unsigned int dmem_size; /*define the size of boot loader*/ 123 unsigned int img_IMEM_size; /*define the size of FW in IMEM*/ 124 unsigned int img_SRAM_size; /*define the size of FW in SRAM*/ 125 unsigned int fw_priv_sz; /*define the size of DMEM variable*/ 126 unsigned short efuse_addr; 127 unsigned short h2ccnd_resp_addr; 128 unsigned int SVNRevision; 129 unsigned int release_time; /*Mon:Day:Hr:Min*/ 130 struct fw_priv fwpriv; 131 }; 132 133 struct hal_priv { 134 /*Endpoint handles*/ 135 struct net_device *pipehdls_r8712[10]; 136 u8 (*hal_bus_init)(struct _adapter *adapter); 137 }; 138 139 uint rtl8712_hal_init(struct _adapter *padapter); 140 int rtl871x_load_fw(struct _adapter *padapter); 141 142 #endif 143