1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt722-sdca.h -- RT722 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2023 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT722_H__ 9 #define __RT722_H__ 10 11 #include <linux/pm.h> 12 #include <linux/regmap.h> 13 #include <linux/soundwire/sdw.h> 14 #include <linux/soundwire/sdw_type.h> 15 #include <sound/soc.h> 16 #include <linux/workqueue.h> 17 18 struct rt722_sdca_priv { 19 struct regmap *regmap; 20 struct snd_soc_component *component; 21 struct sdw_slave *slave; 22 struct sdw_bus_params params; 23 bool hw_init; 24 bool first_hw_init; 25 struct mutex calibrate_mutex; 26 struct mutex disable_irq_lock; 27 bool disable_irq; 28 /* For Headset jack & Headphone */ 29 unsigned int scp_sdca_stat1; 30 unsigned int scp_sdca_stat2; 31 struct snd_soc_jack *hs_jack; 32 struct delayed_work jack_detect_work; 33 struct delayed_work jack_btn_check_work; 34 int jack_type; 35 int jd_src; 36 bool fu0f_dapm_mute; 37 bool fu0f_mixer_l_mute; 38 bool fu0f_mixer_r_mute; 39 /* For DMIC */ 40 bool fu1e_dapm_mute; 41 bool fu1e_mixer_mute[4]; 42 }; 43 44 struct rt722_sdca_dmic_kctrl_priv { 45 unsigned int reg_base; 46 unsigned int count; 47 unsigned int max; 48 unsigned int invert; 49 }; 50 51 /* NID */ 52 #define RT722_VENDOR_REG 0x20 53 #define RT722_VENDOR_CALI 0x58 54 #define RT722_VENDOR_SPK_EFUSE 0x5c 55 #define RT722_VENDOR_IMS_DRE 0x5b 56 #define RT722_VENDOR_ANALOG_CTL 0x5f 57 #define RT722_VENDOR_HDA_CTL 0x61 58 59 /* Index (NID:20h) */ 60 #define RT722_JD_PRODUCT_NUM 0x00 61 #define RT722_ANALOG_BIAS_CTL3 0x04 62 #define RT722_JD_CTRL1 0x09 63 #define RT722_LDO2_3_CTL1 0x0e 64 #define RT722_LDO1_CTL 0x1a 65 #define RT722_HP_JD_CTRL 0x24 66 #define RT722_CLSD_CTRL6 0x3c 67 #define RT722_COMBO_JACK_AUTO_CTL1 0x45 68 #define RT722_COMBO_JACK_AUTO_CTL2 0x46 69 #define RT722_COMBO_JACK_AUTO_CTL3 0x47 70 #define RT722_DIGITAL_MISC_CTRL4 0x4a 71 #define RT722_VREFO_GAT 0x63 72 #define RT722_FSM_CTL 0x67 73 #define RT722_SDCA_INTR_REC 0x82 74 #define RT722_SW_CONFIG1 0x8a 75 #define RT722_SW_CONFIG2 0x8b 76 77 /* Index (NID:58h) */ 78 #define RT722_DAC_DC_CALI_CTL0 0x00 79 #define RT722_DAC_DC_CALI_CTL1 0x01 80 #define RT722_DAC_DC_CALI_CTL2 0x02 81 #define RT722_DAC_DC_CALI_CTL3 0x03 82 83 /* Index (NID:59h) */ 84 #define RT722_ULTRA_SOUND_DETECTOR6 0x1e 85 86 /* Index (NID:5bh) */ 87 #define RT722_IMS_DIGITAL_CTL1 0x00 88 #define RT722_IMS_DIGITAL_CTL5 0x05 89 #define RT722_HP_DETECT_RLDET_CTL1 0x29 90 #define RT722_HP_DETECT_RLDET_CTL2 0x2a 91 92 /* Index (NID:5fh) */ 93 #define RT722_MISC_POWER_CTL0 0x00 94 #define RT722_MISC_POWER_CTL7 0x08 95 96 /* Index (NID:61h) */ 97 #define RT722_HDA_LEGACY_MUX_CTL0 0x00 98 #define RT722_HDA_LEGACY_UNSOL_CTL 0x03 99 #define RT722_HDA_LEGACY_CONFIG_CTL0 0x06 100 #define RT722_HDA_LEGACY_RESET_CTL 0x08 101 #define RT722_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e 102 #define RT722_DMIC_ENT_FLOAT_CTL 0x10 103 #define RT722_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 104 #define RT722_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 105 #define RT722_ADC_ENT_FLOAT_CTL 0x15 106 #define RT722_ADC_VOL_CH_FLOAT_CTL 0x17 107 #define RT722_ADC_SAMPLE_RATE_FLOAT 0x18 108 #define RT722_DAC03_HP_PDE_FLOAT_CTL 0x22 109 #define RT722_MIC2_LINE2_PDE_FLOAT_CTL 0x23 110 #define RT722_ET41_LINE2_PDE_FLOAT_CTL 0x24 111 #define RT722_ADC0A_08_PDE_FLOAT_CTL 0x25 112 #define RT722_ADC10_PDE_FLOAT_CTL 0x26 113 #define RT722_DMIC1_2_PDE_FLOAT_CTL 0x28 114 #define RT722_AMP_PDE_FLOAT_CTL 0x29 115 #define RT722_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f 116 #define RT722_GE_RELATED_CTL1 0x45 117 #define RT722_GE_RELATED_CTL2 0x46 118 #define RT722_MIXER_CTL0 0x52 119 #define RT722_MIXER_CTL1 0x53 120 #define RT722_EAPD_CTL 0x55 121 #define RT722_UMP_HID_CTL0 0x60 122 #define RT722_UMP_HID_CTL1 0x61 123 #define RT722_UMP_HID_CTL2 0x62 124 #define RT722_UMP_HID_CTL3 0x63 125 #define RT722_UMP_HID_CTL4 0x64 126 #define RT722_UMP_HID_CTL5 0x65 127 #define RT722_UMP_HID_CTL6 0x66 128 #define RT722_UMP_HID_CTL7 0x67 129 #define RT722_UMP_HID_CTL8 0x68 130 #define RT722_FLOAT_CTRL_1 0x70 131 #define RT722_ENT_FLOAT_CTRL_1 0x76 132 133 /* Parameter & Verb control 01 (0x1a)(NID:20h) */ 134 #define RT722_HIDDEN_REG_SW_RESET (0x1 << 14) 135 136 /* combo jack auto switch control 2 (0x46)(NID:20h) */ 137 #define RT722_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 138 #define RT722_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 139 #define RT722_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 140 #define RT722_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 141 142 /* DAC calibration control (0x00)(NID:58h) */ 143 #define RT722_DC_CALIB_CTRL (0x1 << 16) 144 /* DAC DC offset calibration control-1 (0x01)(NID:58h) */ 145 #define RT722_PDM_DC_CALIB_STATUS (0x1 << 15) 146 147 #define RT722_EAPD_HIGH 0x2 148 #define RT722_EAPD_LOW 0x0 149 150 /* Buffer address for HID */ 151 #define RT722_BUF_ADDR_HID1 0x44030000 152 #define RT722_BUF_ADDR_HID2 0x44030020 153 154 /* RT722 SDCA Control - function number */ 155 #define FUNC_NUM_JACK_CODEC 0x01 156 #define FUNC_NUM_MIC_ARRAY 0x02 157 #define FUNC_NUM_HID 0x03 158 #define FUNC_NUM_AMP 0x04 159 160 /* RT722 SDCA entity */ 161 #define RT722_SDCA_ENT_HID01 0x01 162 #define RT722_SDCA_ENT_GE49 0x49 163 #define RT722_SDCA_ENT_USER_FU05 0x05 164 #define RT722_SDCA_ENT_USER_FU06 0x06 165 #define RT722_SDCA_ENT_USER_FU0F 0x0f 166 #define RT722_SDCA_ENT_USER_FU10 0x19 167 #define RT722_SDCA_ENT_USER_FU1E 0x1e 168 #define RT722_SDCA_ENT_FU15 0x15 169 #define RT722_SDCA_ENT_PDE23 0x23 170 #define RT722_SDCA_ENT_PDE40 0x40 171 #define RT722_SDCA_ENT_PDE11 0x11 172 #define RT722_SDCA_ENT_PDE12 0x12 173 #define RT722_SDCA_ENT_PDE2A 0x2a 174 #define RT722_SDCA_ENT_CS01 0x01 175 #define RT722_SDCA_ENT_CS11 0x11 176 #define RT722_SDCA_ENT_CS1F 0x1f 177 #define RT722_SDCA_ENT_CS1C 0x1c 178 #define RT722_SDCA_ENT_CS31 0x31 179 #define RT722_SDCA_ENT_OT23 0x42 180 #define RT722_SDCA_ENT_IT26 0x26 181 #define RT722_SDCA_ENT_IT09 0x09 182 #define RT722_SDCA_ENT_PLATFORM_FU15 0x15 183 #define RT722_SDCA_ENT_PLATFORM_FU44 0x44 184 #define RT722_SDCA_ENT_XU03 0x03 185 #define RT722_SDCA_ENT_XU0D 0x0d 186 #define RT722_SDCA_ENT0 0x00 187 188 /* RT722 SDCA control */ 189 #define RT722_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 190 #define RT722_SDCA_CTL_FU_MUTE 0x01 191 #define RT722_SDCA_CTL_FU_VOLUME 0x02 192 #define RT722_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 193 #define RT722_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 194 #define RT722_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 195 #define RT722_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 196 #define RT722_SDCA_CTL_SELECTED_MODE 0x01 197 #define RT722_SDCA_CTL_DETECTED_MODE 0x02 198 #define RT722_SDCA_CTL_REQ_POWER_STATE 0x01 199 #define RT722_SDCA_CTL_VENDOR_DEF 0x30 200 #define RT722_SDCA_CTL_FU_CH_GAIN 0x0b 201 #define RT722_SDCA_CTL_FUNC_STATUS 0x10 202 #define RT722_SDCA_CTL_ACTUAL_POWER_STATE 0x10 203 204 /* RT722 SDCA channel */ 205 #define CH_L 0x01 206 #define CH_R 0x02 207 #define CH_01 0x01 208 #define CH_02 0x02 209 #define CH_03 0x03 210 #define CH_04 0x04 211 #define CH_08 0x08 212 213 /* sample frequency index */ 214 #define RT722_SDCA_RATE_16000HZ 0x04 215 #define RT722_SDCA_RATE_32000HZ 0x07 216 #define RT722_SDCA_RATE_44100HZ 0x08 217 #define RT722_SDCA_RATE_48000HZ 0x09 218 #define RT722_SDCA_RATE_96000HZ 0x0b 219 #define RT722_SDCA_RATE_192000HZ 0x0d 220 221 /* Function_Status */ 222 #define FUNCTION_NEEDS_INITIALIZATION BIT(5) 223 224 enum { 225 RT722_AIF1, /* For headset mic and headphone */ 226 RT722_AIF2, /* For speaker */ 227 RT722_AIF3, /* For dmic */ 228 RT722_AIFS, 229 }; 230 231 enum rt722_sdca_jd_src { 232 RT722_JD_NULL, 233 RT722_JD1, 234 }; 235 236 int rt722_sdca_io_init(struct device *dev, struct sdw_slave *slave); 237 int rt722_sdca_init(struct device *dev, struct regmap *regmap, struct sdw_slave *slave); 238 int rt722_sdca_index_write(struct rt722_sdca_priv *rt722, 239 unsigned int nid, unsigned int reg, unsigned int value); 240 int rt722_sdca_index_read(struct rt722_sdca_priv *rt722, 241 unsigned int nid, unsigned int reg, unsigned int *value); 242 243 int rt722_sdca_jack_detect(struct rt722_sdca_priv *rt722, bool *hp, bool *mic); 244 #endif /* __RT722_H__ */ 245