xref: /linux/drivers/rtc/rtc-rs5c372.c (revision 03c11eb3b16dc0058589751dfd91f254be2be613)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
4  *
5  * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
6  * Copyright (C) 2006 Tower Technologies
7  * Copyright (C) 2008 Paul Mundt
8  */
9 
10 #include <linux/i2c.h>
11 #include <linux/rtc.h>
12 #include <linux/bcd.h>
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 
17 /*
18  * Ricoh has a family of I2C based RTCs, which differ only slightly from
19  * each other.  Differences center on pinout (e.g. how many interrupts,
20  * output clock, etc) and how the control registers are used.  The '372
21  * is significant only because that's the one this driver first supported.
22  */
23 #define RS5C372_REG_SECS	0
24 #define RS5C372_REG_MINS	1
25 #define RS5C372_REG_HOURS	2
26 #define RS5C372_REG_WDAY	3
27 #define RS5C372_REG_DAY		4
28 #define RS5C372_REG_MONTH	5
29 #define RS5C372_REG_YEAR	6
30 #define RS5C372_REG_TRIM	7
31 #	define RS5C372_TRIM_XSL		0x80		/* only if RS5C372[a|b] */
32 #	define RS5C372_TRIM_MASK	0x7F
33 #	define R2221TL_TRIM_DEV		(1 << 7)	/* only if R2221TL */
34 #	define RS5C372_TRIM_DECR	(1 << 6)
35 
36 #define RS5C_REG_ALARM_A_MIN	8			/* or ALARM_W */
37 #define RS5C_REG_ALARM_A_HOURS	9
38 #define RS5C_REG_ALARM_A_WDAY	10
39 
40 #define RS5C_REG_ALARM_B_MIN	11			/* or ALARM_D */
41 #define RS5C_REG_ALARM_B_HOURS	12
42 #define RS5C_REG_ALARM_B_WDAY	13			/* (ALARM_B only) */
43 
44 #define RS5C_REG_CTRL1		14
45 #	define RS5C_CTRL1_AALE		(1 << 7)	/* or WALE */
46 #	define RS5C_CTRL1_BALE		(1 << 6)	/* or DALE */
47 #	define RV5C387_CTRL1_24		(1 << 5)
48 #	define RS5C372A_CTRL1_SL1	(1 << 5)
49 #	define RS5C_CTRL1_CT_MASK	(7 << 0)
50 #	define RS5C_CTRL1_CT0		(0 << 0)	/* no periodic irq */
51 #	define RS5C_CTRL1_CT4		(4 << 0)	/* 1 Hz level irq */
52 #define RS5C_REG_CTRL2		15
53 #	define RS5C372_CTRL2_24		(1 << 5)
54 #	define RS5C_CTRL2_XSTP		(1 << 4)	/* only if !R2x2x */
55 #	define R2x2x_CTRL2_VDET		(1 << 6)	/* only if  R2x2x */
56 #	define R2x2x_CTRL2_XSTP		(1 << 5)	/* only if  R2x2x */
57 #	define R2x2x_CTRL2_PON		(1 << 4)	/* only if  R2x2x */
58 #	define RS5C_CTRL2_CTFG		(1 << 2)
59 #	define RS5C_CTRL2_AAFG		(1 << 1)	/* or WAFG */
60 #	define RS5C_CTRL2_BAFG		(1 << 0)	/* or DAFG */
61 
62 
63 /* to read (style 1) or write registers starting at R */
64 #define RS5C_ADDR(R)		(((R) << 4) | 0)
65 
66 
67 enum rtc_type {
68 	rtc_undef = 0,
69 	rtc_r2025sd,
70 	rtc_r2221tl,
71 	rtc_rs5c372a,
72 	rtc_rs5c372b,
73 	rtc_rv5c386,
74 	rtc_rv5c387a,
75 };
76 
77 static const struct i2c_device_id rs5c372_id[] = {
78 	{ "r2025sd", rtc_r2025sd },
79 	{ "r2221tl", rtc_r2221tl },
80 	{ "rs5c372a", rtc_rs5c372a },
81 	{ "rs5c372b", rtc_rs5c372b },
82 	{ "rv5c386", rtc_rv5c386 },
83 	{ "rv5c387a", rtc_rv5c387a },
84 	{ }
85 };
86 MODULE_DEVICE_TABLE(i2c, rs5c372_id);
87 
88 static const __maybe_unused struct of_device_id rs5c372_of_match[] = {
89 	{
90 		.compatible = "ricoh,r2025sd",
91 		.data = (void *)rtc_r2025sd
92 	},
93 	{
94 		.compatible = "ricoh,r2221tl",
95 		.data = (void *)rtc_r2221tl
96 	},
97 	{
98 		.compatible = "ricoh,rs5c372a",
99 		.data = (void *)rtc_rs5c372a
100 	},
101 	{
102 		.compatible = "ricoh,rs5c372b",
103 		.data = (void *)rtc_rs5c372b
104 	},
105 	{
106 		.compatible = "ricoh,rv5c386",
107 		.data = (void *)rtc_rv5c386
108 	},
109 	{
110 		.compatible = "ricoh,rv5c387a",
111 		.data = (void *)rtc_rv5c387a
112 	},
113 	{ }
114 };
115 MODULE_DEVICE_TABLE(of, rs5c372_of_match);
116 
117 /* REVISIT:  this assumes that:
118  *  - we're in the 21st century, so it's safe to ignore the century
119  *    bit for rv5c38[67] (REG_MONTH bit 7);
120  *  - we should use ALARM_A not ALARM_B (may be wrong on some boards)
121  */
122 struct rs5c372 {
123 	struct i2c_client	*client;
124 	struct rtc_device	*rtc;
125 	enum rtc_type		type;
126 	unsigned		time24:1;
127 	unsigned		has_irq:1;
128 	unsigned		smbus:1;
129 	char			buf[17];
130 	char			*regs;
131 };
132 
rs5c_get_regs(struct rs5c372 * rs5c)133 static int rs5c_get_regs(struct rs5c372 *rs5c)
134 {
135 	struct i2c_client	*client = rs5c->client;
136 	struct i2c_msg		msgs[] = {
137 		{
138 			.addr = client->addr,
139 			.flags = I2C_M_RD,
140 			.len = sizeof(rs5c->buf),
141 			.buf = rs5c->buf
142 		},
143 	};
144 
145 	/* This implements the third reading method from the datasheet, using
146 	 * an internal address that's reset after each transaction (by STOP)
147 	 * to 0x0f ... so we read extra registers, and skip the first one.
148 	 *
149 	 * The first method doesn't work with the iop3xx adapter driver, on at
150 	 * least 80219 chips; this works around that bug.
151 	 *
152 	 * The third method on the other hand doesn't work for the SMBus-only
153 	 * configurations, so we use the first method there, stripping off
154 	 * the extra register in the process.
155 	 */
156 	if (rs5c->smbus) {
157 		int addr = RS5C_ADDR(RS5C372_REG_SECS);
158 		int size = sizeof(rs5c->buf) - 1;
159 
160 		if (i2c_smbus_read_i2c_block_data(client, addr, size,
161 						  rs5c->buf + 1) != size) {
162 			dev_warn(&client->dev, "can't read registers\n");
163 			return -EIO;
164 		}
165 	} else {
166 		if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
167 			dev_warn(&client->dev, "can't read registers\n");
168 			return -EIO;
169 		}
170 	}
171 
172 	dev_dbg(&client->dev,
173 		"%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
174 		rs5c->regs + 0, rs5c->regs[3],
175 		rs5c->regs + 4, rs5c->regs[7],
176 		rs5c->regs + 8, rs5c->regs + 11,
177 		rs5c->regs[14], rs5c->regs[15]);
178 
179 	return 0;
180 }
181 
rs5c_reg2hr(struct rs5c372 * rs5c,unsigned reg)182 static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
183 {
184 	unsigned	hour;
185 
186 	if (rs5c->time24)
187 		return bcd2bin(reg & 0x3f);
188 
189 	hour = bcd2bin(reg & 0x1f);
190 	if (hour == 12)
191 		hour = 0;
192 	if (reg & 0x20)
193 		hour += 12;
194 	return hour;
195 }
196 
rs5c_hr2reg(struct rs5c372 * rs5c,unsigned hour)197 static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
198 {
199 	if (rs5c->time24)
200 		return bin2bcd(hour);
201 
202 	if (hour > 12)
203 		return 0x20 | bin2bcd(hour - 12);
204 	if (hour == 12)
205 		return 0x20 | bin2bcd(12);
206 	if (hour == 0)
207 		return bin2bcd(12);
208 	return bin2bcd(hour);
209 }
210 
rs5c372_rtc_read_time(struct device * dev,struct rtc_time * tm)211 static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
212 {
213 	struct i2c_client *client = to_i2c_client(dev);
214 	struct rs5c372	*rs5c = i2c_get_clientdata(client);
215 	int		status = rs5c_get_regs(rs5c);
216 	unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
217 
218 	if (status < 0)
219 		return status;
220 
221 	switch (rs5c->type) {
222 	case rtc_r2025sd:
223 	case rtc_r2221tl:
224 		if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
225 		    (rs5c->type == rtc_r2221tl &&  (ctrl2 & R2x2x_CTRL2_XSTP))) {
226 			dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
227 			return -EINVAL;
228 		}
229 		break;
230 	default:
231 		if (ctrl2 & RS5C_CTRL2_XSTP) {
232 			dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
233 			return -EINVAL;
234 		}
235 	}
236 
237 	tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
238 	tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
239 	tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
240 
241 	tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
242 	tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
243 
244 	/* tm->tm_mon is zero-based */
245 	tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
246 
247 	/* year is 1900 + tm->tm_year */
248 	tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
249 
250 	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
251 		"mday=%d, mon=%d, year=%d, wday=%d\n",
252 		__func__,
253 		tm->tm_sec, tm->tm_min, tm->tm_hour,
254 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
255 
256 	return 0;
257 }
258 
rs5c372_rtc_set_time(struct device * dev,struct rtc_time * tm)259 static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
260 {
261 	struct i2c_client *client = to_i2c_client(dev);
262 	struct rs5c372	*rs5c = i2c_get_clientdata(client);
263 	unsigned char	buf[7];
264 	unsigned char	ctrl2;
265 	int		addr;
266 
267 	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
268 		"mday=%d, mon=%d, year=%d, wday=%d\n",
269 		__func__,
270 		tm->tm_sec, tm->tm_min, tm->tm_hour,
271 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
272 
273 	addr   = RS5C_ADDR(RS5C372_REG_SECS);
274 	buf[0] = bin2bcd(tm->tm_sec);
275 	buf[1] = bin2bcd(tm->tm_min);
276 	buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
277 	buf[3] = bin2bcd(tm->tm_wday);
278 	buf[4] = bin2bcd(tm->tm_mday);
279 	buf[5] = bin2bcd(tm->tm_mon + 1);
280 	buf[6] = bin2bcd(tm->tm_year - 100);
281 
282 	if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
283 		dev_dbg(&client->dev, "%s: write error in line %i\n",
284 			__func__, __LINE__);
285 		return -EIO;
286 	}
287 
288 	addr = RS5C_ADDR(RS5C_REG_CTRL2);
289 	ctrl2 = i2c_smbus_read_byte_data(client, addr);
290 
291 	/* clear rtc warning bits */
292 	switch (rs5c->type) {
293 	case rtc_r2025sd:
294 	case rtc_r2221tl:
295 		ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
296 		if (rs5c->type == rtc_r2025sd)
297 			ctrl2 |= R2x2x_CTRL2_XSTP;
298 		else
299 			ctrl2 &= ~R2x2x_CTRL2_XSTP;
300 		break;
301 	default:
302 		ctrl2 &= ~RS5C_CTRL2_XSTP;
303 		break;
304 	}
305 
306 	if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
307 		dev_dbg(&client->dev, "%s: write error in line %i\n",
308 			__func__, __LINE__);
309 		return -EIO;
310 	}
311 
312 	return 0;
313 }
314 
315 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
316 #define	NEED_TRIM
317 #endif
318 
319 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
320 #define	NEED_TRIM
321 #endif
322 
323 #ifdef	NEED_TRIM
rs5c372_get_trim(struct i2c_client * client,int * osc,int * trim)324 static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
325 {
326 	struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
327 	u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
328 
329 	if (osc) {
330 		if (rs5c372->type == rtc_rs5c372a || rs5c372->type == rtc_rs5c372b)
331 			*osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
332 		else
333 			*osc = 32768;
334 	}
335 
336 	if (trim) {
337 		dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
338 		tmp &= RS5C372_TRIM_MASK;
339 		if (tmp & 0x3e) {
340 			int t = tmp & 0x3f;
341 
342 			if (tmp & 0x40)
343 				t = (~t | (s8)0xc0) + 1;
344 			else
345 				t = t - 1;
346 
347 			tmp = t * 2;
348 		} else
349 			tmp = 0;
350 		*trim = tmp;
351 	}
352 
353 	return 0;
354 }
355 #endif
356 
rs5c_rtc_alarm_irq_enable(struct device * dev,unsigned int enabled)357 static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
358 {
359 	struct i2c_client	*client = to_i2c_client(dev);
360 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
361 	unsigned char		buf;
362 	int			status, addr;
363 
364 	buf = rs5c->regs[RS5C_REG_CTRL1];
365 
366 	if (!rs5c->has_irq)
367 		return -EINVAL;
368 
369 	status = rs5c_get_regs(rs5c);
370 	if (status < 0)
371 		return status;
372 
373 	addr = RS5C_ADDR(RS5C_REG_CTRL1);
374 	if (enabled)
375 		buf |= RS5C_CTRL1_AALE;
376 	else
377 		buf &= ~RS5C_CTRL1_AALE;
378 
379 	if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
380 		dev_warn(dev, "can't update alarm\n");
381 		status = -EIO;
382 	} else
383 		rs5c->regs[RS5C_REG_CTRL1] = buf;
384 
385 	return status;
386 }
387 
388 
389 /* NOTE:  Since RTC_WKALM_{RD,SET} were originally defined for EFI,
390  * which only exposes a polled programming interface; and since
391  * these calls map directly to those EFI requests; we don't demand
392  * we have an IRQ for this chip when we go through this API.
393  *
394  * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
395  * though, managed through RTC_AIE_{ON,OFF} requests.
396  */
397 
rs5c_read_alarm(struct device * dev,struct rtc_wkalrm * t)398 static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
399 {
400 	struct i2c_client	*client = to_i2c_client(dev);
401 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
402 	int			status;
403 
404 	status = rs5c_get_regs(rs5c);
405 	if (status < 0)
406 		return status;
407 
408 	/* report alarm time */
409 	t->time.tm_sec = 0;
410 	t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
411 	t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
412 
413 	/* ... and status */
414 	t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
415 	t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
416 
417 	return 0;
418 }
419 
rs5c_set_alarm(struct device * dev,struct rtc_wkalrm * t)420 static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
421 {
422 	struct i2c_client	*client = to_i2c_client(dev);
423 	struct rs5c372		*rs5c = i2c_get_clientdata(client);
424 	int			status, addr, i;
425 	unsigned char		buf[3];
426 
427 	/* only handle up to 24 hours in the future, like RTC_ALM_SET */
428 	if (t->time.tm_mday != -1
429 			|| t->time.tm_mon != -1
430 			|| t->time.tm_year != -1)
431 		return -EINVAL;
432 
433 	/* REVISIT: round up tm_sec */
434 
435 	/* if needed, disable irq (clears pending status) */
436 	status = rs5c_get_regs(rs5c);
437 	if (status < 0)
438 		return status;
439 	if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
440 		addr = RS5C_ADDR(RS5C_REG_CTRL1);
441 		buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
442 		if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
443 			dev_dbg(dev, "can't disable alarm\n");
444 			return -EIO;
445 		}
446 		rs5c->regs[RS5C_REG_CTRL1] = buf[0];
447 	}
448 
449 	/* set alarm */
450 	buf[0] = bin2bcd(t->time.tm_min);
451 	buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
452 	buf[2] = 0x7f;	/* any/all days */
453 
454 	for (i = 0; i < sizeof(buf); i++) {
455 		addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
456 		if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
457 			dev_dbg(dev, "can't set alarm time\n");
458 			return -EIO;
459 		}
460 	}
461 
462 	/* ... and maybe enable its irq */
463 	if (t->enabled) {
464 		addr = RS5C_ADDR(RS5C_REG_CTRL1);
465 		buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
466 		if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
467 			dev_warn(dev, "can't enable alarm\n");
468 		rs5c->regs[RS5C_REG_CTRL1] = buf[0];
469 	}
470 
471 	return 0;
472 }
473 
474 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
475 
rs5c372_rtc_proc(struct device * dev,struct seq_file * seq)476 static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
477 {
478 	int err, osc, trim;
479 
480 	err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
481 	if (err == 0) {
482 		seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
483 				osc / 1000, osc % 1000);
484 		seq_printf(seq, "trim\t\t: %d\n", trim);
485 	}
486 
487 	return 0;
488 }
489 
490 #else
491 #define	rs5c372_rtc_proc	NULL
492 #endif
493 
494 #ifdef CONFIG_RTC_INTF_DEV
rs5c372_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)495 static int rs5c372_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
496 {
497 	struct rs5c372	*rs5c = i2c_get_clientdata(to_i2c_client(dev));
498 	unsigned char	ctrl2;
499 	int		addr;
500 	unsigned int	flags;
501 
502 	dev_dbg(dev, "%s: cmd=%x\n", __func__, cmd);
503 
504 	addr = RS5C_ADDR(RS5C_REG_CTRL2);
505 	ctrl2 = i2c_smbus_read_byte_data(rs5c->client, addr);
506 
507 	switch (cmd) {
508 	case RTC_VL_READ:
509 		flags = 0;
510 
511 		switch (rs5c->type) {
512 		case rtc_r2025sd:
513 		case rtc_r2221tl:
514 			if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
515 				(rs5c->type == rtc_r2221tl &&  (ctrl2 & R2x2x_CTRL2_XSTP))) {
516 				flags |= RTC_VL_DATA_INVALID;
517 			}
518 			if (ctrl2 & R2x2x_CTRL2_VDET)
519 				flags |= RTC_VL_BACKUP_LOW;
520 			break;
521 		default:
522 			if (ctrl2 & RS5C_CTRL2_XSTP)
523 				flags |= RTC_VL_DATA_INVALID;
524 			break;
525 		}
526 
527 		return put_user(flags, (unsigned int __user *)arg);
528 	case RTC_VL_CLR:
529 		/* clear VDET bit */
530 		if (rs5c->type == rtc_r2025sd || rs5c->type == rtc_r2221tl) {
531 			ctrl2 &= ~R2x2x_CTRL2_VDET;
532 			if (i2c_smbus_write_byte_data(rs5c->client, addr, ctrl2) < 0) {
533 				dev_dbg(&rs5c->client->dev, "%s: write error in line %i\n",
534 						__func__, __LINE__);
535 				return -EIO;
536 			}
537 		}
538 		return 0;
539 	default:
540 		return -ENOIOCTLCMD;
541 	}
542 	return 0;
543 }
544 #else
545 #define rs5c372_ioctl	NULL
546 #endif
547 
rs5c372_read_offset(struct device * dev,long * offset)548 static int rs5c372_read_offset(struct device *dev, long *offset)
549 {
550 	struct rs5c372 *rs5c = i2c_get_clientdata(to_i2c_client(dev));
551 	u8 val = rs5c->regs[RS5C372_REG_TRIM];
552 	long ppb_per_step = 0;
553 	bool decr = val & RS5C372_TRIM_DECR;
554 
555 	switch (rs5c->type) {
556 	case rtc_r2221tl:
557 		ppb_per_step = val & R2221TL_TRIM_DEV ? 1017 : 3051;
558 		break;
559 	case rtc_rs5c372a:
560 	case rtc_rs5c372b:
561 		ppb_per_step = val & RS5C372_TRIM_XSL ? 3125 : 3051;
562 		break;
563 	default:
564 		ppb_per_step = 3051;
565 		break;
566 	}
567 
568 	/* Only bits[0:5] repsents the time counts */
569 	val &= 0x3F;
570 
571 	/* If bits[1:5] are all 0, it means no increment or decrement */
572 	if (!(val & 0x3E)) {
573 		*offset = 0;
574 	} else {
575 		if (decr)
576 			*offset = -(((~val) & 0x3F) + 1) * ppb_per_step;
577 		else
578 			*offset = (val - 1) * ppb_per_step;
579 	}
580 
581 	return 0;
582 }
583 
rs5c372_set_offset(struct device * dev,long offset)584 static int rs5c372_set_offset(struct device *dev, long offset)
585 {
586 	struct rs5c372 *rs5c = i2c_get_clientdata(to_i2c_client(dev));
587 	int addr = RS5C_ADDR(RS5C372_REG_TRIM);
588 	u8 val = 0;
589 	u8 tmp = 0;
590 	long ppb_per_step = 3051;
591 	long steps = LONG_MIN;
592 
593 	switch (rs5c->type) {
594 	case rtc_rs5c372a:
595 	case rtc_rs5c372b:
596 		tmp = rs5c->regs[RS5C372_REG_TRIM];
597 		if (tmp & RS5C372_TRIM_XSL) {
598 			ppb_per_step = 3125;
599 			val |= RS5C372_TRIM_XSL;
600 		}
601 		break;
602 	case rtc_r2221tl:
603 		/*
604 		 * Check if it is possible to use high resolution mode (DEV=1).
605 		 * In this mode, the minimum resolution is 2 / (32768 * 20 * 3),
606 		 * which is about 1017 ppb.
607 		 */
608 		steps = DIV_ROUND_CLOSEST(offset, 1017);
609 		if (steps >= -0x3E && steps <= 0x3E) {
610 			ppb_per_step = 1017;
611 			val |= R2221TL_TRIM_DEV;
612 		} else {
613 			/*
614 			 * offset is out of the range of high resolution mode.
615 			 * Try to use low resolution mode (DEV=0). In this mode,
616 			 * the minimum resolution is 2 / (32768 * 20), which is
617 			 * about 3051 ppb.
618 			 */
619 			steps = LONG_MIN;
620 		}
621 		break;
622 	default:
623 		break;
624 	}
625 
626 	if (steps == LONG_MIN) {
627 		steps = DIV_ROUND_CLOSEST(offset, ppb_per_step);
628 		if (steps > 0x3E || steps < -0x3E)
629 			return -ERANGE;
630 	}
631 
632 	if (steps > 0) {
633 		val |= steps + 1;
634 	} else {
635 		val |= RS5C372_TRIM_DECR;
636 		val |= (~(-steps - 1)) & 0x3F;
637 	}
638 
639 	if (!steps || !(val & 0x3E)) {
640 		/*
641 		 * if offset is too small, set oscillation adjustment register
642 		 * or time trimming register with its default value whic means
643 		 * no increment or decrement. But for rs5c372[a|b], the XSL bit
644 		 * should be kept unchanged.
645 		 */
646 		if (rs5c->type == rtc_rs5c372a || rs5c->type == rtc_rs5c372b)
647 			val &= RS5C372_TRIM_XSL;
648 		else
649 			val = 0;
650 	}
651 
652 	dev_dbg(&rs5c->client->dev, "write 0x%x for offset %ld\n", val, offset);
653 
654 	if (i2c_smbus_write_byte_data(rs5c->client, addr, val) < 0) {
655 		dev_err(&rs5c->client->dev, "failed to write 0x%x to reg %d\n", val, addr);
656 		return -EIO;
657 	}
658 
659 	rs5c->regs[RS5C372_REG_TRIM] = val;
660 
661 	return 0;
662 }
663 
664 static const struct rtc_class_ops rs5c372_rtc_ops = {
665 	.proc		= rs5c372_rtc_proc,
666 	.read_time	= rs5c372_rtc_read_time,
667 	.set_time	= rs5c372_rtc_set_time,
668 	.read_alarm	= rs5c_read_alarm,
669 	.set_alarm	= rs5c_set_alarm,
670 	.alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
671 	.ioctl		= rs5c372_ioctl,
672 	.read_offset    = rs5c372_read_offset,
673 	.set_offset     = rs5c372_set_offset,
674 };
675 
676 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
677 
rs5c372_sysfs_show_trim(struct device * dev,struct device_attribute * attr,char * buf)678 static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
679 				struct device_attribute *attr, char *buf)
680 {
681 	int err, trim;
682 
683 	err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
684 	if (err)
685 		return err;
686 
687 	return sprintf(buf, "%d\n", trim);
688 }
689 static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
690 
rs5c372_sysfs_show_osc(struct device * dev,struct device_attribute * attr,char * buf)691 static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
692 				struct device_attribute *attr, char *buf)
693 {
694 	int err, osc;
695 
696 	err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
697 	if (err)
698 		return err;
699 
700 	return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
701 }
702 static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
703 
rs5c_sysfs_register(struct device * dev)704 static int rs5c_sysfs_register(struct device *dev)
705 {
706 	int err;
707 
708 	err = device_create_file(dev, &dev_attr_trim);
709 	if (err)
710 		return err;
711 	err = device_create_file(dev, &dev_attr_osc);
712 	if (err)
713 		device_remove_file(dev, &dev_attr_trim);
714 
715 	return err;
716 }
717 
rs5c_sysfs_unregister(struct device * dev)718 static void rs5c_sysfs_unregister(struct device *dev)
719 {
720 	device_remove_file(dev, &dev_attr_trim);
721 	device_remove_file(dev, &dev_attr_osc);
722 }
723 
724 #else
rs5c_sysfs_register(struct device * dev)725 static int rs5c_sysfs_register(struct device *dev)
726 {
727 	return 0;
728 }
729 
rs5c_sysfs_unregister(struct device * dev)730 static void rs5c_sysfs_unregister(struct device *dev)
731 {
732 	/* nothing */
733 }
734 #endif	/* SYSFS */
735 
736 static struct i2c_driver rs5c372_driver;
737 
rs5c_oscillator_setup(struct rs5c372 * rs5c372)738 static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
739 {
740 	unsigned char buf[2];
741 	int addr, i, ret = 0;
742 
743 	addr   = RS5C_ADDR(RS5C_REG_CTRL1);
744 	buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
745 	buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
746 
747 	switch (rs5c372->type) {
748 	case rtc_r2025sd:
749 		if (buf[1] & R2x2x_CTRL2_XSTP)
750 			return ret;
751 		break;
752 	case rtc_r2221tl:
753 		if (!(buf[1] & R2x2x_CTRL2_XSTP))
754 			return ret;
755 		break;
756 	default:
757 		if (!(buf[1] & RS5C_CTRL2_XSTP))
758 			return ret;
759 		break;
760 	}
761 
762 	/* use 24hr mode */
763 	switch (rs5c372->type) {
764 	case rtc_rs5c372a:
765 	case rtc_rs5c372b:
766 		buf[1] |= RS5C372_CTRL2_24;
767 		rs5c372->time24 = 1;
768 		break;
769 	case rtc_r2025sd:
770 	case rtc_r2221tl:
771 	case rtc_rv5c386:
772 	case rtc_rv5c387a:
773 		buf[0] |= RV5C387_CTRL1_24;
774 		rs5c372->time24 = 1;
775 		break;
776 	default:
777 		/* impossible */
778 		break;
779 	}
780 
781 	for (i = 0; i < sizeof(buf); i++) {
782 		addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
783 		ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
784 		if (unlikely(ret < 0))
785 			return ret;
786 	}
787 
788 	rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
789 	rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
790 
791 	return 0;
792 }
793 
rs5c372_probe(struct i2c_client * client)794 static int rs5c372_probe(struct i2c_client *client)
795 {
796 	int err = 0;
797 	int smbus_mode = 0;
798 	struct rs5c372 *rs5c372;
799 
800 	dev_dbg(&client->dev, "%s\n", __func__);
801 
802 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
803 			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
804 		/*
805 		 * If we don't have any master mode adapter, try breaking
806 		 * it down in to the barest of capabilities.
807 		 */
808 		if (i2c_check_functionality(client->adapter,
809 				I2C_FUNC_SMBUS_BYTE_DATA |
810 				I2C_FUNC_SMBUS_I2C_BLOCK))
811 			smbus_mode = 1;
812 		else {
813 			/* Still no good, give up */
814 			err = -ENODEV;
815 			goto exit;
816 		}
817 	}
818 
819 	rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
820 				GFP_KERNEL);
821 	if (!rs5c372) {
822 		err = -ENOMEM;
823 		goto exit;
824 	}
825 
826 	rs5c372->client = client;
827 	i2c_set_clientdata(client, rs5c372);
828 	if (client->dev.of_node) {
829 		rs5c372->type = (uintptr_t)of_device_get_match_data(&client->dev);
830 	} else {
831 		const struct i2c_device_id *id = i2c_match_id(rs5c372_id, client);
832 		rs5c372->type = id->driver_data;
833 	}
834 
835 	/* we read registers 0x0f then 0x00-0x0f; skip the first one */
836 	rs5c372->regs = &rs5c372->buf[1];
837 	rs5c372->smbus = smbus_mode;
838 
839 	err = rs5c_get_regs(rs5c372);
840 	if (err < 0)
841 		goto exit;
842 
843 	/* clock may be set for am/pm or 24 hr time */
844 	switch (rs5c372->type) {
845 	case rtc_rs5c372a:
846 	case rtc_rs5c372b:
847 		/* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
848 		 * so does periodic irq, except some 327a modes.
849 		 */
850 		if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
851 			rs5c372->time24 = 1;
852 		break;
853 	case rtc_r2025sd:
854 	case rtc_r2221tl:
855 	case rtc_rv5c386:
856 	case rtc_rv5c387a:
857 		if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
858 			rs5c372->time24 = 1;
859 		/* alarm uses ALARM_W; and nINTRB for alarm and periodic
860 		 * irq, on both 386 and 387
861 		 */
862 		break;
863 	default:
864 		dev_err(&client->dev, "unknown RTC type\n");
865 		goto exit;
866 	}
867 
868 	/* if the oscillator lost power and no other software (like
869 	 * the bootloader) set it up, do it here.
870 	 *
871 	 * The R2025S/D does this a little differently than the other
872 	 * parts, so we special case that..
873 	 */
874 	err = rs5c_oscillator_setup(rs5c372);
875 	if (unlikely(err < 0)) {
876 		dev_err(&client->dev, "setup error\n");
877 		goto exit;
878 	}
879 
880 	dev_info(&client->dev, "%s found, %s\n",
881 			({ char *s; switch (rs5c372->type) {
882 			case rtc_r2025sd:	s = "r2025sd"; break;
883 			case rtc_r2221tl:	s = "r2221tl"; break;
884 			case rtc_rs5c372a:	s = "rs5c372a"; break;
885 			case rtc_rs5c372b:	s = "rs5c372b"; break;
886 			case rtc_rv5c386:	s = "rv5c386"; break;
887 			case rtc_rv5c387a:	s = "rv5c387a"; break;
888 			default:		s = "chip"; break;
889 			}; s;}),
890 			rs5c372->time24 ? "24hr" : "am/pm"
891 			);
892 
893 	/* REVISIT use client->irq to register alarm irq ... */
894 	rs5c372->rtc = devm_rtc_device_register(&client->dev,
895 					rs5c372_driver.driver.name,
896 					&rs5c372_rtc_ops, THIS_MODULE);
897 
898 	if (IS_ERR(rs5c372->rtc)) {
899 		err = PTR_ERR(rs5c372->rtc);
900 		goto exit;
901 	}
902 
903 	err = rs5c_sysfs_register(&client->dev);
904 	if (err)
905 		goto exit;
906 
907 	return 0;
908 
909 exit:
910 	return err;
911 }
912 
rs5c372_remove(struct i2c_client * client)913 static void rs5c372_remove(struct i2c_client *client)
914 {
915 	rs5c_sysfs_unregister(&client->dev);
916 }
917 
918 static struct i2c_driver rs5c372_driver = {
919 	.driver		= {
920 		.name	= "rtc-rs5c372",
921 		.of_match_table = of_match_ptr(rs5c372_of_match),
922 	},
923 	.probe		= rs5c372_probe,
924 	.remove		= rs5c372_remove,
925 	.id_table	= rs5c372_id,
926 };
927 
928 module_i2c_driver(rs5c372_driver);
929 
930 MODULE_AUTHOR(
931 		"Pavel Mironchik <pmironchik@optifacio.net>, "
932 		"Alessandro Zummo <a.zummo@towertech.it>, "
933 		"Paul Mundt <lethal@linux-sh.org>");
934 MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
935 MODULE_LICENSE("GPL");
936