xref: /linux/arch/riscv/include/asm/asm.h (revision 4a1d8ababde685a77fd4fd61e58f973cbdf29f8c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2015 Regents of the University of California
4  */
5 
6 #ifndef _ASM_RISCV_ASM_H
7 #define _ASM_RISCV_ASM_H
8 
9 #ifdef __ASSEMBLY__
10 #define __ASM_STR(x)	x
11 #else
12 #define __ASM_STR(x)	#x
13 #endif
14 
15 #if __riscv_xlen == 64
16 #define __REG_SEL(a, b)	__ASM_STR(a)
17 #elif __riscv_xlen == 32
18 #define __REG_SEL(a, b)	__ASM_STR(b)
19 #else
20 #error "Unexpected __riscv_xlen"
21 #endif
22 
23 #define REG_L		__REG_SEL(ld, lw)
24 #define REG_S		__REG_SEL(sd, sw)
25 #define REG_SC		__REG_SEL(sc.d, sc.w)
26 #define REG_AMOSWAP_AQ	__REG_SEL(amoswap.d.aq, amoswap.w.aq)
27 #define REG_ASM		__REG_SEL(.dword, .word)
28 #define SZREG		__REG_SEL(8, 4)
29 #define LGREG		__REG_SEL(3, 2)
30 #define SRLI		__REG_SEL(srliw, srli)
31 
32 #if __SIZEOF_POINTER__ == 8
33 #ifdef __ASSEMBLY__
34 #define RISCV_PTR		.dword
35 #define RISCV_SZPTR		8
36 #define RISCV_LGPTR		3
37 #else
38 #define RISCV_PTR		".dword"
39 #define RISCV_SZPTR		"8"
40 #define RISCV_LGPTR		"3"
41 #endif
42 #elif __SIZEOF_POINTER__ == 4
43 #ifdef __ASSEMBLY__
44 #define RISCV_PTR		.word
45 #define RISCV_SZPTR		4
46 #define RISCV_LGPTR		2
47 #else
48 #define RISCV_PTR		".word"
49 #define RISCV_SZPTR		"4"
50 #define RISCV_LGPTR		"2"
51 #endif
52 #else
53 #error "Unexpected __SIZEOF_POINTER__"
54 #endif
55 
56 #if (__SIZEOF_INT__ == 4)
57 #define RISCV_INT		__ASM_STR(.word)
58 #define RISCV_SZINT		__ASM_STR(4)
59 #define RISCV_LGINT		__ASM_STR(2)
60 #else
61 #error "Unexpected __SIZEOF_INT__"
62 #endif
63 
64 #if (__SIZEOF_SHORT__ == 2)
65 #define RISCV_SHORT		__ASM_STR(.half)
66 #define RISCV_SZSHORT		__ASM_STR(2)
67 #define RISCV_LGSHORT		__ASM_STR(1)
68 #else
69 #error "Unexpected __SIZEOF_SHORT__"
70 #endif
71 
72 #ifdef __ASSEMBLY__
73 #include <asm/asm-offsets.h>
74 
75 /* Common assembly source macros */
76 
77 /*
78  * NOP sequence
79  */
80 .macro	nops, num
81 	.rept	\num
82 	nop
83 	.endr
84 .endm
85 
86 #ifdef CONFIG_SMP
87 #ifdef CONFIG_32BIT
88 #define PER_CPU_OFFSET_SHIFT 2
89 #else
90 #define PER_CPU_OFFSET_SHIFT 3
91 #endif
92 
93 .macro asm_per_cpu dst sym tmp
94 	REG_L \tmp, TASK_TI_CPU_NUM(tp)
95 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
96 	la    \dst, __per_cpu_offset
97 	add   \dst, \dst, \tmp
98 	REG_L \tmp, 0(\dst)
99 	la    \dst, \sym
100 	add   \dst, \dst, \tmp
101 .endm
102 #else /* CONFIG_SMP */
103 .macro asm_per_cpu dst sym tmp
104 	la    \dst, \sym
105 .endm
106 #endif /* CONFIG_SMP */
107 
108 .macro load_per_cpu dst ptr tmp
109 	asm_per_cpu \dst \ptr \tmp
110 	REG_L \dst, 0(\dst)
111 .endm
112 
113 #ifdef CONFIG_SHADOW_CALL_STACK
114 /* gp is used as the shadow call stack pointer instead */
115 .macro load_global_pointer
116 .endm
117 #else
118 /* load __global_pointer to gp */
119 .macro load_global_pointer
120 .option push
121 .option norelax
122 	la gp, __global_pointer$
123 .option pop
124 .endm
125 #endif /* CONFIG_SHADOW_CALL_STACK */
126 
127 	/* save all GPs except x1 ~ x5 */
128 	.macro save_from_x6_to_x31
129 	REG_S x6,  PT_T1(sp)
130 	REG_S x7,  PT_T2(sp)
131 	REG_S x8,  PT_S0(sp)
132 	REG_S x9,  PT_S1(sp)
133 	REG_S x10, PT_A0(sp)
134 	REG_S x11, PT_A1(sp)
135 	REG_S x12, PT_A2(sp)
136 	REG_S x13, PT_A3(sp)
137 	REG_S x14, PT_A4(sp)
138 	REG_S x15, PT_A5(sp)
139 	REG_S x16, PT_A6(sp)
140 	REG_S x17, PT_A7(sp)
141 	REG_S x18, PT_S2(sp)
142 	REG_S x19, PT_S3(sp)
143 	REG_S x20, PT_S4(sp)
144 	REG_S x21, PT_S5(sp)
145 	REG_S x22, PT_S6(sp)
146 	REG_S x23, PT_S7(sp)
147 	REG_S x24, PT_S8(sp)
148 	REG_S x25, PT_S9(sp)
149 	REG_S x26, PT_S10(sp)
150 	REG_S x27, PT_S11(sp)
151 	REG_S x28, PT_T3(sp)
152 	REG_S x29, PT_T4(sp)
153 	REG_S x30, PT_T5(sp)
154 	REG_S x31, PT_T6(sp)
155 	.endm
156 
157 	/* restore all GPs except x1 ~ x5 */
158 	.macro restore_from_x6_to_x31
159 	REG_L x6,  PT_T1(sp)
160 	REG_L x7,  PT_T2(sp)
161 	REG_L x8,  PT_S0(sp)
162 	REG_L x9,  PT_S1(sp)
163 	REG_L x10, PT_A0(sp)
164 	REG_L x11, PT_A1(sp)
165 	REG_L x12, PT_A2(sp)
166 	REG_L x13, PT_A3(sp)
167 	REG_L x14, PT_A4(sp)
168 	REG_L x15, PT_A5(sp)
169 	REG_L x16, PT_A6(sp)
170 	REG_L x17, PT_A7(sp)
171 	REG_L x18, PT_S2(sp)
172 	REG_L x19, PT_S3(sp)
173 	REG_L x20, PT_S4(sp)
174 	REG_L x21, PT_S5(sp)
175 	REG_L x22, PT_S6(sp)
176 	REG_L x23, PT_S7(sp)
177 	REG_L x24, PT_S8(sp)
178 	REG_L x25, PT_S9(sp)
179 	REG_L x26, PT_S10(sp)
180 	REG_L x27, PT_S11(sp)
181 	REG_L x28, PT_T3(sp)
182 	REG_L x29, PT_T4(sp)
183 	REG_L x30, PT_T5(sp)
184 	REG_L x31, PT_T6(sp)
185 	.endm
186 
187 /* Annotate a function as being unsuitable for kprobes. */
188 #ifdef CONFIG_KPROBES
189 #define ASM_NOKPROBE(name)				\
190 	.pushsection "_kprobe_blacklist", "aw";		\
191 	RISCV_PTR name;					\
192 	.popsection
193 #else
194 #define ASM_NOKPROBE(name)
195 #endif
196 
197 #endif /* __ASSEMBLY__ */
198 
199 #endif /* _ASM_RISCV_ASM_H */
200