1 /* SPDX-License-Identifier: ISC */
2 /*
3 * Copyright (C) 2022 MediaTek Inc.
4 */
5
6 #ifndef __MT7996_H
7 #define __MT7996_H
8
9 #include <linux/interrupt.h>
10 #include <linux/ktime.h>
11 #include "../mt76_connac.h"
12 #include "regs.h"
13
14 #define MT7996_MAX_RADIOS 3
15 #define MT7996_MAX_INTERFACES 19 /* per-band */
16 #define MT7996_MAX_WMM_SETS 4
17 #define MT7996_WTBL_BMC_SIZE (is_mt7996(&dev->mt76) ? 64 : 32)
18 #define MT7996_WTBL_RESERVED (mt7996_wtbl_size(dev) - 1)
19 #define MT7996_WTBL_STA (MT7996_WTBL_RESERVED - \
20 mt7996_max_interface_num(dev))
21
22 #define MT7996_WATCHDOG_TIME (HZ / 10)
23 #define MT7996_RESET_TIMEOUT (30 * HZ)
24
25 #define MT7996_TX_RING_SIZE 2048
26 #define MT7996_TX_MCU_RING_SIZE 256
27 #define MT7996_TX_FWDL_RING_SIZE 128
28
29 #define MT7996_RX_RING_SIZE 1536
30 #define MT7996_RX_MCU_RING_SIZE 512
31 #define MT7996_RX_MCU_RING_SIZE_WA 1024
32 /* scatter-gather of mcu event is not supported in connac3 */
33 #define MT7996_RX_MCU_BUF_SIZE (2048 + \
34 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
35
36 #define MT7996_DEVICE_ID 0x7990
37 #define MT7996_DEVICE_ID_2 0x7991
38 #define MT7992_DEVICE_ID 0x7992
39 #define MT7992_DEVICE_ID_2 0x799a
40 #define MT7990_DEVICE_ID 0x7993
41 #define MT7990_DEVICE_ID_2 0x799b
42
43 #define MT7996_FIRMWARE_WA "mediatek/mt7996/mt7996_wa.bin"
44 #define MT7996_FIRMWARE_WM "mediatek/mt7996/mt7996_wm.bin"
45 #define MT7996_FIRMWARE_DSP "mediatek/mt7996/mt7996_dsp.bin"
46 #define MT7996_ROM_PATCH "mediatek/mt7996/mt7996_rom_patch.bin"
47
48 #define MT7996_FIRMWARE_WA_233 "mediatek/mt7996/mt7996_wa_233.bin"
49 #define MT7996_FIRMWARE_WM_233 "mediatek/mt7996/mt7996_wm_233.bin"
50 #define MT7996_FIRMWARE_DSP_233 MT7996_FIRMWARE_DSP
51 #define MT7996_ROM_PATCH_233 "mediatek/mt7996/mt7996_rom_patch_233.bin"
52
53 #define MT7992_FIRMWARE_WA "mediatek/mt7996/mt7992_wa.bin"
54 #define MT7992_FIRMWARE_WM "mediatek/mt7996/mt7992_wm.bin"
55 #define MT7992_FIRMWARE_DSP "mediatek/mt7996/mt7992_dsp.bin"
56 #define MT7992_ROM_PATCH "mediatek/mt7996/mt7992_rom_patch.bin"
57
58 #define MT7992_FIRMWARE_WA_23 "mediatek/mt7996/mt7992_wa_23.bin"
59 #define MT7992_FIRMWARE_WM_23 "mediatek/mt7996/mt7992_wm_23.bin"
60 #define MT7992_FIRMWARE_DSP_23 "mediatek/mt7996/mt7992_dsp_23.bin"
61 #define MT7992_ROM_PATCH_23 "mediatek/mt7996/mt7992_rom_patch_23.bin"
62
63 #define MT7990_FIRMWARE_WA ""
64 #define MT7990_FIRMWARE_WM "mediatek/mt7996/mt7990_wm.bin"
65 #define MT7990_FIRMWARE_DSP ""
66 #define MT7990_ROM_PATCH "mediatek/mt7996/mt7990_rom_patch.bin"
67
68 #define MT7996_EEPROM_DEFAULT "mediatek/mt7996/mt7996_eeprom.bin"
69 #define MT7996_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7996_eeprom_2i5i6i.bin"
70 #define MT7996_EEPROM_DEFAULT_233 "mediatek/mt7996/mt7996_eeprom_233.bin"
71 #define MT7996_EEPROM_DEFAULT_233_INT "mediatek/mt7996/mt7996_eeprom_233_2i5i6i.bin"
72
73 #define MT7992_EEPROM_DEFAULT "mediatek/mt7996/mt7992_eeprom.bin"
74 #define MT7992_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7992_eeprom_2i5i.bin"
75 #define MT7992_EEPROM_DEFAULT_MIX "mediatek/mt7996/mt7992_eeprom_2i5e.bin"
76 #define MT7992_EEPROM_DEFAULT_23 "mediatek/mt7996/mt7992_eeprom_23.bin"
77 #define MT7992_EEPROM_DEFAULT_23_INT "mediatek/mt7996/mt7992_eeprom_23_2i5i.bin"
78
79 #define MT7990_EEPROM_DEFAULT "mediatek/mt7996/mt7990_eeprom.bin"
80 #define MT7990_EEPROM_DEFAULT_INT "mediatek/mt7996/mt7990_eeprom_2i5i.bin"
81
82 #define MT7996_EEPROM_SIZE 7680
83 #define MT7996_EEPROM_BLOCK_SIZE 16
84 #define MT7996_TOKEN_SIZE 16384
85 #define MT7996_HW_TOKEN_SIZE 8192
86
87 #define MT7996_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
88 #define MT7996_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
89 #define MT7996_IBF_MAX_NC 2
90 #define MT7996_IBF_TIMEOUT 0x18
91 #define MT7996_IBF_TIMEOUT_LEGACY 0x48
92
93 #define MT7992_CFEND_RATE_DEFAULT 0x4b /* OFDM 6M */
94 #define MT7992_IBF_TIMEOUT 0xff
95
96 #define MT7996_SKU_RATE_NUM 417
97 #define MT7996_SKU_PATH_NUM 494
98
99 #define MT7996_MAX_TWT_AGRT 16
100 #define MT7996_MAX_STA_TWT_AGRT 8
101 #define MT7996_MIN_TWT_DUR 64
102 #define MT7996_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 3)
103
104 /* NOTE: used to map mt76_rates. idx may change if firmware expands table */
105 #define MT7996_BASIC_RATES_TBL 31
106 #define MT7996_BEACON_RATES_TBL 25
107
108 #define MT7996_THERMAL_THROTTLE_MAX 100
109 #define MT7996_CDEV_THROTTLE_MAX 99
110 #define MT7996_CRIT_TEMP_IDX 0
111 #define MT7996_MAX_TEMP_IDX 1
112 #define MT7996_CRIT_TEMP 110
113 #define MT7996_MAX_TEMP 120
114
115 #define MT7996_RRO_MAX_SESSION 1024
116 #define MT7996_RRO_WINDOW_MAX_LEN 1024
117 #define MT7996_RRO_ADDR_ELEM_LEN 128
118 #define MT7996_RRO_BA_BITMAP_LEN 2
119 #define MT7996_RRO_BA_BITMAP_CR_SIZE ((MT7996_RRO_MAX_SESSION * 128) / \
120 MT7996_RRO_BA_BITMAP_LEN)
121 #define MT7996_RRO_BA_BITMAP_SESSION_SIZE (MT7996_RRO_MAX_SESSION / \
122 MT7996_RRO_ADDR_ELEM_LEN)
123 #define MT7996_RRO_WINDOW_MAX_SIZE (MT7996_RRO_WINDOW_MAX_LEN * \
124 MT7996_RRO_BA_BITMAP_SESSION_SIZE)
125
126 #define MT7996_RX_BUF_SIZE (1800 + \
127 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
128 #define MT7996_RX_MSDU_PAGE_SIZE (128 + \
129 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
130
131 struct mt7996_vif;
132 struct mt7996_sta;
133 struct mt7996_dfs_pulse;
134 struct mt7996_dfs_pattern;
135
136 enum mt7996_ram_type {
137 MT7996_RAM_TYPE_WM,
138 MT7996_RAM_TYPE_WA,
139 MT7996_RAM_TYPE_DSP,
140 };
141
142 enum mt7996_var_type {
143 MT7996_VAR_TYPE_444,
144 MT7996_VAR_TYPE_233,
145 };
146
147 enum mt7992_var_type {
148 MT7992_VAR_TYPE_44,
149 MT7992_VAR_TYPE_23,
150 };
151
152 enum mt7990_var_type {
153 MT7990_VAR_TYPE_23,
154 };
155
156 enum mt7996_fem_type {
157 MT7996_FEM_EXT,
158 MT7996_FEM_INT,
159 MT7996_FEM_MIX,
160 };
161
162 enum mt7996_txq_id {
163 MT7996_TXQ_FWDL = 16,
164 MT7996_TXQ_MCU_WM,
165 MT7996_TXQ_BAND0,
166 MT7996_TXQ_BAND1,
167 MT7996_TXQ_MCU_WA,
168 MT7996_TXQ_BAND2,
169 };
170
171 enum mt7996_rxq_id {
172 MT7996_RXQ_MCU_WM = 0,
173 MT7996_RXQ_MCU_WA,
174 MT7996_RXQ_MCU_WA_MAIN = 2,
175 MT7996_RXQ_MCU_WA_EXT = 3, /* for mt7992 */
176 MT7996_RXQ_MCU_WA_TRI = 3,
177 MT7996_RXQ_BAND0 = 4,
178 MT7996_RXQ_BAND1 = 5, /* for mt7992 */
179 MT7996_RXQ_BAND2 = 5,
180 MT7996_RXQ_RRO_BAND0 = 8,
181 MT7996_RXQ_RRO_BAND1 = 8,/* unused */
182 MT7996_RXQ_RRO_BAND2 = 6,
183 MT7996_RXQ_MSDU_PG_BAND0 = 10,
184 MT7996_RXQ_MSDU_PG_BAND1 = 11,
185 MT7996_RXQ_MSDU_PG_BAND2 = 12,
186 MT7996_RXQ_TXFREE0 = 9,
187 MT7996_RXQ_TXFREE1 = 9,
188 MT7996_RXQ_TXFREE2 = 7,
189 MT7996_RXQ_RRO_IND = 0,
190 MT7990_RXQ_TXFREE0 = 6,
191 MT7990_RXQ_TXFREE1 = 7,
192 };
193
194 struct mt7996_twt_flow {
195 struct list_head list;
196 u64 start_tsf;
197 u64 tsf;
198 u32 duration;
199 u16 wcid;
200 __le16 mantissa;
201 u8 exp;
202 u8 table_id;
203 u8 id;
204 u8 protection:1;
205 u8 flowtype:1;
206 u8 trigger:1;
207 u8 sched:1;
208 };
209
210 DECLARE_EWMA(avg_signal, 10, 8)
211
212 struct mt7996_sta_link {
213 struct mt76_wcid wcid; /* must be first */
214
215 struct mt7996_sta *sta;
216
217 struct list_head rc_list;
218 u32 airtime_ac[8];
219
220 int ack_signal;
221 struct ewma_avg_signal avg_ack_signal;
222
223 unsigned long changed;
224
225 struct mt76_connac_sta_key_conf bip;
226
227 struct {
228 u8 flowid_mask;
229 struct mt7996_twt_flow flow[MT7996_MAX_STA_TWT_AGRT];
230 } twt;
231
232 struct rcu_head rcu_head;
233 };
234
235 struct mt7996_sta {
236 struct mt7996_sta_link deflink; /* must be first */
237 struct mt7996_sta_link __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
238 u8 deflink_id;
239
240 struct mt7996_vif *vif;
241 };
242
243 struct mt7996_vif_link {
244 struct mt76_vif_link mt76; /* must be first */
245
246 struct mt7996_sta_link msta_link;
247 struct mt7996_phy *phy;
248
249 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
250 struct cfg80211_bitrate_mask bitrate_mask;
251 };
252
253 struct mt7996_vif {
254 struct mt7996_vif_link deflink; /* must be first */
255 struct mt76_vif_data mt76;
256 };
257
258 /* crash-dump */
259 struct mt7996_crash_data {
260 guid_t guid;
261 struct timespec64 timestamp;
262
263 u8 *memdump_buf;
264 size_t memdump_buf_len;
265 };
266
267 struct mt7996_hif {
268 struct list_head list;
269
270 struct device *dev;
271 void __iomem *regs;
272 int irq;
273 };
274
275 struct mt7996_wed_rro_addr {
276 u32 head_low;
277 u32 head_high : 4;
278 u32 count: 11;
279 u32 oor: 1;
280 u32 rsv : 8;
281 u32 signature : 8;
282 };
283
284 struct mt7996_wed_rro_session_id {
285 struct list_head list;
286 u16 id;
287 };
288
289 struct mt7996_phy {
290 struct mt76_phy *mt76;
291 struct mt7996_dev *dev;
292
293 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
294
295 struct thermal_cooling_device *cdev;
296 u8 cdev_state;
297 u8 throttle_state;
298 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
299
300 u32 rxfilter;
301 u64 omac_mask;
302
303 u16 noise;
304
305 s16 coverage_class;
306 u8 slottime;
307
308 u16 beacon_rate;
309
310 u32 rx_ampdu_ts;
311 u32 ampdu_ref;
312 int txpower;
313
314 struct mt76_mib_stats mib;
315 struct mt76_channel_state state_ts;
316
317 u16 orig_chainmask;
318 u16 orig_antenna_mask;
319
320 bool has_aux_rx;
321 bool counter_reset;
322 };
323
324 struct mt7996_dev {
325 union { /* must be first */
326 struct mt76_dev mt76;
327 struct mt76_phy mphy;
328 };
329
330 struct mt7996_phy *radio_phy[MT7996_MAX_RADIOS];
331 struct wiphy_radio radios[MT7996_MAX_RADIOS];
332 struct wiphy_radio_freq_range radio_freqs[MT7996_MAX_RADIOS];
333
334 struct mt7996_hif *hif2;
335 struct mt7996_reg_desc reg;
336 u8 q_id[MT7996_MAX_QUEUE];
337 u32 q_int_mask[MT7996_MAX_QUEUE];
338 u32 q_wfdma_mask;
339
340 const struct mt76_bus_ops *bus_ops;
341 struct mt7996_phy phy;
342
343 /* monitor rx chain configured channel */
344 struct cfg80211_chan_def rdd2_chandef;
345 struct mt7996_phy *rdd2_phy;
346
347 u16 chainmask;
348 u8 chainshift[__MT_MAX_BAND];
349 u32 hif_idx;
350
351 struct work_struct init_work;
352 struct work_struct rc_work;
353 struct work_struct dump_work;
354 struct work_struct reset_work;
355 wait_queue_head_t reset_wait;
356 struct {
357 u32 state;
358 u32 wa_reset_count;
359 u32 wm_reset_count;
360 bool hw_full_reset:1;
361 bool hw_init_done:1;
362 bool restart:1;
363 } recovery;
364
365 /* protects coredump data */
366 struct mutex dump_mutex;
367 #ifdef CONFIG_DEV_COREDUMP
368 struct {
369 struct mt7996_crash_data *crash_data;
370 } coredump;
371 #endif
372
373 struct list_head sta_rc_list;
374 struct list_head twt_list;
375
376 u32 hw_pattern;
377
378 bool flash_mode:1;
379 bool has_eht:1;
380 bool has_rro:1;
381
382 struct {
383 struct {
384 void *ptr;
385 dma_addr_t phy_addr;
386 } ba_bitmap[MT7996_RRO_BA_BITMAP_LEN];
387 struct {
388 void *ptr;
389 dma_addr_t phy_addr;
390 } addr_elem[MT7996_RRO_ADDR_ELEM_LEN];
391 struct {
392 void *ptr;
393 dma_addr_t phy_addr;
394 } session;
395
396 struct work_struct work;
397 struct list_head poll_list;
398 spinlock_t lock;
399 } wed_rro;
400
401 bool ibf;
402 u8 fw_debug_wm;
403 u8 fw_debug_wa;
404 u8 fw_debug_bin;
405 u16 fw_debug_seq;
406
407 struct dentry *debugfs_dir;
408 struct rchan *relay_fwlog;
409
410 struct {
411 u16 table_mask;
412 u8 n_agrt;
413 } twt;
414
415 spinlock_t reg_lock;
416
417 u8 wtbl_size_group;
418 struct {
419 u8 type:4;
420 u8 fem:4;
421 } var;
422 };
423
424 enum {
425 WFDMA0 = 0x0,
426 WFDMA1,
427 WFDMA_EXT,
428 __MT_WFDMA_MAX,
429 };
430
431 enum rdd_idx {
432 MT_RDD_IDX_BAND2, /* RDD idx for band idx 2 */
433 MT_RDD_IDX_BAND1, /* RDD idx for band idx 1 */
434 MT_RDD_IDX_BACKGROUND, /* RDD idx for background chain */
435 };
436
437 enum mt7996_rdd_cmd {
438 RDD_STOP,
439 RDD_START,
440 RDD_DET_MODE,
441 RDD_RADAR_EMULATE,
442 RDD_START_TXQ = 20,
443 RDD_CAC_START = 50,
444 RDD_CAC_END,
445 RDD_NORMAL_START,
446 RDD_DISABLE_DFS_CAL,
447 RDD_PULSE_DBG,
448 RDD_READ_PULSE,
449 RDD_RESUME_BF,
450 RDD_IRQ_OFF,
451 };
452
453 static inline int
mt7996_get_rdd_idx(struct mt7996_phy * phy,bool is_background)454 mt7996_get_rdd_idx(struct mt7996_phy *phy, bool is_background)
455 {
456 if (!phy->mt76->cap.has_5ghz)
457 return -1;
458
459 if (is_background)
460 return MT_RDD_IDX_BACKGROUND;
461
462 if (phy->mt76->band_idx == MT_BAND2)
463 return MT_RDD_IDX_BAND2;
464
465 return MT_RDD_IDX_BAND1;
466 }
467
468 static inline struct mt7996_dev *
mt7996_hw_dev(struct ieee80211_hw * hw)469 mt7996_hw_dev(struct ieee80211_hw *hw)
470 {
471 struct mt76_phy *phy = hw->priv;
472
473 return container_of(phy->dev, struct mt7996_dev, mt76);
474 }
475
476 static inline struct mt7996_phy *
__mt7996_phy(struct mt7996_dev * dev,enum mt76_band_id band)477 __mt7996_phy(struct mt7996_dev *dev, enum mt76_band_id band)
478 {
479 struct mt76_phy *phy = dev->mt76.phys[band];
480
481 if (!phy)
482 return NULL;
483
484 return phy->priv;
485 }
486
487 static inline struct mt7996_phy *
mt7996_phy2(struct mt7996_dev * dev)488 mt7996_phy2(struct mt7996_dev *dev)
489 {
490 return __mt7996_phy(dev, MT_BAND1);
491 }
492
493 static inline struct mt7996_phy *
mt7996_phy3(struct mt7996_dev * dev)494 mt7996_phy3(struct mt7996_dev *dev)
495 {
496 return __mt7996_phy(dev, MT_BAND2);
497 }
498
499 static inline bool
mt7996_band_valid(struct mt7996_dev * dev,u8 band)500 mt7996_band_valid(struct mt7996_dev *dev, u8 band)
501 {
502 if (!is_mt7996(&dev->mt76))
503 return band <= MT_BAND1;
504
505 return band <= MT_BAND2;
506 }
507
508 static inline struct mt7996_phy *
mt7996_band_phy(struct mt7996_dev * dev,enum nl80211_band band)509 mt7996_band_phy(struct mt7996_dev *dev, enum nl80211_band band)
510 {
511 struct mt76_phy *mphy;
512
513 mphy = dev->mt76.band_phys[band];
514 if (!mphy)
515 return NULL;
516
517 return mphy->priv;
518 }
519
520 static inline struct mt7996_vif_link *
mt7996_vif_link(struct mt7996_dev * dev,struct ieee80211_vif * vif,int link_id)521 mt7996_vif_link(struct mt7996_dev *dev, struct ieee80211_vif *vif, int link_id)
522 {
523 return (struct mt7996_vif_link *)mt76_vif_link(&dev->mt76, vif, link_id);
524 }
525
526 static inline struct mt7996_phy *
mt7996_vif_link_phy(struct mt7996_vif_link * link)527 mt7996_vif_link_phy(struct mt7996_vif_link *link)
528 {
529 struct mt76_phy *mphy = mt76_vif_link_phy(&link->mt76);
530
531 if (!mphy)
532 return NULL;
533
534 return mphy->priv;
535 }
536
537 static inline struct mt7996_vif_link *
mt7996_vif_conf_link(struct mt7996_dev * dev,struct ieee80211_vif * vif,struct ieee80211_bss_conf * link_conf)538 mt7996_vif_conf_link(struct mt7996_dev *dev, struct ieee80211_vif *vif,
539 struct ieee80211_bss_conf *link_conf)
540 {
541 return (struct mt7996_vif_link *)mt76_vif_conf_link(&dev->mt76, vif,
542 link_conf);
543 }
544
545 #define mt7996_for_each_phy(dev, phy) \
546 for (int __i = 0; __i < ARRAY_SIZE((dev)->radio_phy); __i++) \
547 if (((phy) = (dev)->radio_phy[__i]) != NULL)
548
549 extern const struct ieee80211_ops mt7996_ops;
550 extern struct pci_driver mt7996_pci_driver;
551 extern struct pci_driver mt7996_hif_driver;
552
553 struct mt7996_dev *mt7996_mmio_probe(struct device *pdev,
554 void __iomem *mem_base, u32 device_id);
555 void mt7996_wfsys_reset(struct mt7996_dev *dev);
556 irqreturn_t mt7996_irq_handler(int irq, void *dev_instance);
557 u64 __mt7996_get_tsf(struct ieee80211_hw *hw, struct mt7996_vif_link *link);
558 int mt7996_register_device(struct mt7996_dev *dev);
559 void mt7996_unregister_device(struct mt7996_dev *dev);
560 int mt7996_vif_link_add(struct mt76_phy *mphy, struct ieee80211_vif *vif,
561 struct ieee80211_bss_conf *link_conf,
562 struct mt76_vif_link *mlink);
563 void mt7996_vif_link_remove(struct mt76_phy *mphy, struct ieee80211_vif *vif,
564 struct ieee80211_bss_conf *link_conf,
565 struct mt76_vif_link *mlink);
566 int mt7996_eeprom_init(struct mt7996_dev *dev);
567 int mt7996_eeprom_parse_hw_cap(struct mt7996_dev *dev, struct mt7996_phy *phy);
568 int mt7996_eeprom_get_target_power(struct mt7996_dev *dev,
569 struct ieee80211_channel *chan);
570 s8 mt7996_eeprom_get_power_delta(struct mt7996_dev *dev, int band);
571 bool mt7996_eeprom_has_background_radar(struct mt7996_dev *dev);
572 int mt7996_dma_init(struct mt7996_dev *dev);
573 void mt7996_dma_reset(struct mt7996_dev *dev, bool force);
574 void mt7996_dma_prefetch(struct mt7996_dev *dev);
575 void mt7996_dma_cleanup(struct mt7996_dev *dev);
576 void mt7996_dma_start(struct mt7996_dev *dev, bool reset, bool wed_reset);
577 int mt7996_init_tx_queues(struct mt7996_phy *phy, int idx,
578 int n_desc, int ring_base, struct mtk_wed_device *wed);
579 void mt7996_init_txpower(struct mt7996_phy *phy);
580 int mt7996_txbf_init(struct mt7996_dev *dev);
581 void mt7996_reset(struct mt7996_dev *dev);
582 int mt7996_run(struct mt7996_phy *phy);
583 int mt7996_mcu_init(struct mt7996_dev *dev);
584 int mt7996_mcu_init_firmware(struct mt7996_dev *dev);
585 int mt7996_mcu_twt_agrt_update(struct mt7996_dev *dev,
586 struct mt7996_vif_link *link,
587 struct mt7996_twt_flow *flow,
588 int cmd);
589 int mt7996_mcu_add_dev_info(struct mt7996_phy *phy, struct ieee80211_vif *vif,
590 struct ieee80211_bss_conf *link_conf,
591 struct mt76_vif_link *mlink, bool enable);
592 int mt7996_mcu_add_bss_info(struct mt7996_phy *phy, struct ieee80211_vif *vif,
593 struct ieee80211_bss_conf *link_conf,
594 struct mt76_vif_link *mlink,
595 struct mt7996_sta_link *msta_link, int enable);
596 int mt7996_mcu_add_sta(struct mt7996_dev *dev,
597 struct ieee80211_bss_conf *link_conf,
598 struct ieee80211_link_sta *link_sta,
599 struct mt7996_vif_link *link,
600 struct mt7996_sta_link *msta_link,
601 int conn_state, bool newly);
602 int mt7996_mcu_teardown_mld_sta(struct mt7996_dev *dev,
603 struct mt7996_vif_link *link,
604 struct mt7996_sta_link *msta_link);
605 int mt7996_mcu_add_tx_ba(struct mt7996_dev *dev,
606 struct ieee80211_ampdu_params *params,
607 struct mt7996_vif_link *link,
608 struct mt7996_sta_link *msta_link, bool enable);
609 int mt7996_mcu_add_rx_ba(struct mt7996_dev *dev,
610 struct ieee80211_ampdu_params *params,
611 struct mt7996_vif_link *link, bool enable);
612 int mt7996_mcu_update_bss_color(struct mt7996_dev *dev,
613 struct mt76_vif_link *mlink,
614 struct cfg80211_he_bss_color *he_bss_color);
615 int mt7996_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
616 struct ieee80211_bss_conf *link_conf);
617 int mt7996_mcu_beacon_inband_discov(struct mt7996_dev *dev,
618 struct ieee80211_bss_conf *link_conf,
619 struct mt7996_vif_link *link, u32 changed);
620 int mt7996_mcu_add_obss_spr(struct mt7996_phy *phy,
621 struct mt7996_vif_link *link,
622 struct ieee80211_he_obss_pd *he_obss_pd);
623 int mt7996_mcu_add_rate_ctrl(struct mt7996_dev *dev, struct mt7996_sta *msta,
624 struct ieee80211_vif *vif, u8 link_id,
625 bool changed);
626 int mt7996_set_channel(struct mt76_phy *mphy);
627 int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag);
628 int mt7996_mcu_set_tx(struct mt7996_dev *dev, struct ieee80211_vif *vif,
629 struct ieee80211_bss_conf *link_conf);
630 int mt7996_mcu_set_fixed_rate_ctrl(struct mt7996_dev *dev,
631 void *data, u16 version);
632 int mt7996_mcu_set_fixed_field(struct mt7996_dev *dev, struct mt7996_sta *msta,
633 void *data, u8 link_id, u32 field);
634 int mt7996_mcu_set_eeprom(struct mt7996_dev *dev);
635 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len);
636 int mt7996_mcu_get_eeprom_free_block(struct mt7996_dev *dev, u8 *block_num);
637 int mt7996_mcu_get_chip_config(struct mt7996_dev *dev, u32 *cap);
638 int mt7996_mcu_set_ser(struct mt7996_dev *dev, u8 action, u8 set, u8 band);
639 int mt7996_mcu_set_txbf(struct mt7996_dev *dev, u8 action);
640 int mt7996_mcu_set_fcc5_lpn(struct mt7996_dev *dev, int val);
641 int mt7996_mcu_set_pulse_th(struct mt7996_dev *dev,
642 const struct mt7996_dfs_pulse *pulse);
643 int mt7996_mcu_set_radar_th(struct mt7996_dev *dev, int index,
644 const struct mt7996_dfs_pattern *pattern);
645 int mt7996_mcu_set_radio_en(struct mt7996_phy *phy, bool enable);
646 int mt7996_mcu_set_rts_thresh(struct mt7996_phy *phy, u32 val);
647 int mt7996_mcu_set_timing(struct mt7996_phy *phy, struct ieee80211_vif *vif,
648 struct ieee80211_bss_conf *link_conf);
649 int mt7996_mcu_get_chan_mib_info(struct mt7996_phy *phy, bool chan_switch);
650 int mt7996_mcu_get_temperature(struct mt7996_phy *phy);
651 int mt7996_mcu_set_thermal_throttling(struct mt7996_phy *phy, u8 state);
652 int mt7996_mcu_set_thermal_protect(struct mt7996_phy *phy, bool enable);
653 int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy);
654 int mt7996_mcu_rdd_cmd(struct mt7996_dev *dev, int cmd, u8 rdd_idx, u8 val);
655 int mt7996_mcu_rdd_background_enable(struct mt7996_phy *phy,
656 struct cfg80211_chan_def *chandef);
657 int mt7996_mcu_set_fixed_rate_table(struct mt7996_phy *phy, u8 table_idx,
658 u16 rate_idx, bool beacon);
659 int mt7996_mcu_rf_regval(struct mt7996_dev *dev, u32 regidx, u32 *val, bool set);
660 int mt7996_mcu_set_hdr_trans(struct mt7996_dev *dev, bool hdr_trans);
661 int mt7996_mcu_set_rro(struct mt7996_dev *dev, u16 tag, u16 val);
662 int mt7996_mcu_wa_cmd(struct mt7996_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
663 int mt7996_mcu_fw_log_2_host(struct mt7996_dev *dev, u8 type, u8 ctrl);
664 int mt7996_mcu_fw_dbg_ctrl(struct mt7996_dev *dev, u32 module, u8 level);
665 int mt7996_mcu_trigger_assert(struct mt7996_dev *dev);
666 void mt7996_mcu_rx_event(struct mt7996_dev *dev, struct sk_buff *skb);
667 void mt7996_mcu_exit(struct mt7996_dev *dev);
668 int mt7996_mcu_get_all_sta_info(struct mt7996_phy *phy, u16 tag);
669 int mt7996_mcu_wed_rro_reset_sessions(struct mt7996_dev *dev, u16 id);
670 int mt7996_mcu_set_sniffer_mode(struct mt7996_phy *phy, bool enabled);
671
mt7996_max_interface_num(struct mt7996_dev * dev)672 static inline u8 mt7996_max_interface_num(struct mt7996_dev *dev)
673 {
674 return min(MT7996_MAX_INTERFACES * (1 + mt7996_band_valid(dev, MT_BAND1) +
675 mt7996_band_valid(dev, MT_BAND2)),
676 MT7996_WTBL_BMC_SIZE);
677 }
678
mt7996_wtbl_size(struct mt7996_dev * dev)679 static inline u16 mt7996_wtbl_size(struct mt7996_dev *dev)
680 {
681 return (dev->wtbl_size_group << 8) + MT7996_WTBL_BMC_SIZE;
682 }
683
684 void mt7996_dual_hif_set_irq_mask(struct mt7996_dev *dev, bool write_reg,
685 u32 clear, u32 set);
686
mt7996_irq_enable(struct mt7996_dev * dev,u32 mask)687 static inline void mt7996_irq_enable(struct mt7996_dev *dev, u32 mask)
688 {
689 if (dev->hif2)
690 mt7996_dual_hif_set_irq_mask(dev, false, 0, mask);
691 else
692 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
693
694 tasklet_schedule(&dev->mt76.irq_tasklet);
695 }
696
mt7996_irq_disable(struct mt7996_dev * dev,u32 mask)697 static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask)
698 {
699 if (dev->hif2)
700 mt7996_dual_hif_set_irq_mask(dev, true, mask, 0);
701 else
702 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
703 }
704
705 void mt7996_memcpy_fromio(struct mt7996_dev *dev, void *buf, u32 offset,
706 size_t len);
707
mt7996_rx_chainmask(struct mt7996_phy * phy)708 static inline u16 mt7996_rx_chainmask(struct mt7996_phy *phy)
709 {
710 int max_nss = hweight8(phy->mt76->hw->wiphy->available_antennas_tx);
711 int cur_nss = hweight8(phy->mt76->antenna_mask);
712 u16 tx_chainmask = phy->mt76->chainmask;
713
714 if (cur_nss != max_nss)
715 return tx_chainmask;
716
717 return tx_chainmask | (BIT(fls(tx_chainmask)) * phy->has_aux_rx);
718 }
719
mt7996_has_wa(struct mt7996_dev * dev)720 static inline bool mt7996_has_wa(struct mt7996_dev *dev)
721 {
722 return !is_mt7990(&dev->mt76);
723 }
724
725 void mt7996_mac_init(struct mt7996_dev *dev);
726 u32 mt7996_mac_wtbl_lmac_addr(struct mt7996_dev *dev, u16 wcid, u8 dw);
727 bool mt7996_mac_wtbl_update(struct mt7996_dev *dev, int idx, u32 mask);
728 void mt7996_mac_reset_counters(struct mt7996_phy *phy);
729 void mt7996_mac_cca_stats_reset(struct mt7996_phy *phy);
730 void mt7996_mac_enable_nf(struct mt7996_dev *dev, u8 band);
731 void mt7996_mac_write_txwi(struct mt7996_dev *dev, __le32 *txwi,
732 struct sk_buff *skb, struct mt76_wcid *wcid,
733 struct ieee80211_key_conf *key, int pid,
734 enum mt76_txq_id qid, u32 changed);
735 void mt7996_mac_set_coverage_class(struct mt7996_phy *phy);
736 void mt7996_mac_work(struct work_struct *work);
737 void mt7996_mac_reset_work(struct work_struct *work);
738 void mt7996_mac_dump_work(struct work_struct *work);
739 void mt7996_mac_sta_rc_work(struct work_struct *work);
740 void mt7996_mac_update_stats(struct mt7996_phy *phy);
741 void mt7996_mac_twt_teardown_flow(struct mt7996_dev *dev,
742 struct mt7996_vif_link *link,
743 struct mt7996_sta_link *msta_link,
744 u8 flowid);
745 void mt7996_mac_add_twt_setup(struct ieee80211_hw *hw,
746 struct ieee80211_sta *sta,
747 struct ieee80211_twt_setup *twt);
748 int mt7996_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
749 enum mt76_txq_id qid, struct mt76_wcid *wcid,
750 struct ieee80211_sta *sta,
751 struct mt76_tx_info *tx_info);
752 void mt7996_tx_token_put(struct mt7996_dev *dev);
753 void mt7996_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
754 struct sk_buff *skb, u32 *info);
755 bool mt7996_rx_check(struct mt76_dev *mdev, void *data, int len);
756 void mt7996_stats_work(struct work_struct *work);
757 int mt76_dfs_start_rdd(struct mt7996_dev *dev, bool force);
758 int mt7996_dfs_init_radar_detector(struct mt7996_phy *phy);
759 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy);
760 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy);
761 void mt7996_update_channel(struct mt76_phy *mphy);
762 int mt7996_init_debugfs(struct mt7996_dev *dev);
763 void mt7996_debugfs_rx_fw_monitor(struct mt7996_dev *dev, const void *data, int len);
764 bool mt7996_debugfs_rx_log(struct mt7996_dev *dev, const void *data, int len);
765 int mt7996_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
766 struct ieee80211_key_conf *key, int mcu_cmd,
767 struct mt76_wcid *wcid, enum set_key_cmd cmd);
768 int mt7996_mcu_bcn_prot_enable(struct mt7996_dev *dev,
769 struct mt7996_vif_link *link,
770 struct mt7996_sta_link *msta_link,
771 struct ieee80211_key_conf *key);
772 int mt7996_mcu_wtbl_update_hdr_trans(struct mt7996_dev *dev,
773 struct ieee80211_vif *vif,
774 struct mt7996_vif_link *link,
775 struct mt7996_sta_link *msta_link);
776 int mt7996_mcu_cp_support(struct mt7996_dev *dev, u8 mode);
777 #ifdef CONFIG_MAC80211_DEBUGFS
778 void mt7996_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
779 struct ieee80211_sta *sta, struct dentry *dir);
780 #endif
781 int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr,
782 bool hif2, int *irq);
783 u32 mt7996_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
784
785 #ifdef CONFIG_MTK_DEBUG
786 int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir);
787 #endif
788
789 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
790 int mt7996_dma_rro_init(struct mt7996_dev *dev);
791 #endif /* CONFIG_NET_MEDIATEK_SOC_WED */
792
793 #endif
794