| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankSelect.cpp | 130 const RegisterBank *RB) { in reAssignRegBankOnDef()
169 const RegisterBank *RB) { in constrainRegBankUse()
262 const RegisterBank *RB = RBSHelper.getRegBankToAssign(DefReg); in runOnMachineFunction() local
284 const RegisterBank *RB = RBSHelper.getRegBankToAssign(UseReg); in runOnMachineFunction() local
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| H A D | AMDGPURegBankLegalizeHelper.cpp | 413 const RegisterBank *RB = MRI.getRegBank(MI.getOperand(0).getReg()); in lower() local
726 [[maybe_unused]] const RegisterBank *RB = MRI.getRegBank(Reg); in applyMappingDst() local
845 const RegisterBank *RB = MRI.getRegBank(Reg); in applyMappingSrc() local
1031 const RegisterBank *RB, in verifyRegBankOnOperands()
1043 const RegisterBank *RB = MRI.getRegBank(MI.getOperand(0).getReg()); in applyMappingTrivial() local
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| H A D | AMDGPURegBankLegalize.cpp | 119 const RegisterBank *RB = MRI.getRegBankOrNull(Reg); in isLaneMask() local
247 const RegisterBank *RB = MRI.getRegBankOrNull(Reg); in getAnySgprS1() local
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| H A D | AMDGPURegBankCombiner.cpp | 381 auto &RB = *MRI.getRegBank(AmtReg); in applyCanonicalizeZextShiftAmt() local
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| /freebsd/contrib/llvm-project/clang/lib/Rewrite/ |
| H A D | HTMLRewrite.cpp | 59 void html::HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E, in HighlightRange()
143 RewriteBuffer &RB = R.getEditBuffer(FID); in EscapeText() local
236 static void AddLineNumber(RewriteBuffer &RB, unsigned LineNo, in AddLineNumber()
260 RewriteBuffer &RB = R.getEditBuffer(FID); in AddLineNumbers() local
478 RewriteBuffer &RB = R.getEditBuffer(FID); in SyntaxHighlightImpl() local
564 RewriteBuffer &RB = R.getEditBuffer(FID); in SyntaxHighlight() local
583 const char *StartTag, const char *EndTag) { in SyntaxHighlight()
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| H A D | Rewriter.cpp | 63 const RewriteBuffer &RB = I->second; in getRangeSize() local
114 const RewriteBuffer &RB = I->second; in getRewrittenText() local
300 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
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| /freebsd/contrib/llvm-project/compiler-rt/lib/scudo/standalone/ |
| H A D | combined.h | 193 AllocationRingBuffer *RB = getRingBuffer(); in enableRingBuffer() local
201 AllocationRingBuffer *RB = getRingBuffer(); in disableRingBuffer() local
854 AllocationRingBuffer *RB = getRingBuffer(); in getStackDepotAddress() local
860 AllocationRingBuffer *RB = getRingBuffer(); in getStackDepotSize() local
879 AllocationRingBuffer *RB = getRingBuffer(); in getRingBufferSize() local
1410 AllocationRingBuffer *RB = getRingBuffer(); in storePrimaryAllocationStackMaybe() local
1418 void storeRingBufferEntry(AllocationRingBuffer *RB, void *Ptr, in storeRingBufferEntry()
1447 AllocationRingBuffer *RB = getRingBuffer(); in storeSecondaryAllocationStackMaybe() local
1464 AllocationRingBuffer *RB = getRingBuffer(); in storeDeallocationStackMaybe() local
1651 getRingBufferEntry(AllocationRingBuffer *RB, uptr N) { in getRingBufferEntry()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCExpandAtomicPseudoInsts.cpp | 153 Register RB = MI.getOperand(3).getReg(); in expandAtomicRMW128() local
229 Register RB = MI.getOperand(3).getReg(); in expandAtomicCmpSwap128() local
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| /freebsd/contrib/llvm-project/clang/lib/Frontend/Rewrite/ |
| H A D | RewriteMacros.cpp | 93 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
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| /freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_ring_buffer.h | 27 RingBuffer *RB = reinterpret_cast<RingBuffer*>(Ptr); in New() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBankInfo.cpp | 254 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
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| H A D | PPCInstructionSelector.cpp | 103 static const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank *RB) { in getRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 266 const RegisterBank &RB = *cast<const RegisterBank *>(RegClassOrBank); in selectDebugInstr() local
454 const RegisterBank &RB, in getPtrLoadStoreOp()
473 const RegisterBank &RB, in getLoadStoreOp()
639 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
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| H A D | X86RegisterBankInfo.cpp | 87 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 104 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
526 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
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| H A D | AArch64InstructionSelector.cpp | 571 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
607 getMinClassForRegBank(const RegisterBank &RB, TypeSize SizeInBits, in getMinClassForRegBank()
684 static unsigned getMinSizeForRegBank(const RegisterBank &RB) { in getMinSizeForRegBank()
1000 const RegisterBank &RB = *cast<const RegisterBank *>(RegClassOrBank); in selectDebugInstr() local
2606 const RegisterBank &RB = *cast<const RegisterBank *>(RegClassOrBank); in select() local
2739 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
3068 const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI); in select() local
3234 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in select() local
3926 const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI); in selectMergeValues() local
4347 getInsertVecEltOpInfo(const RegisterBank &RB, unsigned EltSize) { in getInsertVecEltOpInfo()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 94 if (auto *RB = dyn_cast_if_present<const RegisterBank *>(RegClassOrBank)) in getRegBank() local
139 const RegisterBank *RB = cast<const RegisterBank *>(RegClassOrBank); in constrainGenericRegister() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 606 virtual bool isDivergentRegBank(const RegisterBank *RB) const { in isDivergentRegBank()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEInfo.cpp | 372 if (const auto *RB = dyn_cast_if_present<const RegisterBank *>(RCOrRB)) in addNodeIDRegType() local
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| H A D | RegBankSelect.cpp | 644 const RegisterBank *RB = in assignInstr() local
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| /freebsd/contrib/llvm-project/clang/lib/Frontend/ |
| H A D | ASTUnit.cpp | 185 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in getBufferForFileHandlingRemapping() local
260 for (const auto &RB : PPOpts.RemappedFileBuffers) in ~ASTUnit() local
1896 for (const auto &RB : PPOpts.RemappedFileBuffers) in Reparse() local
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| H A D | PrecompiledPreamble.cpp | 648 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in CanReuse() local
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherGen.cpp | 724 const CodeGenRegBank &RB = CGP.getTargetInfo().getRegBank(); in EmitResultLeafAsOperand() local
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| /freebsd/sys/contrib/openzfs/module/lua/ |
| H A D | lvm.c | 552 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
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