xref: /linux/drivers/media/tuners/qt1010_priv.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  Driver for Quantek QT1010 silicon tuner
4  *
5  *  Copyright (C) 2006 Antti Palosaari <crope@iki.fi>
6  *                     Aapo Tahkola <aet@rasterburn.org>
7  */
8 
9 #ifndef QT1010_PRIV_H
10 #define QT1010_PRIV_H
11 
12 /*
13 reg def meaning
14 === === =======
15 00  00  ?
16 01  a0  ? operation start/stop; start=80, stop=00
17 02  00  ?
18 03  19  ?
19 04  00  ?
20 05  00  ? maybe band selection
21 06  00  ?
22 07  2b  set frequency: 32 MHz scale, n*32 MHz
23 08  0b  ?
24 09  10  ? changes every 8/24 MHz; values 1d/1c
25 0a  08  set frequency: 4 MHz scale, n*4 MHz
26 0b  41  ? changes every 2/2 MHz; values 45/45
27 0c  e1  ?
28 0d  94  ?
29 0e  b6  ?
30 0f  2c  ?
31 10  10  ?
32 11  f1  ? maybe device specified adjustment
33 12  11  ? maybe device specified adjustment
34 13  3f  ?
35 14  1f  ?
36 15  3f  ?
37 16  ff  ?
38 17  ff  ?
39 18  f7  ?
40 19  80  ?
41 1a  d0  set frequency: 125 kHz scale, n*125 kHz
42 1b  00  ?
43 1c  89  ?
44 1d  00  ?
45 1e  00  ? looks like operation register; write cmd here, read result from 1f-26
46 1f  20  ? chip initialization
47 20  e0  ? chip initialization
48 21  20  ?
49 22  d0  ?
50 23  d0  ?
51 24  d0  ?
52 25  40  ? chip initialization
53 26  08  ?
54 27  29  ?
55 28  55  ?
56 29  39  ?
57 2a  13  ?
58 2b  01  ?
59 2c  ea  ?
60 2d  00  ?
61 2e  00  ? not used?
62 2f  00  ? not used?
63 */
64 
65 #define QT1010_STEP         (125 * kHz) /*
66 					 * used by Windows drivers,
67 				         * hw could be more precise but we don't
68 				         * know how to use
69 					 */
70 #define QT1010_MIN_FREQ   (48 * MHz)
71 #define QT1010_MAX_FREQ  (860 * MHz)
72 #define QT1010_OFFSET   (1246 * MHz)
73 
74 #define QT1010_WR 0
75 #define QT1010_RD 1
76 #define QT1010_M1 3
77 
78 typedef struct {
79 	u8 oper, reg, val;
80 } qt1010_i2c_oper_t;
81 
82 struct qt1010_priv {
83 	struct qt1010_config *cfg;
84 	struct i2c_adapter   *i2c;
85 
86 	u8 reg1f_init_val;
87 	u8 reg20_init_val;
88 	u8 reg25_init_val;
89 
90 	u32 frequency;
91 };
92 
93 #endif
94