1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #ifndef __QLA_BSG_H 7 #define __QLA_BSG_H 8 9 /* BSG Vendor specific commands */ 10 #define QL_VND_LOOPBACK 0x01 11 #define QL_VND_A84_RESET 0x02 12 #define QL_VND_A84_UPDATE_FW 0x03 13 #define QL_VND_A84_MGMT_CMD 0x04 14 #define QL_VND_IIDMA 0x05 15 #define QL_VND_FCP_PRIO_CFG_CMD 0x06 16 #define QL_VND_READ_FLASH 0x07 17 #define QL_VND_UPDATE_FLASH 0x08 18 #define QL_VND_SET_FRU_VERSION 0x0B 19 #define QL_VND_READ_FRU_STATUS 0x0C 20 #define QL_VND_WRITE_FRU_STATUS 0x0D 21 #define QL_VND_DIAG_IO_CMD 0x0A 22 #define QL_VND_WRITE_I2C 0x10 23 #define QL_VND_READ_I2C 0x11 24 #define QL_VND_FX00_MGMT_CMD 0x12 25 #define QL_VND_SERDES_OP 0x13 26 #define QL_VND_SERDES_OP_EX 0x14 27 #define QL_VND_GET_FLASH_UPDATE_CAPS 0x15 28 #define QL_VND_SET_FLASH_UPDATE_CAPS 0x16 29 #define QL_VND_GET_BBCR_DATA 0x17 30 #define QL_VND_GET_PRIV_STATS 0x18 31 #define QL_VND_DPORT_DIAGNOSTICS 0x19 32 #define QL_VND_GET_PRIV_STATS_EX 0x1A 33 #define QL_VND_SS_GET_FLASH_IMAGE_STATUS 0x1E 34 #define QL_VND_EDIF_MGMT 0X1F 35 #define QL_VND_GET_DRV_ATTR 0x22 36 #define QL_VND_MANAGE_HOST_STATS 0x23 37 #define QL_VND_GET_HOST_STATS 0x24 38 #define QL_VND_GET_TGT_STATS 0x25 39 #define QL_VND_MANAGE_HOST_PORT 0x26 40 #define QL_VND_MBX_PASSTHRU 0x2B 41 #define QL_VND_DPORT_DIAGNOSTICS_V2 0x2C 42 #define QL_VND_IMG_SET_VALID 0x30 43 44 /* BSG Vendor specific subcode returns */ 45 #define EXT_STATUS_OK 0 46 #define EXT_STATUS_ERR 1 47 #define EXT_STATUS_BUSY 2 48 #define EXT_STATUS_INVALID_PARAM 6 49 #define EXT_STATUS_DATA_OVERRUN 7 50 #define EXT_STATUS_DATA_UNDERRUN 8 51 #define EXT_STATUS_MAILBOX 11 52 #define EXT_STATUS_BUFFER_TOO_SMALL 16 53 #define EXT_STATUS_NO_MEMORY 17 54 #define EXT_STATUS_DEVICE_OFFLINE 22 55 #define EXT_STATUS_IMG_SET_VALID_ERR 47 56 #define EXT_STATUS_IMG_SET_CONFIG_ERR 48 57 58 /* 59 * To support bidirectional iocb 60 * BSG Vendor specific returns 61 */ 62 #define EXT_STATUS_NOT_SUPPORTED 27 63 #define EXT_STATUS_INVALID_CFG 28 64 #define EXT_STATUS_DMA_ERR 29 65 #define EXT_STATUS_TIMEOUT 30 66 #define EXT_STATUS_THREAD_FAILED 31 67 #define EXT_STATUS_DATA_CMP_FAILED 32 68 #define EXT_STATUS_DPORT_DIAG_ERR 40 69 #define EXT_STATUS_DPORT_DIAG_IN_PROCESS 41 70 #define EXT_STATUS_DPORT_DIAG_NOT_RUNNING 42 71 72 /* BSG definations for interpreting CommandSent field */ 73 #define INT_DEF_LB_LOOPBACK_CMD 0 74 #define INT_DEF_LB_ECHO_CMD 1 75 76 /* Loopback related definations */ 77 #define INTERNAL_LOOPBACK 0xF1 78 #define EXTERNAL_LOOPBACK 0xF2 79 #define ENABLE_INTERNAL_LOOPBACK 0x02 80 #define ENABLE_EXTERNAL_LOOPBACK 0x04 81 #define INTERNAL_LOOPBACK_MASK 0x000E 82 #define MAX_ELS_FRAME_PAYLOAD 252 83 #define ELS_OPCODE_BYTE 0x10 84 85 /* BSG Vendor specific definations */ 86 #define A84_ISSUE_WRITE_TYPE_CMD 0 87 #define A84_ISSUE_READ_TYPE_CMD 1 88 #define A84_CLEANUP_CMD 2 89 #define A84_ISSUE_RESET_OP_FW 3 90 #define A84_ISSUE_RESET_DIAG_FW 4 91 #define A84_ISSUE_UPDATE_OPFW_CMD 5 92 #define A84_ISSUE_UPDATE_DIAGFW_CMD 6 93 94 struct qla84_mgmt_param { 95 union { 96 struct { 97 uint32_t start_addr; 98 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */ 99 struct { 100 uint32_t id; 101 #define QLA84_MGMT_CONFIG_ID_UIF 1 102 #define QLA84_MGMT_CONFIG_ID_FCOE_COS 2 103 #define QLA84_MGMT_CONFIG_ID_PAUSE 3 104 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4 105 106 uint32_t param0; 107 uint32_t param1; 108 } config; /* for QLA84_MGMT_CHNG_CONFIG */ 109 110 struct { 111 uint32_t type; 112 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */ 113 #define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */ 114 #define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */ 115 #define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */ 116 #define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */ 117 #define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */ 118 #define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */ 119 120 uint32_t context; 121 /* 122 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA 123 */ 124 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 125 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 126 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 127 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 128 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 129 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 130 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 131 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 132 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 133 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 134 135 /* 136 * context definitions for QLA84_MGMT_INFO_PORT_STAT 137 */ 138 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 139 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 140 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 141 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 142 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 143 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 144 145 146 /* 147 * context definitions for QLA84_MGMT_INFO_LIF_STAT 148 */ 149 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 150 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 151 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 152 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 153 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 154 155 } info; /* for QLA84_MGMT_GET_INFO */ 156 } u; 157 }; 158 159 struct qla84_msg_mgmt { 160 uint16_t cmd; 161 #define QLA84_MGMT_READ_MEM 0x00 162 #define QLA84_MGMT_WRITE_MEM 0x01 163 #define QLA84_MGMT_CHNG_CONFIG 0x02 164 #define QLA84_MGMT_GET_INFO 0x03 165 uint16_t rsrvd; 166 struct qla84_mgmt_param mgmtp;/* parameters for cmd */ 167 uint32_t len; /* bytes in payload following this struct */ 168 uint8_t payload[]; /* payload for cmd */ 169 }; 170 171 struct qla_bsg_a84_mgmt { 172 struct qla84_msg_mgmt mgmt; 173 } __attribute__ ((packed)); 174 175 struct qla_scsi_addr { 176 uint16_t bus; 177 uint16_t target; 178 } __attribute__ ((packed)); 179 180 struct qla_ext_dest_addr { 181 union { 182 uint8_t wwnn[8]; 183 uint8_t wwpn[8]; 184 uint8_t id[4]; 185 struct qla_scsi_addr scsi_addr; 186 } dest_addr; 187 uint16_t dest_type; 188 #define EXT_DEF_TYPE_WWPN 2 189 uint16_t lun; 190 uint16_t padding[2]; 191 } __attribute__ ((packed)); 192 193 struct qla_port_param { 194 struct qla_ext_dest_addr fc_scsi_addr; 195 uint16_t mode; 196 uint16_t speed; 197 } __attribute__ ((packed)); 198 199 struct qla_mbx_passthru { 200 uint16_t reserved1[2]; 201 uint16_t mbx_in[32]; 202 uint16_t mbx_out[32]; 203 uint32_t reserved2[16]; 204 } __packed; 205 206 /* FRU VPD */ 207 208 #define MAX_FRU_SIZE 36 209 210 struct qla_field_address { 211 uint16_t offset; 212 uint16_t device; 213 uint16_t option; 214 } __packed; 215 216 struct qla_field_info { 217 uint8_t version[MAX_FRU_SIZE]; 218 } __packed; 219 220 struct qla_image_version { 221 struct qla_field_address field_address; 222 struct qla_field_info field_info; 223 } __packed; 224 225 struct qla_image_version_list { 226 uint32_t count; 227 struct qla_image_version version[]; 228 } __packed; 229 230 struct qla_status_reg { 231 struct qla_field_address field_address; 232 uint8_t status_reg; 233 uint8_t reserved[7]; 234 } __packed; 235 236 struct qla_i2c_access { 237 uint16_t device; 238 uint16_t offset; 239 uint16_t option; 240 uint16_t length; 241 uint8_t buffer[0x40]; 242 } __packed; 243 244 /* 26xx serdes register interface */ 245 246 /* serdes reg commands */ 247 #define INT_SC_SERDES_READ_REG 1 248 #define INT_SC_SERDES_WRITE_REG 2 249 250 struct qla_serdes_reg { 251 uint16_t cmd; 252 uint16_t addr; 253 uint16_t val; 254 } __packed; 255 256 struct qla_serdes_reg_ex { 257 uint16_t cmd; 258 uint32_t addr; 259 uint32_t val; 260 } __packed; 261 262 struct qla_flash_update_caps { 263 uint64_t capabilities; 264 uint32_t outage_duration; 265 uint8_t reserved[20]; 266 } __packed; 267 268 /* BB_CR Status */ 269 #define QLA_BBCR_STATUS_DISABLED 0 270 #define QLA_BBCR_STATUS_ENABLED 1 271 #define QLA_BBCR_STATUS_UNKNOWN 2 272 273 /* BB_CR State */ 274 #define QLA_BBCR_STATE_OFFLINE 0 275 #define QLA_BBCR_STATE_ONLINE 1 276 277 /* BB_CR Offline Reason Code */ 278 #define QLA_BBCR_REASON_PORT_SPEED 1 279 #define QLA_BBCR_REASON_PEER_PORT 2 280 #define QLA_BBCR_REASON_SWITCH 3 281 #define QLA_BBCR_REASON_LOGIN_REJECT 4 282 283 struct qla_bbcr_data { 284 uint8_t status; /* 1 - enabled, 0 - Disabled */ 285 uint8_t state; /* 1 - online, 0 - offline */ 286 uint8_t configured_bbscn; /* 0-15 */ 287 uint8_t negotiated_bbscn; /* 0-15 */ 288 uint8_t offline_reason_code; 289 uint16_t mbx1; /* Port state */ 290 uint8_t reserved[9]; 291 } __packed; 292 293 struct qla_dport_diag { 294 uint16_t options; 295 uint32_t buf[16]; 296 uint8_t unused[62]; 297 } __packed; 298 299 #define QLA_GET_DPORT_RESULT_V2 0 /* Get Result */ 300 #define QLA_RESTART_DPORT_TEST_V2 1 /* Restart test */ 301 #define QLA_START_DPORT_TEST_V2 2 /* Start test */ 302 struct qla_dport_diag_v2 { 303 uint16_t options; 304 uint16_t mbx1; 305 uint16_t mbx2; 306 uint8_t unused[58]; 307 uint8_t buf[1024]; /* Test Result */ 308 } __packed; 309 310 /* D_Port options */ 311 #define QLA_DPORT_RESULT 0x0 312 #define QLA_DPORT_START 0x2 313 314 /* active images in flash */ 315 struct qla_active_regions { 316 uint8_t global_image; 317 uint8_t board_config; 318 uint8_t vpd_nvram; 319 uint8_t npiv_config_0_1; 320 uint8_t npiv_config_2_3; 321 uint8_t nvme_params; 322 uint8_t reserved[31]; 323 } __packed; 324 325 struct qla_drv_attr { 326 uint32_t attributes; 327 u32 ext_attributes; 328 #define QLA_IMG_SET_VALID_SUPPORT BIT_4 329 u32 status_flags; 330 uint8_t reserved[20]; 331 } __packed; 332 333 #include "qla_edif_bsg.h" 334 335 #endif 336