1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Definitions used by low-level trap handlers 4 * 5 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 6 * Copyright (C) 2007-2009 PetaLogix 7 * Copyright (C) 2007 John Williams <john.williams@petalogix.com> 8 */ 9 10 #ifndef _ASM_MICROBLAZE_ENTRY_H 11 #define _ASM_MICROBLAZE_ENTRY_H 12 13 #include <asm/percpu.h> 14 #include <asm/ptrace.h> 15 #include <linux/linkage.h> 16 17 /* 18 * These are per-cpu variables required in entry.S, among other 19 * places 20 */ 21 22 #define PER_CPU(var) var 23 24 /* 25 * The MicroBlaze ABI has the caller reserve an argument home area: 26 * REG_PARM_STACK_SPACE is 24 and OUTGOING_REG_PARM_STACK_SPACE is 1, so a 27 * callee may write to [caller_sp + 4, caller_sp + 28). The kernel calls C 28 * with r1 at the frame base, so reserve that area below pt_regs and reach 29 * the saved registers through PTO. This restores what 6e83557c38b4 30 * ("microblaze: Remove r0_ram pointer and PTO alignment") removed; the old 31 * value of 24 was one word short and left the last argument slot 32 * overlapping pt_regs' r0. 33 */ 34 #define PTO 28 35 #define STATE_SAVE_SIZE (PT_SIZE + PTO) 36 37 # ifndef __ASSEMBLER__ 38 DECLARE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */ 39 DECLARE_PER_CPU(unsigned int, KM); /* Kernel/user mode */ 40 DECLARE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */ 41 DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */ 42 DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */ 43 44 extern asmlinkage void do_notify_resume(struct pt_regs *regs, int in_syscall); 45 # endif /* __ASSEMBLER__ */ 46 47 #endif /* _ASM_MICROBLAZE_ENTRY_H */ 48