1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/leds.h>
18 #include <linux/linkmode.h>
19 #include <linux/netlink.h>
20 #include <linux/mdio.h>
21 #include <linux/mii.h>
22 #include <linux/mii_timestamper.h>
23 #include <linux/module.h>
24 #include <linux/timer.h>
25 #include <linux/workqueue.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/u64_stats_sync.h>
28 #include <linux/irqreturn.h>
29 #include <linux/iopoll.h>
30 #include <linux/refcount.h>
31
32 #include <linux/atomic.h>
33 #include <net/eee.h>
34
35 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
36 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
37 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
38 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
39 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;
43
44 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
45 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
46 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
47 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
48 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
49 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
50 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
51 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features)
52
53 extern const int phy_basic_ports_array[3];
54
55 /*
56 * Set phydev->irq to PHY_POLL if interrupts are not supported,
57 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
58 * the attached MAC driver handles the interrupt
59 */
60 #define PHY_POLL -1
61 #define PHY_MAC_INTERRUPT -2
62
63 #define PHY_IS_INTERNAL 0x00000001
64 #define PHY_RST_AFTER_CLK_EN 0x00000002
65 #define PHY_POLL_CABLE_TEST 0x00000004
66 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008
67 #define MDIO_DEVICE_IS_PHY 0x80000000
68
69 /**
70 * enum phy_interface_t - Interface Mode definitions
71 *
72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
73 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
74 * @PHY_INTERFACE_MODE_MII: Media-independent interface
75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
77 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
78 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
79 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
80 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
82 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
83 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
84 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal TX delay
85 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
86 * @PHY_INTERFACE_MODE_SMII: Serial MII
87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
89 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
90 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
91 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
92 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
93 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
94 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
95 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
96 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
97 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
98 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
99 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
100 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
101 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
103 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII
106 * @PHY_INTERFACE_MODE_MAX: Book keeping
107 *
108 * Describes the interface between the MAC and PHY.
109 */
110 typedef enum {
111 PHY_INTERFACE_MODE_NA,
112 PHY_INTERFACE_MODE_INTERNAL,
113 PHY_INTERFACE_MODE_MII,
114 PHY_INTERFACE_MODE_GMII,
115 PHY_INTERFACE_MODE_SGMII,
116 PHY_INTERFACE_MODE_TBI,
117 PHY_INTERFACE_MODE_REVMII,
118 PHY_INTERFACE_MODE_RMII,
119 PHY_INTERFACE_MODE_REVRMII,
120 PHY_INTERFACE_MODE_RGMII,
121 PHY_INTERFACE_MODE_RGMII_ID,
122 PHY_INTERFACE_MODE_RGMII_RXID,
123 PHY_INTERFACE_MODE_RGMII_TXID,
124 PHY_INTERFACE_MODE_RTBI,
125 PHY_INTERFACE_MODE_SMII,
126 PHY_INTERFACE_MODE_XGMII,
127 PHY_INTERFACE_MODE_XLGMII,
128 PHY_INTERFACE_MODE_MOCA,
129 PHY_INTERFACE_MODE_PSGMII,
130 PHY_INTERFACE_MODE_QSGMII,
131 PHY_INTERFACE_MODE_TRGMII,
132 PHY_INTERFACE_MODE_100BASEX,
133 PHY_INTERFACE_MODE_1000BASEX,
134 PHY_INTERFACE_MODE_2500BASEX,
135 PHY_INTERFACE_MODE_5GBASER,
136 PHY_INTERFACE_MODE_RXAUI,
137 PHY_INTERFACE_MODE_XAUI,
138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
139 PHY_INTERFACE_MODE_10GBASER,
140 PHY_INTERFACE_MODE_25GBASER,
141 PHY_INTERFACE_MODE_USXGMII,
142 /* 10GBASE-KR - with Clause 73 AN */
143 PHY_INTERFACE_MODE_10GKR,
144 PHY_INTERFACE_MODE_QUSGMII,
145 PHY_INTERFACE_MODE_1000BASEKX,
146 PHY_INTERFACE_MODE_10G_QXGMII,
147 PHY_INTERFACE_MODE_MAX,
148 } phy_interface_t;
149
150 /* PHY interface mode bitmap handling */
151 #define DECLARE_PHY_INTERFACE_MASK(name) \
152 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
153
phy_interface_zero(unsigned long * intf)154 static inline void phy_interface_zero(unsigned long *intf)
155 {
156 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
157 }
158
phy_interface_empty(const unsigned long * intf)159 static inline bool phy_interface_empty(const unsigned long *intf)
160 {
161 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
162 }
163
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)164 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
165 const unsigned long *b)
166 {
167 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
168 }
169
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)170 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
171 const unsigned long *b)
172 {
173 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
174 }
175
phy_interface_set_rgmii(unsigned long * intf)176 static inline void phy_interface_set_rgmii(unsigned long *intf)
177 {
178 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
179 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
180 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
181 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
182 }
183
184 /**
185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
186 * @interface: enum phy_interface_t value
187 *
188 * Description: maps enum &phy_interface_t defined in this file
189 * into the device tree binding of 'phy-mode', so that Ethernet
190 * device driver can get PHY interface from device tree.
191 */
phy_modes(phy_interface_t interface)192 static inline const char *phy_modes(phy_interface_t interface)
193 {
194 switch (interface) {
195 case PHY_INTERFACE_MODE_NA:
196 return "";
197 case PHY_INTERFACE_MODE_INTERNAL:
198 return "internal";
199 case PHY_INTERFACE_MODE_MII:
200 return "mii";
201 case PHY_INTERFACE_MODE_GMII:
202 return "gmii";
203 case PHY_INTERFACE_MODE_SGMII:
204 return "sgmii";
205 case PHY_INTERFACE_MODE_TBI:
206 return "tbi";
207 case PHY_INTERFACE_MODE_REVMII:
208 return "rev-mii";
209 case PHY_INTERFACE_MODE_RMII:
210 return "rmii";
211 case PHY_INTERFACE_MODE_REVRMII:
212 return "rev-rmii";
213 case PHY_INTERFACE_MODE_RGMII:
214 return "rgmii";
215 case PHY_INTERFACE_MODE_RGMII_ID:
216 return "rgmii-id";
217 case PHY_INTERFACE_MODE_RGMII_RXID:
218 return "rgmii-rxid";
219 case PHY_INTERFACE_MODE_RGMII_TXID:
220 return "rgmii-txid";
221 case PHY_INTERFACE_MODE_RTBI:
222 return "rtbi";
223 case PHY_INTERFACE_MODE_SMII:
224 return "smii";
225 case PHY_INTERFACE_MODE_XGMII:
226 return "xgmii";
227 case PHY_INTERFACE_MODE_XLGMII:
228 return "xlgmii";
229 case PHY_INTERFACE_MODE_MOCA:
230 return "moca";
231 case PHY_INTERFACE_MODE_PSGMII:
232 return "psgmii";
233 case PHY_INTERFACE_MODE_QSGMII:
234 return "qsgmii";
235 case PHY_INTERFACE_MODE_TRGMII:
236 return "trgmii";
237 case PHY_INTERFACE_MODE_1000BASEX:
238 return "1000base-x";
239 case PHY_INTERFACE_MODE_1000BASEKX:
240 return "1000base-kx";
241 case PHY_INTERFACE_MODE_2500BASEX:
242 return "2500base-x";
243 case PHY_INTERFACE_MODE_5GBASER:
244 return "5gbase-r";
245 case PHY_INTERFACE_MODE_RXAUI:
246 return "rxaui";
247 case PHY_INTERFACE_MODE_XAUI:
248 return "xaui";
249 case PHY_INTERFACE_MODE_10GBASER:
250 return "10gbase-r";
251 case PHY_INTERFACE_MODE_25GBASER:
252 return "25gbase-r";
253 case PHY_INTERFACE_MODE_USXGMII:
254 return "usxgmii";
255 case PHY_INTERFACE_MODE_10GKR:
256 return "10gbase-kr";
257 case PHY_INTERFACE_MODE_100BASEX:
258 return "100base-x";
259 case PHY_INTERFACE_MODE_QUSGMII:
260 return "qusgmii";
261 case PHY_INTERFACE_MODE_10G_QXGMII:
262 return "10g-qxgmii";
263 default:
264 return "unknown";
265 }
266 }
267
268 /**
269 * rgmii_clock - map link speed to the clock rate
270 * @speed: link speed value
271 *
272 * Description: maps RGMII supported link speeds
273 * into the clock rates.
274 *
275 * Returns: clock rate or negative errno
276 */
rgmii_clock(int speed)277 static inline long rgmii_clock(int speed)
278 {
279 switch (speed) {
280 case SPEED_10:
281 return 2500000;
282 case SPEED_100:
283 return 25000000;
284 case SPEED_1000:
285 return 125000000;
286 default:
287 return -EINVAL;
288 }
289 }
290
291 #define PHY_MAX_ADDR 32
292
293 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
294 #define PHY_ID_FMT "%s:%02x"
295 #define PHY_ID_SIZE (MII_BUS_ID_SIZE + 3)
296
297 #define MII_BUS_ID_SIZE 61
298
299 struct device;
300 struct kernel_hwtstamp_config;
301 struct phylink;
302 struct sfp_bus;
303 struct sfp_upstream_ops;
304 struct sk_buff;
305
306 /**
307 * struct mdio_bus_stats - Statistics counters for MDIO busses
308 * @transfers: Total number of transfers, i.e. @writes + @reads
309 * @errors: Number of MDIO transfers that returned an error
310 * @writes: Number of write transfers
311 * @reads: Number of read transfers
312 * @syncp: Synchronisation for incrementing statistics
313 */
314 struct mdio_bus_stats {
315 u64_stats_t transfers;
316 u64_stats_t errors;
317 u64_stats_t writes;
318 u64_stats_t reads;
319 /* Must be last, add new statistics above */
320 struct u64_stats_sync syncp;
321 };
322
323 /**
324 * struct mii_bus - Represents an MDIO bus
325 *
326 * @owner: Who owns this device
327 * @name: User friendly name for this MDIO device, or driver name
328 * @id: Unique identifier for this bus, typical from bus hierarchy
329 * @priv: Driver private data
330 *
331 * The Bus class for PHYs. Devices which provide access to
332 * PHYs should register using this structure
333 */
334 struct mii_bus {
335 struct module *owner;
336 const char *name;
337 char id[MII_BUS_ID_SIZE];
338 void *priv;
339 /** @read: Perform a read transfer on the bus */
340 int (*read)(struct mii_bus *bus, int addr, int regnum);
341 /** @write: Perform a write transfer on the bus */
342 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
343 /** @read_c45: Perform a C45 read transfer on the bus */
344 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
345 /** @write_c45: Perform a C45 write transfer on the bus */
346 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
347 int regnum, u16 val);
348 /** @reset: Perform a reset of the bus */
349 int (*reset)(struct mii_bus *bus);
350
351 /** @stats: Statistic counters per device on the bus */
352 struct mdio_bus_stats stats[PHY_MAX_ADDR];
353
354 /**
355 * @mdio_lock: A lock to ensure that only one thing can read/write
356 * the MDIO bus at a time
357 */
358 struct mutex mdio_lock;
359
360 /** @parent: Parent device of this bus */
361 struct device *parent;
362 /** @state: State of bus structure */
363 enum {
364 MDIOBUS_ALLOCATED = 1,
365 MDIOBUS_REGISTERED,
366 MDIOBUS_UNREGISTERED,
367 MDIOBUS_RELEASED,
368 } state;
369
370 /** @dev: Kernel device representation */
371 struct device dev;
372
373 /** @mdio_map: list of all MDIO devices on bus */
374 struct mdio_device *mdio_map[PHY_MAX_ADDR];
375
376 /** @phy_mask: PHY addresses to be ignored when probing */
377 u32 phy_mask;
378
379 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
380 u32 phy_ignore_ta_mask;
381
382 /**
383 * @irq: An array of interrupts, each PHY's interrupt at the index
384 * matching its address
385 */
386 int irq[PHY_MAX_ADDR];
387
388 /** @reset_delay_us: GPIO reset pulse width in microseconds */
389 int reset_delay_us;
390 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
391 int reset_post_delay_us;
392 /** @reset_gpiod: Reset GPIO descriptor pointer */
393 struct gpio_desc *reset_gpiod;
394
395 /** @shared_lock: protect access to the shared element */
396 struct mutex shared_lock;
397
398 /** @shared: shared state across different PHYs */
399 struct phy_package_shared *shared[PHY_MAX_ADDR];
400 };
401 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
402
403 struct mii_bus *mdiobus_alloc_size(size_t size);
404
405 /**
406 * mdiobus_alloc - Allocate an MDIO bus structure
407 *
408 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
409 * for the driver to register the bus.
410 */
mdiobus_alloc(void)411 static inline struct mii_bus *mdiobus_alloc(void)
412 {
413 return mdiobus_alloc_size(0);
414 }
415
416 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
417 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
418 struct module *owner);
419 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
420 #define devm_mdiobus_register(dev, bus) \
421 __devm_mdiobus_register(dev, bus, THIS_MODULE)
422
423 void mdiobus_unregister(struct mii_bus *bus);
424 void mdiobus_free(struct mii_bus *bus);
425 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)426 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
427 {
428 return devm_mdiobus_alloc_size(dev, 0);
429 }
430
431 struct mii_bus *mdio_find_bus(const char *mdio_name);
432 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
433
434 #define PHY_INTERRUPT_DISABLED false
435 #define PHY_INTERRUPT_ENABLED true
436
437 /**
438 * enum phy_state - PHY state machine states:
439 *
440 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
441 * should be called if and only if the PHY is in this state,
442 * given that the PHY device exists.
443 * - PHY driver probe function will set the state to @PHY_READY
444 *
445 * @PHY_READY: PHY is ready to send and receive packets, but the
446 * controller is not. By default, PHYs which do not implement
447 * probe will be set to this state by phy_probe().
448 * - start will set the state to UP
449 *
450 * @PHY_UP: The PHY and attached device are ready to do work.
451 * Interrupts should be started here.
452 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
453 *
454 * @PHY_NOLINK: PHY is up, but not currently plugged in.
455 * - irq or timer will set @PHY_RUNNING if link comes back
456 * - phy_stop moves to @PHY_HALTED
457 *
458 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
459 * and/or receiving packets
460 * - irq or timer will set @PHY_NOLINK if link goes down
461 * - phy_stop moves to @PHY_HALTED
462 *
463 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
464 * is not expected to work, carrier will be indicated as down. PHY will be
465 * poll once per second, or on interrupt for it current state.
466 * Once complete, move to UP to restart the PHY.
467 * - phy_stop aborts the running test and moves to @PHY_HALTED
468 *
469 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
470 * - phy_start moves to @PHY_UP
471 *
472 * @PHY_ERROR: PHY is up, but is in an error state.
473 * - phy_stop moves to @PHY_HALTED
474 */
475 enum phy_state {
476 PHY_DOWN = 0,
477 PHY_READY,
478 PHY_HALTED,
479 PHY_ERROR,
480 PHY_UP,
481 PHY_RUNNING,
482 PHY_NOLINK,
483 PHY_CABLETEST,
484 };
485
486 #define MDIO_MMD_NUM 32
487
488 /**
489 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
490 * @devices_in_package: IEEE 802.3 devices in package register value.
491 * @mmds_present: bit vector of MMDs present.
492 * @device_ids: The device identifer for each present device.
493 */
494 struct phy_c45_device_ids {
495 u32 devices_in_package;
496 u32 mmds_present;
497 u32 device_ids[MDIO_MMD_NUM];
498 };
499
500 struct macsec_context;
501 struct macsec_ops;
502
503 /**
504 * struct phy_device - An instance of a PHY
505 *
506 * @mdio: MDIO bus this PHY is on
507 * @drv: Pointer to the driver for this PHY instance
508 * @devlink: Create a link between phy dev and mac dev, if the external phy
509 * used by current mac interface is managed by another mac interface.
510 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY
511 * from userspace, similar to ifindex. A zero index means the PHY
512 * wasn't assigned an id yet.
513 * @phy_id: UID for this device found during discovery
514 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
515 * @is_c45: Set to true if this PHY uses clause 45 addressing.
516 * @is_internal: Set to true if this PHY is internal to a MAC.
517 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
518 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
519 * @has_fixups: Set to true if this PHY has fixups/quirks.
520 * @suspended: Set to true if this PHY has been suspended successfully.
521 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
522 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
523 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
524 * @downshifted_rate: Set true if link speed has been downshifted.
525 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
526 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
527 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
528 * enabled.
529 * @state: State of the PHY for management purposes
530 * @dev_flags: Device-specific flags used by the PHY driver.
531 *
532 * - Bits [15:0] are free to use by the PHY driver to communicate
533 * driver specific behavior.
534 * - Bits [23:16] are currently reserved for future use.
535 * - Bits [31:24] are reserved for defining generic
536 * PHY driver behavior.
537 * @irq: IRQ number of the PHY's interrupt (-1 if none)
538 * @phylink: Pointer to phylink instance for this PHY
539 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
540 * @sfp_bus: SFP bus attached to this PHY's fiber port
541 * @attached_dev: The attached enet driver's device instance ptr
542 * @adjust_link: Callback for the enet controller to respond to changes: in the
543 * link state.
544 * @phy_link_change: Callback for phylink for notification of link change
545 * @macsec_ops: MACsec offloading ops.
546 *
547 * @speed: Current link speed
548 * @duplex: Current duplex
549 * @port: Current port
550 * @pause: Current pause
551 * @asym_pause: Current asymmetric pause
552 * @supported: Combined MAC/PHY supported linkmodes
553 * @advertising: Currently advertised linkmodes
554 * @adv_old: Saved advertised while power saving for WoL
555 * @supported_eee: supported PHY EEE linkmodes
556 * @advertising_eee: Currently advertised EEE linkmodes
557 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY
558 * @eee_active: phylib private state, indicating that EEE has been negotiated
559 * @eee_cfg: User configuration of EEE
560 * @lp_advertising: Current link partner advertised linkmodes
561 * @host_interfaces: PHY interface modes supported by host
562 * @eee_disabled_modes: Energy efficient ethernet modes not to be advertised
563 * @autoneg: Flag autoneg being used
564 * @rate_matching: Current rate matching mode
565 * @link: Current link state
566 * @autoneg_complete: Flag auto negotiation of the link has completed
567 * @mdix: Current crossover
568 * @mdix_ctrl: User setting of crossover
569 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
570 * @interrupts: Flag interrupts have been enabled
571 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
572 * handling shall be postponed until PHY has resumed
573 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
574 * requiring a rerun of the interrupt handler after resume
575 * @default_timestamp: Flag indicating whether we are using the phy
576 * timestamp as the default one
577 * @interface: enum phy_interface_t value
578 * @possible_interfaces: bitmap if interface modes that the attached PHY
579 * will switch between depending on media speed.
580 * @skb: Netlink message for cable diagnostics
581 * @nest: Netlink nest used for cable diagnostics
582 * @ehdr: nNtlink header for cable diagnostics
583 * @phy_led_triggers: Array of LED triggers
584 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
585 * @led_link_trigger: LED trigger for link up/down
586 * @last_triggered: last LED trigger for link speed
587 * @leds: list of PHY LED structures
588 * @master_slave_set: User requested master/slave configuration
589 * @master_slave_get: Current master/slave advertisement
590 * @master_slave_state: Current master/slave configuration
591 * @mii_ts: Pointer to time stamper callbacks
592 * @psec: Pointer to Power Sourcing Equipment control struct
593 * @lock: Mutex for serialization access to PHY
594 * @state_queue: Work queue for state machine
595 * @link_down_events: Number of times link was lost
596 * @shared: Pointer to private data shared by phys in one package
597 * @priv: Pointer to driver private data
598 *
599 * interrupts currently only supports enabled or disabled,
600 * but could be changed in the future to support enabling
601 * and disabling specific interrupts
602 *
603 * Contains some infrastructure for polling and interrupt
604 * handling, as well as handling shifts in PHY hardware state
605 */
606 struct phy_device {
607 struct mdio_device mdio;
608
609 /* Information about the PHY type */
610 /* And management functions */
611 const struct phy_driver *drv;
612
613 struct device_link *devlink;
614
615 u32 phyindex;
616 u32 phy_id;
617
618 struct phy_c45_device_ids c45_ids;
619 unsigned is_c45:1;
620 unsigned is_internal:1;
621 unsigned is_pseudo_fixed_link:1;
622 unsigned is_gigabit_capable:1;
623 unsigned has_fixups:1;
624 unsigned suspended:1;
625 unsigned suspended_by_mdio_bus:1;
626 unsigned sysfs_links:1;
627 unsigned loopback_enabled:1;
628 unsigned downshifted_rate:1;
629 unsigned is_on_sfp_module:1;
630 unsigned mac_managed_pm:1;
631 unsigned wol_enabled:1;
632
633 unsigned autoneg:1;
634 /* The most recently read link state */
635 unsigned link:1;
636 unsigned autoneg_complete:1;
637
638 /* Interrupts are enabled */
639 unsigned interrupts:1;
640 unsigned irq_suspended:1;
641 unsigned irq_rerun:1;
642
643 unsigned default_timestamp:1;
644
645 int rate_matching;
646
647 enum phy_state state;
648
649 u32 dev_flags;
650
651 phy_interface_t interface;
652 DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
653
654 /*
655 * forced speed & duplex (no autoneg)
656 * partner speed & duplex & pause (autoneg)
657 */
658 int speed;
659 int duplex;
660 int port;
661 int pause;
662 int asym_pause;
663 u8 master_slave_get;
664 u8 master_slave_set;
665 u8 master_slave_state;
666
667 /* Union of PHY and Attached devices' supported link modes */
668 /* See ethtool.h for more info */
669 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
670 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
671 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
672 /* used with phy_speed_down */
673 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
674 /* used for eee validation and configuration*/
675 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
676 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
677 /* Energy efficient ethernet modes which should be prohibited */
678 __ETHTOOL_DECLARE_LINK_MODE_MASK(eee_disabled_modes);
679 bool enable_tx_lpi;
680 bool eee_active;
681 struct eee_config eee_cfg;
682
683 /* Host supported PHY interface types. Should be ignored if empty. */
684 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
685
686 #ifdef CONFIG_LED_TRIGGER_PHY
687 struct phy_led_trigger *phy_led_triggers;
688 unsigned int phy_num_led_triggers;
689 struct phy_led_trigger *last_triggered;
690
691 struct phy_led_trigger *led_link_trigger;
692 #endif
693 struct list_head leds;
694
695 /*
696 * Interrupt number for this PHY
697 * -1 means no interrupt
698 */
699 int irq;
700
701 /* private data pointer */
702 /* For use by PHYs to maintain extra state */
703 void *priv;
704
705 /* shared data pointer */
706 /* For use by PHYs inside the same package that need a shared state. */
707 struct phy_package_shared *shared;
708
709 /* Reporting cable test results */
710 struct sk_buff *skb;
711 void *ehdr;
712 struct nlattr *nest;
713
714 /* Interrupt and Polling infrastructure */
715 struct delayed_work state_queue;
716
717 struct mutex lock;
718
719 /* This may be modified under the rtnl lock */
720 bool sfp_bus_attached;
721 struct sfp_bus *sfp_bus;
722 struct phylink *phylink;
723 struct net_device *attached_dev;
724 struct mii_timestamper *mii_ts;
725 struct pse_control *psec;
726
727 u8 mdix;
728 u8 mdix_ctrl;
729
730 int pma_extable;
731
732 unsigned int link_down_events;
733
734 void (*phy_link_change)(struct phy_device *phydev, bool up);
735 void (*adjust_link)(struct net_device *dev);
736
737 #if IS_ENABLED(CONFIG_MACSEC)
738 /* MACsec management functions */
739 const struct macsec_ops *macsec_ops;
740 #endif
741 };
742
743 /* Generic phy_device::dev_flags */
744 #define PHY_F_NO_IRQ 0x80000000
745 #define PHY_F_RXC_ALWAYS_ON 0x40000000
746
to_phy_device(const struct device * dev)747 static inline struct phy_device *to_phy_device(const struct device *dev)
748 {
749 return container_of(to_mdio_device(dev), struct phy_device, mdio);
750 }
751
752 /**
753 * struct phy_tdr_config - Configuration of a TDR raw test
754 *
755 * @first: Distance for first data collection point
756 * @last: Distance for last data collection point
757 * @step: Step between data collection points
758 * @pair: Bitmap of cable pairs to collect data for
759 *
760 * A structure containing possible configuration parameters
761 * for a TDR cable test. The driver does not need to implement
762 * all the parameters, but should report what is actually used.
763 * All distances are in centimeters.
764 */
765 struct phy_tdr_config {
766 u32 first;
767 u32 last;
768 u32 step;
769 s8 pair;
770 };
771 #define PHY_PAIR_ALL -1
772
773 /**
774 * enum link_inband_signalling - in-band signalling modes that are supported
775 *
776 * @LINK_INBAND_DISABLE: in-band signalling can be disabled
777 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
778 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
779 *
780 * The possible and required bits can only be used if the valid bit is set.
781 * If possible is clear, that means inband signalling can not be used.
782 * Required is only valid when possible is set, and means that inband
783 * signalling must be used.
784 */
785 enum link_inband_signalling {
786 LINK_INBAND_DISABLE = BIT(0),
787 LINK_INBAND_ENABLE = BIT(1),
788 LINK_INBAND_BYPASS = BIT(2),
789 };
790
791 /**
792 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
793 * Avoidance) Reconciliation Sublayer.
794 *
795 * @version: read-only PLCA register map version. -1 = not available. Ignored
796 * when setting the configuration. Format is the same as reported by the PLCA
797 * IDVER register (31.CA00). -1 = not available.
798 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
799 * set. 0 = disabled, anything else = enabled.
800 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
801 * Allowed values [0 .. 254]. 255 = node disabled.
802 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
803 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
804 * set. Allowed values [1 .. 255].
805 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
806 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
807 * more details. The to_timer shall be set equal over all nodes.
808 * -1 = not available / don't set. Allowed values [0 .. 255].
809 * @burst_cnt: controls how many additional frames a node is allowed to send in
810 * single transmit opportunity (TO). The default value of 0 means that the
811 * node is allowed exactly one frame per TO. A value of 1 allows two frames
812 * per TO, and so on. -1 = not available / don't set.
813 * Allowed values [0 .. 255].
814 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
815 * frame before interrupting the burst. This value should be set to a value
816 * greater than the MAC inter-packet gap (which is typically 96 bits).
817 * -1 = not available / don't set. Allowed values [0 .. 255].
818 *
819 * A structure containing configuration parameters for setting/getting the PLCA
820 * RS configuration. The driver does not need to implement all the parameters,
821 * but should report what is actually used.
822 */
823 struct phy_plca_cfg {
824 int version;
825 int enabled;
826 int node_id;
827 int node_cnt;
828 int to_tmr;
829 int burst_cnt;
830 int burst_tmr;
831 };
832
833 /**
834 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
835 * Avoidance) Reconciliation Sublayer.
836 *
837 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
838 * register(31.CA03), indicating BEACON activity.
839 *
840 * A structure containing status information of the PLCA RS configuration.
841 * The driver does not need to implement all the parameters, but should report
842 * what is actually used.
843 */
844 struct phy_plca_status {
845 bool pst;
846 };
847
848 /* Modes for PHY LED configuration */
849 enum phy_led_modes {
850 PHY_LED_ACTIVE_HIGH = 0,
851 PHY_LED_ACTIVE_LOW = 1,
852 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 2,
853
854 /* keep it last */
855 __PHY_LED_MODES_NUM,
856 };
857
858 /**
859 * struct phy_led: An LED driven by the PHY
860 *
861 * @list: List of LEDs
862 * @phydev: PHY this LED is attached to
863 * @led_cdev: Standard LED class structure
864 * @index: Number of the LED
865 */
866 struct phy_led {
867 struct list_head list;
868 struct phy_device *phydev;
869 struct led_classdev led_cdev;
870 u8 index;
871 };
872
873 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
874
875 /**
876 * struct phy_driver - Driver structure for a particular PHY type
877 *
878 * @mdiodrv: Data common to all MDIO devices
879 * @phy_id: The result of reading the UID registers of this PHY
880 * type, and ANDing them with the phy_id_mask. This driver
881 * only works for PHYs with IDs which match this field
882 * @name: The friendly name of this PHY type
883 * @phy_id_mask: Defines the important bits of the phy_id
884 * @features: A mandatory list of features (speed, duplex, etc)
885 * supported by this PHY
886 * @flags: A bitfield defining certain other features this PHY
887 * supports (like interrupts)
888 * @driver_data: Static driver data
889 *
890 * All functions are optional. If config_aneg or read_status
891 * are not implemented, the phy core uses the genphy versions.
892 * Note that none of these functions should be called from
893 * interrupt time. The goal is for the bus read/write functions
894 * to be able to block when the bus transaction is happening,
895 * and be freed up by an interrupt (The MPC85xx has this ability,
896 * though it is not currently supported in the driver).
897 */
898 struct phy_driver {
899 struct mdio_driver_common mdiodrv;
900 u32 phy_id;
901 char *name;
902 u32 phy_id_mask;
903 const unsigned long * const features;
904 u32 flags;
905 const void *driver_data;
906
907 /**
908 * @soft_reset: Called to issue a PHY software reset
909 */
910 int (*soft_reset)(struct phy_device *phydev);
911
912 /**
913 * @config_init: Called to initialize the PHY,
914 * including after a reset
915 */
916 int (*config_init)(struct phy_device *phydev);
917
918 /**
919 * @probe: Called during discovery. Used to set
920 * up device-specific structures, if any
921 */
922 int (*probe)(struct phy_device *phydev);
923
924 /**
925 * @get_features: Probe the hardware to determine what
926 * abilities it has. Should only set phydev->supported.
927 */
928 int (*get_features)(struct phy_device *phydev);
929
930 /**
931 * @inband_caps: query whether in-band is supported for the given PHY
932 * interface mode. Returns a bitmask of bits defined by enum
933 * link_inband_signalling.
934 */
935 unsigned int (*inband_caps)(struct phy_device *phydev,
936 phy_interface_t interface);
937
938 /**
939 * @config_inband: configure in-band mode for the PHY
940 */
941 int (*config_inband)(struct phy_device *phydev, unsigned int modes);
942
943 /**
944 * @get_rate_matching: Get the supported type of rate matching for a
945 * particular phy interface. This is used by phy consumers to determine
946 * whether to advertise lower-speed modes for that interface. It is
947 * assumed that if a rate matching mode is supported on an interface,
948 * then that interface's rate can be adapted to all slower link speeds
949 * supported by the phy. If the interface is not supported, this should
950 * return %RATE_MATCH_NONE.
951 */
952 int (*get_rate_matching)(struct phy_device *phydev,
953 phy_interface_t iface);
954
955 /* PHY Power Management */
956 /** @suspend: Suspend the hardware, saving state if needed */
957 int (*suspend)(struct phy_device *phydev);
958 /** @resume: Resume the hardware, restoring state if needed */
959 int (*resume)(struct phy_device *phydev);
960
961 /**
962 * @config_aneg: Configures the advertisement and resets
963 * autonegotiation if phydev->autoneg is on,
964 * forces the speed to the current settings in phydev
965 * if phydev->autoneg is off
966 */
967 int (*config_aneg)(struct phy_device *phydev);
968
969 /** @aneg_done: Determines the auto negotiation result */
970 int (*aneg_done)(struct phy_device *phydev);
971
972 /** @read_status: Determines the negotiated speed and duplex */
973 int (*read_status)(struct phy_device *phydev);
974
975 /**
976 * @config_intr: Enables or disables interrupts.
977 * It should also clear any pending interrupts prior to enabling the
978 * IRQs and after disabling them.
979 */
980 int (*config_intr)(struct phy_device *phydev);
981
982 /** @handle_interrupt: Override default interrupt handling */
983 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
984
985 /** @remove: Clears up any memory if needed */
986 void (*remove)(struct phy_device *phydev);
987
988 /**
989 * @match_phy_device: Returns true if this is a suitable
990 * driver for the given phydev. If NULL, matching is based on
991 * phy_id and phy_id_mask.
992 */
993 int (*match_phy_device)(struct phy_device *phydev);
994
995 /**
996 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
997 * register changes to enable Wake on LAN, so set_wol is
998 * provided to be called in the ethernet driver's set_wol
999 * function.
1000 */
1001 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1002
1003 /**
1004 * @get_wol: See set_wol, but for checking whether Wake on LAN
1005 * is enabled.
1006 */
1007 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1008
1009 /**
1010 * @link_change_notify: Called to inform a PHY device driver
1011 * when the core is about to change the link state. This
1012 * callback is supposed to be used as fixup hook for drivers
1013 * that need to take action when the link state
1014 * changes. Drivers are by no means allowed to mess with the
1015 * PHY device structure in their implementations.
1016 */
1017 void (*link_change_notify)(struct phy_device *dev);
1018
1019 /**
1020 * @read_mmd: PHY specific driver override for reading a MMD
1021 * register. This function is optional for PHY specific
1022 * drivers. When not provided, the default MMD read function
1023 * will be used by phy_read_mmd(), which will use either a
1024 * direct read for Clause 45 PHYs or an indirect read for
1025 * Clause 22 PHYs. devnum is the MMD device number within the
1026 * PHY device, regnum is the register within the selected MMD
1027 * device.
1028 */
1029 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1030
1031 /**
1032 * @write_mmd: PHY specific driver override for writing a MMD
1033 * register. This function is optional for PHY specific
1034 * drivers. When not provided, the default MMD write function
1035 * will be used by phy_write_mmd(), which will use either a
1036 * direct write for Clause 45 PHYs, or an indirect write for
1037 * Clause 22 PHYs. devnum is the MMD device number within the
1038 * PHY device, regnum is the register within the selected MMD
1039 * device. val is the value to be written.
1040 */
1041 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1042 u16 val);
1043
1044 /** @read_page: Return the current PHY register page number */
1045 int (*read_page)(struct phy_device *dev);
1046 /** @write_page: Set the current PHY register page number */
1047 int (*write_page)(struct phy_device *dev, int page);
1048
1049 /**
1050 * @module_info: Get the size and type of the eeprom contained
1051 * within a plug-in module
1052 */
1053 int (*module_info)(struct phy_device *dev,
1054 struct ethtool_modinfo *modinfo);
1055
1056 /**
1057 * @module_eeprom: Get the eeprom information from the plug-in
1058 * module
1059 */
1060 int (*module_eeprom)(struct phy_device *dev,
1061 struct ethtool_eeprom *ee, u8 *data);
1062
1063 /** @cable_test_start: Start a cable test */
1064 int (*cable_test_start)(struct phy_device *dev);
1065
1066 /** @cable_test_tdr_start: Start a raw TDR cable test */
1067 int (*cable_test_tdr_start)(struct phy_device *dev,
1068 const struct phy_tdr_config *config);
1069
1070 /**
1071 * @cable_test_get_status: Once per second, or on interrupt,
1072 * request the status of the test.
1073 */
1074 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1075
1076 /* Get statistics from the PHY using ethtool */
1077 /**
1078 * @get_phy_stats: Retrieve PHY statistics.
1079 * @dev: The PHY device for which the statistics are retrieved.
1080 * @eth_stats: structure where Ethernet PHY stats will be stored.
1081 * @stats: structure where additional PHY-specific stats will be stored.
1082 *
1083 * Retrieves the supported PHY statistics and populates the provided
1084 * structures. The input structures are pre-initialized with
1085 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members
1086 * corresponding to supported statistics. Unmodified members will remain
1087 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1088 */
1089 void (*get_phy_stats)(struct phy_device *dev,
1090 struct ethtool_eth_phy_stats *eth_stats,
1091 struct ethtool_phy_stats *stats);
1092
1093 /**
1094 * @get_link_stats: Retrieve link statistics.
1095 * @dev: The PHY device for which the statistics are retrieved.
1096 * @link_stats: structure where link-specific stats will be stored.
1097 *
1098 * Retrieves link-related statistics for the given PHY device. The input
1099 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the
1100 * driver must only modify members corresponding to supported
1101 * statistics. Unmodified members will remain set to
1102 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1103 */
1104 void (*get_link_stats)(struct phy_device *dev,
1105 struct ethtool_link_ext_stats *link_stats);
1106
1107 /**
1108 * @update_stats: Trigger periodic statistics updates.
1109 * @dev: The PHY device for which statistics updates are triggered.
1110 *
1111 * Periodically gathers statistics from the PHY device to update locally
1112 * maintained 64-bit counters. This is necessary for PHYs that implement
1113 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow
1114 * more frequently compared to 64-bit counters. By invoking this
1115 * callback, drivers can fetch the current counter values, handle
1116 * overflow detection, and accumulate the results into local 64-bit
1117 * counters for accurate reporting through the `get_phy_stats` and
1118 * `get_link_stats` interfaces.
1119 *
1120 * Return: 0 on success or a negative error code on failure.
1121 */
1122 int (*update_stats)(struct phy_device *dev);
1123
1124 /** @get_sset_count: Number of statistic counters */
1125 int (*get_sset_count)(struct phy_device *dev);
1126 /** @get_strings: Names of the statistic counters */
1127 void (*get_strings)(struct phy_device *dev, u8 *data);
1128 /** @get_stats: Return the statistic counter values */
1129 void (*get_stats)(struct phy_device *dev,
1130 struct ethtool_stats *stats, u64 *data);
1131
1132 /* Get and Set PHY tunables */
1133 /** @get_tunable: Return the value of a tunable */
1134 int (*get_tunable)(struct phy_device *dev,
1135 struct ethtool_tunable *tuna, void *data);
1136 /** @set_tunable: Set the value of a tunable */
1137 int (*set_tunable)(struct phy_device *dev,
1138 struct ethtool_tunable *tuna,
1139 const void *data);
1140 /**
1141 * @set_loopback: Set the loopback mode of the PHY
1142 * enable selects if the loopback mode is enabled or disabled. If the
1143 * loopback mode is enabled, then the speed of the loopback mode can be
1144 * requested with the speed argument. If the speed argument is zero,
1145 * then any speed can be selected. If the speed argument is > 0, then
1146 * this speed shall be selected for the loopback mode or EOPNOTSUPP
1147 * shall be returned if speed selection is not supported.
1148 */
1149 int (*set_loopback)(struct phy_device *dev, bool enable, int speed);
1150 /** @get_sqi: Get the signal quality indication */
1151 int (*get_sqi)(struct phy_device *dev);
1152 /** @get_sqi_max: Get the maximum signal quality indication */
1153 int (*get_sqi_max)(struct phy_device *dev);
1154
1155 /* PLCA RS interface */
1156 /** @get_plca_cfg: Return the current PLCA configuration */
1157 int (*get_plca_cfg)(struct phy_device *dev,
1158 struct phy_plca_cfg *plca_cfg);
1159 /** @set_plca_cfg: Set the PLCA configuration */
1160 int (*set_plca_cfg)(struct phy_device *dev,
1161 const struct phy_plca_cfg *plca_cfg);
1162 /** @get_plca_status: Return the current PLCA status info */
1163 int (*get_plca_status)(struct phy_device *dev,
1164 struct phy_plca_status *plca_st);
1165
1166 /**
1167 * @led_brightness_set: Set a PHY LED brightness. Index
1168 * indicates which of the PHYs led should be set. Value
1169 * follows the standard LED class meaning, e.g. LED_OFF,
1170 * LED_HALF, LED_FULL.
1171 */
1172 int (*led_brightness_set)(struct phy_device *dev,
1173 u8 index, enum led_brightness value);
1174
1175 /**
1176 * @led_blink_set: Set a PHY LED blinking. Index indicates
1177 * which of the PHYs led should be configured to blink. Delays
1178 * are in milliseconds and if both are zero then a sensible
1179 * default should be chosen. The call should adjust the
1180 * timings in that case and if it can't match the values
1181 * specified exactly.
1182 */
1183 int (*led_blink_set)(struct phy_device *dev, u8 index,
1184 unsigned long *delay_on,
1185 unsigned long *delay_off);
1186 /**
1187 * @led_hw_is_supported: Can the HW support the given rules.
1188 * @dev: PHY device which has the LED
1189 * @index: Which LED of the PHY device
1190 * @rules The core is interested in these rules
1191 *
1192 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1193 */
1194 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1195 unsigned long rules);
1196 /**
1197 * @led_hw_control_set: Set the HW to control the LED
1198 * @dev: PHY device which has the LED
1199 * @index: Which LED of the PHY device
1200 * @rules The rules used to control the LED
1201 *
1202 * Returns 0, or a an error code.
1203 */
1204 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1205 unsigned long rules);
1206 /**
1207 * @led_hw_control_get: Get how the HW is controlling the LED
1208 * @dev: PHY device which has the LED
1209 * @index: Which LED of the PHY device
1210 * @rules Pointer to the rules used to control the LED
1211 *
1212 * Set *@rules to how the HW is currently blinking. Returns 0
1213 * on success, or a error code if the current blinking cannot
1214 * be represented in rules, or some other error happens.
1215 */
1216 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1217 unsigned long *rules);
1218
1219 /**
1220 * @led_polarity_set: Set the LED polarity modes
1221 * @dev: PHY device which has the LED
1222 * @index: Which LED of the PHY device
1223 * @modes: bitmap of LED polarity modes
1224 *
1225 * Configure LED with all the required polarity modes in @modes
1226 * to make it correctly turn ON or OFF.
1227 *
1228 * Returns 0, or an error code.
1229 */
1230 int (*led_polarity_set)(struct phy_device *dev, int index,
1231 unsigned long modes);
1232
1233 /**
1234 * @get_next_update_time: Get the time until the next update event
1235 * @dev: PHY device
1236 *
1237 * Callback to determine the time (in jiffies) until the next
1238 * update event for the PHY state machine. Allows PHY drivers to
1239 * dynamically adjust polling intervals based on link state or other
1240 * conditions.
1241 *
1242 * Returns the time in jiffies until the next update event.
1243 */
1244 unsigned int (*get_next_update_time)(struct phy_device *dev);
1245 };
1246 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \
1247 struct phy_driver, mdiodrv)
1248
1249 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1250 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1251 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1252
1253 /**
1254 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1255 * @id1: first PHY ID
1256 * @id2: second PHY ID
1257 * @mask: the PHY ID mask, set bits are significant in matching
1258 *
1259 * Return true if the bits from @id1 and @id2 specified by @mask match.
1260 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1261 */
phy_id_compare(u32 id1,u32 id2,u32 mask)1262 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1263 {
1264 return !((id1 ^ id2) & mask);
1265 }
1266
1267 /**
1268 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1269 * @phydev: the PHY device
1270 * @id: the PHY ID to be matched
1271 *
1272 * Compare the @phydev clause 22 ID with the provided @id and return true or
1273 * false depending whether it matches, using the bound driver mask. The
1274 * @phydev must be bound to a driver.
1275 */
phydev_id_compare(struct phy_device * phydev,u32 id)1276 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1277 {
1278 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1279 }
1280
1281 const char *phy_speed_to_str(int speed);
1282 const char *phy_duplex_to_str(unsigned int duplex);
1283 const char *phy_rate_matching_to_str(int rate_matching);
1284
1285 int phy_interface_num_ports(phy_interface_t interface);
1286
1287 /**
1288 * phy_is_started - Convenience function to check whether PHY is started
1289 * @phydev: The phy_device struct
1290 */
phy_is_started(struct phy_device * phydev)1291 static inline bool phy_is_started(struct phy_device *phydev)
1292 {
1293 return phydev->state >= PHY_UP;
1294 }
1295
1296 /**
1297 * phy_disable_eee_mode - Don't advertise an EEE mode.
1298 * @phydev: The phy_device struct
1299 * @link_mode: The EEE mode to be disabled
1300 */
phy_disable_eee_mode(struct phy_device * phydev,u32 link_mode)1301 static inline void phy_disable_eee_mode(struct phy_device *phydev, u32 link_mode)
1302 {
1303 WARN_ON(phy_is_started(phydev));
1304
1305 linkmode_set_bit(link_mode, phydev->eee_disabled_modes);
1306 linkmode_clear_bit(link_mode, phydev->advertising_eee);
1307 }
1308
1309 void phy_resolve_aneg_pause(struct phy_device *phydev);
1310 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1311
1312 /**
1313 * phy_read - Convenience function for reading a given PHY register
1314 * @phydev: the phy_device struct
1315 * @regnum: register number to read
1316 *
1317 * NOTE: MUST NOT be called from interrupt context,
1318 * because the bus read/write functions may wait for an interrupt
1319 * to conclude the operation.
1320 */
phy_read(struct phy_device * phydev,u32 regnum)1321 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1322 {
1323 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1324 }
1325
1326 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1327 timeout_us, sleep_before_read) \
1328 ({ \
1329 int __ret, __val; \
1330 __ret = read_poll_timeout(__val = phy_read, val, \
1331 __val < 0 || (cond), \
1332 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1333 if (__val < 0) \
1334 __ret = __val; \
1335 if (__ret) \
1336 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1337 __ret; \
1338 })
1339
1340 /**
1341 * __phy_read - convenience function for reading a given PHY register
1342 * @phydev: the phy_device struct
1343 * @regnum: register number to read
1344 *
1345 * The caller must have taken the MDIO bus lock.
1346 */
__phy_read(struct phy_device * phydev,u32 regnum)1347 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1348 {
1349 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1350 }
1351
1352 /**
1353 * phy_write - Convenience function for writing a given PHY register
1354 * @phydev: the phy_device struct
1355 * @regnum: register number to write
1356 * @val: value to write to @regnum
1357 *
1358 * NOTE: MUST NOT be called from interrupt context,
1359 * because the bus read/write functions may wait for an interrupt
1360 * to conclude the operation.
1361 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1362 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1363 {
1364 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1365 }
1366
1367 /**
1368 * __phy_write - Convenience function for writing a given PHY register
1369 * @phydev: the phy_device struct
1370 * @regnum: register number to write
1371 * @val: value to write to @regnum
1372 *
1373 * The caller must have taken the MDIO bus lock.
1374 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1375 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1376 {
1377 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1378 val);
1379 }
1380
1381 /**
1382 * __phy_modify_changed() - Convenience function for modifying a PHY register
1383 * @phydev: a pointer to a &struct phy_device
1384 * @regnum: register number
1385 * @mask: bit mask of bits to clear
1386 * @set: bit mask of bits to set
1387 *
1388 * Unlocked helper function which allows a PHY register to be modified as
1389 * new register value = (old register value & ~mask) | set
1390 *
1391 * Returns negative errno, 0 if there was no change, and 1 in case of change
1392 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1393 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1394 u16 mask, u16 set)
1395 {
1396 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1397 regnum, mask, set);
1398 }
1399
1400 /*
1401 * phy_read_mmd - Convenience function for reading a register
1402 * from an MMD on a given PHY.
1403 */
1404 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1405
1406 /**
1407 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1408 * condition is met or a timeout occurs
1409 *
1410 * @phydev: The phy_device struct
1411 * @devaddr: The MMD to read from
1412 * @regnum: The register on the MMD to read
1413 * @val: Variable to read the register into
1414 * @cond: Break condition (usually involving @val)
1415 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
1416 * read usleep_range() function description for details and
1417 * limitations.
1418 * @timeout_us: Timeout in us, 0 means never timeout
1419 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1420 *
1421 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either
1422 * case, the last read value at @args is stored in @val. Must not
1423 * be called from atomic context if sleep_us or timeout_us are used.
1424 */
1425 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1426 sleep_us, timeout_us, sleep_before_read) \
1427 ({ \
1428 int __ret, __val; \
1429 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1430 __val < 0 || (cond), \
1431 sleep_us, timeout_us, sleep_before_read, \
1432 phydev, devaddr, regnum); \
1433 if (__val < 0) \
1434 __ret = __val; \
1435 if (__ret) \
1436 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1437 __ret; \
1438 })
1439
1440 /*
1441 * __phy_read_mmd - Convenience function for reading a register
1442 * from an MMD on a given PHY.
1443 */
1444 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1445
1446 /*
1447 * phy_write_mmd - Convenience function for writing a register
1448 * on an MMD on a given PHY.
1449 */
1450 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1451
1452 /*
1453 * __phy_write_mmd - Convenience function for writing a register
1454 * on an MMD on a given PHY.
1455 */
1456 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1457
1458 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1459 u16 set);
1460 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1461 u16 set);
1462 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1463 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1464
1465 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1466 u16 mask, u16 set);
1467 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1468 u16 mask, u16 set);
1469 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1470 u16 mask, u16 set);
1471 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1472 u16 mask, u16 set);
1473
1474 /**
1475 * __phy_set_bits - Convenience function for setting bits in a PHY register
1476 * @phydev: the phy_device struct
1477 * @regnum: register number to write
1478 * @val: bits to set
1479 *
1480 * The caller must have taken the MDIO bus lock.
1481 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1482 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1483 {
1484 return __phy_modify(phydev, regnum, 0, val);
1485 }
1486
1487 /**
1488 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1489 * @phydev: the phy_device struct
1490 * @regnum: register number to write
1491 * @val: bits to clear
1492 *
1493 * The caller must have taken the MDIO bus lock.
1494 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1495 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1496 u16 val)
1497 {
1498 return __phy_modify(phydev, regnum, val, 0);
1499 }
1500
1501 /**
1502 * phy_set_bits - Convenience function for setting bits in a PHY register
1503 * @phydev: the phy_device struct
1504 * @regnum: register number to write
1505 * @val: bits to set
1506 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1507 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1508 {
1509 return phy_modify(phydev, regnum, 0, val);
1510 }
1511
1512 /**
1513 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1514 * @phydev: the phy_device struct
1515 * @regnum: register number to write
1516 * @val: bits to clear
1517 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1518 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1519 {
1520 return phy_modify(phydev, regnum, val, 0);
1521 }
1522
1523 /**
1524 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1525 * on MMD
1526 * @phydev: the phy_device struct
1527 * @devad: the MMD containing register to modify
1528 * @regnum: register number to modify
1529 * @val: bits to set
1530 *
1531 * The caller must have taken the MDIO bus lock.
1532 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1533 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1534 u32 regnum, u16 val)
1535 {
1536 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1537 }
1538
1539 /**
1540 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1541 * on MMD
1542 * @phydev: the phy_device struct
1543 * @devad: the MMD containing register to modify
1544 * @regnum: register number to modify
1545 * @val: bits to clear
1546 *
1547 * The caller must have taken the MDIO bus lock.
1548 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1549 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1550 u32 regnum, u16 val)
1551 {
1552 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1553 }
1554
1555 /**
1556 * phy_set_bits_mmd - Convenience function for setting bits in a register
1557 * on MMD
1558 * @phydev: the phy_device struct
1559 * @devad: the MMD containing register to modify
1560 * @regnum: register number to modify
1561 * @val: bits to set
1562 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1563 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1564 u32 regnum, u16 val)
1565 {
1566 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1567 }
1568
1569 /**
1570 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1571 * on MMD
1572 * @phydev: the phy_device struct
1573 * @devad: the MMD containing register to modify
1574 * @regnum: register number to modify
1575 * @val: bits to clear
1576 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1577 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1578 u32 regnum, u16 val)
1579 {
1580 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1581 }
1582
1583 /**
1584 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1585 * @phydev: the phy_device struct
1586 *
1587 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1588 * PHY_MAC_INTERRUPT
1589 */
phy_interrupt_is_valid(struct phy_device * phydev)1590 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1591 {
1592 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1593 }
1594
1595 /**
1596 * phy_polling_mode - Convenience function for testing whether polling is
1597 * used to detect PHY status changes
1598 * @phydev: the phy_device struct
1599 */
phy_polling_mode(struct phy_device * phydev)1600 static inline bool phy_polling_mode(struct phy_device *phydev)
1601 {
1602 if (phydev->state == PHY_CABLETEST)
1603 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1604 return true;
1605
1606 if (phydev->drv->update_stats)
1607 return true;
1608
1609 return phydev->irq == PHY_POLL;
1610 }
1611
1612 /**
1613 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1614 * @phydev: the phy_device struct
1615 */
phy_has_hwtstamp(struct phy_device * phydev)1616 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1617 {
1618 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1619 }
1620
1621 /**
1622 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1623 * @phydev: the phy_device struct
1624 */
phy_has_rxtstamp(struct phy_device * phydev)1625 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1626 {
1627 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1628 }
1629
1630 /**
1631 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1632 * PTP hardware clock capabilities.
1633 * @phydev: the phy_device struct
1634 */
phy_has_tsinfo(struct phy_device * phydev)1635 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1636 {
1637 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1638 }
1639
1640 /**
1641 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1642 * @phydev: the phy_device struct
1643 */
phy_has_txtstamp(struct phy_device * phydev)1644 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1645 {
1646 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1647 }
1648
phy_hwtstamp(struct phy_device * phydev,struct kernel_hwtstamp_config * cfg,struct netlink_ext_ack * extack)1649 static inline int phy_hwtstamp(struct phy_device *phydev,
1650 struct kernel_hwtstamp_config *cfg,
1651 struct netlink_ext_ack *extack)
1652 {
1653 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1654 }
1655
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1656 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1657 int type)
1658 {
1659 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1660 }
1661
phy_ts_info(struct phy_device * phydev,struct kernel_ethtool_ts_info * tsinfo)1662 static inline int phy_ts_info(struct phy_device *phydev,
1663 struct kernel_ethtool_ts_info *tsinfo)
1664 {
1665 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1666 }
1667
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1668 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1669 int type)
1670 {
1671 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1672 }
1673
1674 /**
1675 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp
1676 * @phydev: Pointer to phy_device
1677 *
1678 * This is used to get default timestamping device taking into account
1679 * the new API choice, which is selecting the timestamping from MAC by
1680 * default if the phydev does not have default_timestamp flag enabled.
1681 *
1682 * Return: True if phy is the default hw timestamp, false otherwise.
1683 */
phy_is_default_hwtstamp(struct phy_device * phydev)1684 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev)
1685 {
1686 return phy_has_hwtstamp(phydev) && phydev->default_timestamp;
1687 }
1688
1689 /**
1690 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1691 * @phydev: the phy_device struct
1692 */
phy_on_sfp(struct phy_device * phydev)1693 static inline bool phy_on_sfp(struct phy_device *phydev)
1694 {
1695 return phydev->is_on_sfp_module;
1696 }
1697
1698 /**
1699 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1700 * PHY interface mode is RGMII (all variants)
1701 * @mode: the &phy_interface_t enum
1702 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1703 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1704 {
1705 return mode >= PHY_INTERFACE_MODE_RGMII &&
1706 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1707 };
1708
1709 /**
1710 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1711 * negotiation
1712 * @mode: one of &enum phy_interface_t
1713 *
1714 * Returns true if the PHY interface mode uses the 16-bit negotiation
1715 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1716 */
phy_interface_mode_is_8023z(phy_interface_t mode)1717 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1718 {
1719 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1720 mode == PHY_INTERFACE_MODE_2500BASEX;
1721 }
1722
1723 /**
1724 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1725 * is RGMII (all variants)
1726 * @phydev: the phy_device struct
1727 */
phy_interface_is_rgmii(struct phy_device * phydev)1728 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1729 {
1730 return phy_interface_mode_is_rgmii(phydev->interface);
1731 };
1732
1733 /**
1734 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1735 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1736 * @phydev: the phy_device struct
1737 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1738 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1739 {
1740 return phydev->is_pseudo_fixed_link;
1741 }
1742
1743 int phy_save_page(struct phy_device *phydev);
1744 int phy_select_page(struct phy_device *phydev, int page);
1745 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1746 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1747 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1748 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1749 u16 mask, u16 set);
1750 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1751 u16 mask, u16 set);
1752
1753 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1754 bool is_c45,
1755 struct phy_c45_device_ids *c45_ids);
1756 #if IS_ENABLED(CONFIG_PHYLIB)
1757 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1758 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1759 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1760 struct phy_device *device_phy_find_device(struct device *dev);
1761 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1762 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1763 int phy_device_register(struct phy_device *phy);
1764 void phy_device_free(struct phy_device *phydev);
1765 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1766 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1767 {
1768 return 0;
1769 }
1770 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1771 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1772 {
1773 return 0;
1774 }
1775
1776 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1777 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1778 {
1779 return NULL;
1780 }
1781
device_phy_find_device(struct device * dev)1782 static inline struct phy_device *device_phy_find_device(struct device *dev)
1783 {
1784 return NULL;
1785 }
1786
1787 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1788 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1789 {
1790 return NULL;
1791 }
1792
1793 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1794 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1795 {
1796 return NULL;
1797 }
1798
phy_device_register(struct phy_device * phy)1799 static inline int phy_device_register(struct phy_device *phy)
1800 {
1801 return 0;
1802 }
1803
phy_device_free(struct phy_device * phydev)1804 static inline void phy_device_free(struct phy_device *phydev) { }
1805 #endif /* CONFIG_PHYLIB */
1806 void phy_device_remove(struct phy_device *phydev);
1807 int phy_get_c45_ids(struct phy_device *phydev);
1808 int phy_init_hw(struct phy_device *phydev);
1809 int phy_suspend(struct phy_device *phydev);
1810 int phy_resume(struct phy_device *phydev);
1811 int __phy_resume(struct phy_device *phydev);
1812 int phy_loopback(struct phy_device *phydev, bool enable, int speed);
1813 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy);
1814 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy);
1815 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1816 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1817 int phy_sfp_probe(struct phy_device *phydev,
1818 const struct sfp_upstream_ops *ops);
1819 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1820 phy_interface_t interface);
1821 struct phy_device *phy_find_first(struct mii_bus *bus);
1822 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1823 u32 flags, phy_interface_t interface);
1824 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1825 void (*handler)(struct net_device *),
1826 phy_interface_t interface);
1827 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1828 void (*handler)(struct net_device *),
1829 phy_interface_t interface);
1830 void phy_disconnect(struct phy_device *phydev);
1831 void phy_detach(struct phy_device *phydev);
1832 void phy_start(struct phy_device *phydev);
1833 void phy_stop(struct phy_device *phydev);
1834 int phy_config_aneg(struct phy_device *phydev);
1835 int _phy_start_aneg(struct phy_device *phydev);
1836 int phy_start_aneg(struct phy_device *phydev);
1837 int phy_aneg_done(struct phy_device *phydev);
1838 unsigned int phy_inband_caps(struct phy_device *phydev,
1839 phy_interface_t interface);
1840 int phy_config_inband(struct phy_device *phydev, unsigned int modes);
1841 int phy_speed_down(struct phy_device *phydev, bool sync);
1842 int phy_speed_up(struct phy_device *phydev);
1843 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1844
1845 int phy_restart_aneg(struct phy_device *phydev);
1846 int phy_reset_after_clk_enable(struct phy_device *phydev);
1847
1848 #if IS_ENABLED(CONFIG_PHYLIB)
1849 int phy_start_cable_test(struct phy_device *phydev,
1850 struct netlink_ext_ack *extack);
1851 int phy_start_cable_test_tdr(struct phy_device *phydev,
1852 struct netlink_ext_ack *extack,
1853 const struct phy_tdr_config *config);
1854 #else
1855 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1856 int phy_start_cable_test(struct phy_device *phydev,
1857 struct netlink_ext_ack *extack)
1858 {
1859 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1860 return -EOPNOTSUPP;
1861 }
1862 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1863 int phy_start_cable_test_tdr(struct phy_device *phydev,
1864 struct netlink_ext_ack *extack,
1865 const struct phy_tdr_config *config)
1866 {
1867 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1868 return -EOPNOTSUPP;
1869 }
1870 #endif
1871
phy_device_reset(struct phy_device * phydev,int value)1872 static inline void phy_device_reset(struct phy_device *phydev, int value)
1873 {
1874 mdio_device_reset(&phydev->mdio, value);
1875 }
1876
1877 #define phydev_err(_phydev, format, args...) \
1878 dev_err(&_phydev->mdio.dev, format, ##args)
1879
1880 #define phydev_err_probe(_phydev, err, format, args...) \
1881 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1882
1883 #define phydev_info(_phydev, format, args...) \
1884 dev_info(&_phydev->mdio.dev, format, ##args)
1885
1886 #define phydev_warn(_phydev, format, args...) \
1887 dev_warn(&_phydev->mdio.dev, format, ##args)
1888
1889 #define phydev_dbg(_phydev, format, args...) \
1890 dev_dbg(&_phydev->mdio.dev, format, ##args)
1891
phydev_name(const struct phy_device * phydev)1892 static inline const char *phydev_name(const struct phy_device *phydev)
1893 {
1894 return dev_name(&phydev->mdio.dev);
1895 }
1896
phy_lock_mdio_bus(struct phy_device * phydev)1897 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1898 {
1899 mutex_lock(&phydev->mdio.bus->mdio_lock);
1900 }
1901
phy_unlock_mdio_bus(struct phy_device * phydev)1902 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1903 {
1904 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1905 }
1906
1907 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1908 __printf(2, 3);
1909 char *phy_attached_info_irq(struct phy_device *phydev)
1910 __malloc;
1911 void phy_attached_info(struct phy_device *phydev);
1912
1913 /* Clause 22 PHY */
1914 int genphy_read_abilities(struct phy_device *phydev);
1915 int genphy_setup_forced(struct phy_device *phydev);
1916 int genphy_restart_aneg(struct phy_device *phydev);
1917 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1918 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1919 int genphy_aneg_done(struct phy_device *phydev);
1920 int genphy_update_link(struct phy_device *phydev);
1921 int genphy_read_lpa(struct phy_device *phydev);
1922 int genphy_read_status_fixed(struct phy_device *phydev);
1923 int genphy_read_status(struct phy_device *phydev);
1924 int genphy_read_master_slave(struct phy_device *phydev);
1925 int genphy_suspend(struct phy_device *phydev);
1926 int genphy_resume(struct phy_device *phydev);
1927 int genphy_loopback(struct phy_device *phydev, bool enable, int speed);
1928 int genphy_soft_reset(struct phy_device *phydev);
1929 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1930
genphy_config_aneg(struct phy_device * phydev)1931 static inline int genphy_config_aneg(struct phy_device *phydev)
1932 {
1933 return __genphy_config_aneg(phydev, false);
1934 }
1935
genphy_no_config_intr(struct phy_device * phydev)1936 static inline int genphy_no_config_intr(struct phy_device *phydev)
1937 {
1938 return 0;
1939 }
1940 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1941 u16 regnum);
1942 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1943 u16 regnum, u16 val);
1944
1945 /* Clause 37 */
1946 int genphy_c37_config_aneg(struct phy_device *phydev);
1947 int genphy_c37_read_status(struct phy_device *phydev, bool *changed);
1948
1949 /* Clause 45 PHY */
1950 int genphy_c45_restart_aneg(struct phy_device *phydev);
1951 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1952 int genphy_c45_aneg_done(struct phy_device *phydev);
1953 int genphy_c45_read_link(struct phy_device *phydev);
1954 int genphy_c45_read_lpa(struct phy_device *phydev);
1955 int genphy_c45_read_pma(struct phy_device *phydev);
1956 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1957 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1958 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1959 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1960 int genphy_c45_read_mdix(struct phy_device *phydev);
1961 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1962 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1963 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1964 int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1965 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1966 int genphy_c45_read_status(struct phy_device *phydev);
1967 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1968 int genphy_c45_config_aneg(struct phy_device *phydev);
1969 int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed);
1970 int genphy_c45_pma_resume(struct phy_device *phydev);
1971 int genphy_c45_pma_suspend(struct phy_device *phydev);
1972 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1973 int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1974 struct phy_plca_cfg *plca_cfg);
1975 int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1976 const struct phy_plca_cfg *plca_cfg);
1977 int genphy_c45_plca_get_status(struct phy_device *phydev,
1978 struct phy_plca_status *plca_st);
1979 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp);
1980 int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1981 struct ethtool_keee *data);
1982 int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1983 struct ethtool_keee *data);
1984 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1985
1986 /* Generic C45 PHY driver */
1987 extern struct phy_driver genphy_c45_driver;
1988
1989 /* The gen10g_* functions are the old Clause 45 stub */
1990 int gen10g_config_aneg(struct phy_device *phydev);
1991
phy_read_status(struct phy_device * phydev)1992 static inline int phy_read_status(struct phy_device *phydev)
1993 {
1994 if (!phydev->drv)
1995 return -EIO;
1996
1997 if (phydev->drv->read_status)
1998 return phydev->drv->read_status(phydev);
1999 else
2000 return genphy_read_status(phydev);
2001 }
2002
2003 void phy_driver_unregister(struct phy_driver *drv);
2004 void phy_drivers_unregister(struct phy_driver *drv, int n);
2005 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
2006 int phy_drivers_register(struct phy_driver *new_driver, int n,
2007 struct module *owner);
2008 void phy_error(struct phy_device *phydev);
2009 void phy_state_machine(struct work_struct *work);
2010 void phy_trigger_machine(struct phy_device *phydev);
2011 void phy_mac_interrupt(struct phy_device *phydev);
2012 void phy_start_machine(struct phy_device *phydev);
2013 void phy_stop_machine(struct phy_device *phydev);
2014 void phy_ethtool_ksettings_get(struct phy_device *phydev,
2015 struct ethtool_link_ksettings *cmd);
2016 int phy_ethtool_ksettings_set(struct phy_device *phydev,
2017 const struct ethtool_link_ksettings *cmd);
2018 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
2019 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
2020 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
2021 int phy_disable_interrupts(struct phy_device *phydev);
2022 void phy_request_interrupt(struct phy_device *phydev);
2023 void phy_free_interrupt(struct phy_device *phydev);
2024 void phy_print_status(struct phy_device *phydev);
2025 int phy_get_rate_matching(struct phy_device *phydev,
2026 phy_interface_t iface);
2027 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
2028 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
2029 void phy_advertise_supported(struct phy_device *phydev);
2030 void phy_advertise_eee_all(struct phy_device *phydev);
2031 void phy_support_sym_pause(struct phy_device *phydev);
2032 void phy_support_asym_pause(struct phy_device *phydev);
2033 void phy_support_eee(struct phy_device *phydev);
2034 void phy_disable_eee(struct phy_device *phydev);
2035 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
2036 bool autoneg);
2037 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
2038 bool phy_validate_pause(struct phy_device *phydev,
2039 struct ethtool_pauseparam *pp);
2040 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
2041
2042 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
2043 const int *delay_values, int size, bool is_rx);
2044
2045 int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev,
2046 enum ethtool_link_mode_bit_indices linkmode,
2047 u32 *val);
2048
2049 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
2050 bool *tx_pause, bool *rx_pause);
2051
2052 int phy_register_fixup_for_id(const char *bus_id,
2053 int (*run)(struct phy_device *));
2054 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2055 int (*run)(struct phy_device *));
2056
2057 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
2058 int phy_unregister_fixup_for_id(const char *bus_id);
2059 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
2060
2061 int phy_eee_tx_clock_stop_capable(struct phy_device *phydev);
2062 int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable);
2063 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
2064 int phy_get_eee_err(struct phy_device *phydev);
2065 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
2066 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
2067 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
2068 void phy_ethtool_get_wol(struct phy_device *phydev,
2069 struct ethtool_wolinfo *wol);
2070 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
2071 struct ethtool_link_ksettings *cmd);
2072 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
2073 const struct ethtool_link_ksettings *cmd);
2074 int phy_ethtool_nway_reset(struct net_device *ndev);
2075
2076 int __init mdio_bus_init(void);
2077 void mdio_bus_exit(void);
2078
2079 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
2080 int phy_ethtool_get_sset_count(struct phy_device *phydev);
2081 int phy_ethtool_get_stats(struct phy_device *phydev,
2082 struct ethtool_stats *stats, u64 *data);
2083
2084 void __phy_ethtool_get_phy_stats(struct phy_device *phydev,
2085 struct ethtool_eth_phy_stats *phy_stats,
2086 struct ethtool_phy_stats *phydev_stats);
2087 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev,
2088 struct ethtool_link_ext_stats *link_stats);
2089
2090 int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
2091 struct phy_plca_cfg *plca_cfg);
2092 int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
2093 const struct phy_plca_cfg *plca_cfg,
2094 struct netlink_ext_ack *extack);
2095 int phy_ethtool_get_plca_status(struct phy_device *phydev,
2096 struct phy_plca_status *plca_st);
2097
2098 int __phy_hwtstamp_get(struct phy_device *phydev,
2099 struct kernel_hwtstamp_config *config);
2100 int __phy_hwtstamp_set(struct phy_device *phydev,
2101 struct kernel_hwtstamp_config *config,
2102 struct netlink_ext_ack *extack);
2103
2104 extern const struct bus_type mdio_bus_type;
2105
2106 struct mdio_board_info {
2107 const char *bus_id;
2108 char modalias[MDIO_NAME_SIZE];
2109 int mdio_addr;
2110 const void *platform_data;
2111 };
2112
2113 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
2114 int mdiobus_register_board_info(const struct mdio_board_info *info,
2115 unsigned int n);
2116 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)2117 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2118 unsigned int n)
2119 {
2120 return 0;
2121 }
2122 #endif
2123
2124
2125 /**
2126 * phy_module_driver() - Helper macro for registering PHY drivers
2127 * @__phy_drivers: array of PHY drivers to register
2128 * @__count: Numbers of members in array
2129 *
2130 * Helper macro for PHY drivers which do not do anything special in module
2131 * init/exit. Each module may only use this macro once, and calling it
2132 * replaces module_init() and module_exit().
2133 */
2134 #define phy_module_driver(__phy_drivers, __count) \
2135 static int __init phy_module_init(void) \
2136 { \
2137 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2138 } \
2139 module_init(phy_module_init); \
2140 static void __exit phy_module_exit(void) \
2141 { \
2142 phy_drivers_unregister(__phy_drivers, __count); \
2143 } \
2144 module_exit(phy_module_exit)
2145
2146 #define module_phy_driver(__phy_drivers) \
2147 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2148
2149 bool phy_driver_is_genphy(struct phy_device *phydev);
2150 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2151
2152 #endif /* __PHY_H */
2153