1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <linux/bitfield.h>
4 #include <linux/clk.h>
5 #include <linux/io.h>
6 #include <linux/iopoll.h>
7 #include <linux/module.h>
8 #include <linux/of.h>
9 #include <linux/platform_device.h>
10 #include <linux/pm_domain.h>
11 #include <linux/reset.h>
12
13 #define PD_STATE_ON 1
14 #define PD_STATE_OFF 2
15
16 #define PD_RSTN_REG 0x00
17 #define PD_CLK_GATE_REG 0x04
18 #define PD_PWROFF_GATE_REG 0x08
19 #define PD_PSW_ON_REG 0x0c
20 #define PD_PSW_OFF_REG 0x10
21 #define PD_PSW_DELAY_REG 0x14
22 #define PD_OFF_DELAY_REG 0x18
23 #define PD_ON_DELAY_REG 0x1c
24 #define PD_COMMAND_REG 0x20
25 #define PD_STATUS_REG 0x24
26 #define PD_STATUS_COMPLETE BIT(1)
27 #define PD_STATUS_BUSY BIT(3)
28 #define PD_STATUS_STATE GENMASK(17, 16)
29 #define PD_ACTIVE_CTRL_REG 0x2c
30 #define PD_GATE_STATUS_REG 0x30
31 #define PD_RSTN_STATUS BIT(0)
32 #define PD_CLK_GATE_STATUS BIT(1)
33 #define PD_PWROFF_GATE_STATUS BIT(2)
34 #define PD_PSW_STATUS_REG 0x34
35
36 #define PD_REGS_SIZE 0x80
37
38 struct sun20i_ppu_desc {
39 const char *const *names;
40 unsigned int num_domains;
41 };
42
43 struct sun20i_ppu_pd {
44 struct generic_pm_domain genpd;
45 void __iomem *base;
46 };
47
48 #define to_sun20i_ppu_pd(_genpd) \
49 container_of(_genpd, struct sun20i_ppu_pd, genpd)
50
sun20i_ppu_pd_is_on(const struct sun20i_ppu_pd * pd)51 static bool sun20i_ppu_pd_is_on(const struct sun20i_ppu_pd *pd)
52 {
53 u32 status = readl(pd->base + PD_STATUS_REG);
54
55 return FIELD_GET(PD_STATUS_STATE, status) == PD_STATE_ON;
56 }
57
sun20i_ppu_pd_set_power(const struct sun20i_ppu_pd * pd,bool power_on)58 static int sun20i_ppu_pd_set_power(const struct sun20i_ppu_pd *pd, bool power_on)
59 {
60 u32 state, status;
61 int ret;
62
63 if (sun20i_ppu_pd_is_on(pd) == power_on)
64 return 0;
65
66 /* Wait for the power controller to be idle. */
67 ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status,
68 !(status & PD_STATUS_BUSY), 100, 1000);
69 if (ret)
70 return ret;
71
72 state = power_on ? PD_STATE_ON : PD_STATE_OFF;
73 writel(state, pd->base + PD_COMMAND_REG);
74
75 /* Wait for the state transition to complete. */
76 ret = readl_poll_timeout(pd->base + PD_STATUS_REG, status,
77 FIELD_GET(PD_STATUS_STATE, status) == state &&
78 (status & PD_STATUS_COMPLETE), 100, 1000);
79 if (ret)
80 return ret;
81
82 /* Clear the completion flag. */
83 writel(status, pd->base + PD_STATUS_REG);
84
85 return 0;
86 }
87
sun20i_ppu_pd_power_on(struct generic_pm_domain * genpd)88 static int sun20i_ppu_pd_power_on(struct generic_pm_domain *genpd)
89 {
90 const struct sun20i_ppu_pd *pd = to_sun20i_ppu_pd(genpd);
91
92 return sun20i_ppu_pd_set_power(pd, true);
93 }
94
sun20i_ppu_pd_power_off(struct generic_pm_domain * genpd)95 static int sun20i_ppu_pd_power_off(struct generic_pm_domain *genpd)
96 {
97 const struct sun20i_ppu_pd *pd = to_sun20i_ppu_pd(genpd);
98
99 return sun20i_ppu_pd_set_power(pd, false);
100 }
101
sun20i_ppu_probe(struct platform_device * pdev)102 static int sun20i_ppu_probe(struct platform_device *pdev)
103 {
104 const struct sun20i_ppu_desc *desc;
105 struct device *dev = &pdev->dev;
106 struct genpd_onecell_data *ppu;
107 struct sun20i_ppu_pd *pds;
108 struct reset_control *rst;
109 void __iomem *base;
110 struct clk *clk;
111 int ret;
112
113 desc = of_device_get_match_data(dev);
114 if (!desc)
115 return -EINVAL;
116
117 pds = devm_kcalloc(dev, desc->num_domains, sizeof(*pds), GFP_KERNEL);
118 if (!pds)
119 return -ENOMEM;
120
121 ppu = devm_kzalloc(dev, sizeof(*ppu), GFP_KERNEL);
122 if (!ppu)
123 return -ENOMEM;
124
125 ppu->domains = devm_kcalloc(dev, desc->num_domains,
126 sizeof(*ppu->domains), GFP_KERNEL);
127 if (!ppu->domains)
128 return -ENOMEM;
129
130 ppu->num_domains = desc->num_domains;
131 platform_set_drvdata(pdev, ppu);
132
133 base = devm_platform_ioremap_resource(pdev, 0);
134 if (IS_ERR(base))
135 return PTR_ERR(base);
136
137 clk = devm_clk_get_enabled(dev, NULL);
138 if (IS_ERR(clk))
139 return PTR_ERR(clk);
140
141 rst = devm_reset_control_get_exclusive(dev, NULL);
142 if (IS_ERR(rst))
143 return PTR_ERR(rst);
144
145 ret = reset_control_deassert(rst);
146 if (ret)
147 return ret;
148
149 for (unsigned int i = 0; i < ppu->num_domains; ++i) {
150 struct sun20i_ppu_pd *pd = &pds[i];
151
152 pd->genpd.name = desc->names[i];
153 pd->genpd.power_off = sun20i_ppu_pd_power_off;
154 pd->genpd.power_on = sun20i_ppu_pd_power_on;
155 pd->base = base + PD_REGS_SIZE * i;
156
157 ret = pm_genpd_init(&pd->genpd, NULL, sun20i_ppu_pd_is_on(pd));
158 if (ret) {
159 dev_warn(dev, "Failed to add '%s' domain: %d\n",
160 pd->genpd.name, ret);
161 continue;
162 }
163
164 ppu->domains[i] = &pd->genpd;
165 }
166
167 ret = of_genpd_add_provider_onecell(dev->of_node, ppu);
168 if (ret)
169 dev_warn(dev, "Failed to add provider: %d\n", ret);
170
171 return 0;
172 }
173
174 static const char *const sun20i_d1_ppu_pd_names[] = {
175 "CPU",
176 "VE",
177 "DSP",
178 };
179
180 static const struct sun20i_ppu_desc sun20i_d1_ppu_desc = {
181 .names = sun20i_d1_ppu_pd_names,
182 .num_domains = ARRAY_SIZE(sun20i_d1_ppu_pd_names),
183 };
184
185 static const struct of_device_id sun20i_ppu_of_match[] = {
186 {
187 .compatible = "allwinner,sun20i-d1-ppu",
188 .data = &sun20i_d1_ppu_desc,
189 },
190 { }
191 };
192 MODULE_DEVICE_TABLE(of, sun20i_ppu_of_match);
193
194 static struct platform_driver sun20i_ppu_driver = {
195 .probe = sun20i_ppu_probe,
196 .driver = {
197 .name = "sun20i-ppu",
198 .of_match_table = sun20i_ppu_of_match,
199 /* Power domains cannot be removed while they are in use. */
200 .suppress_bind_attrs = true,
201 },
202 };
203 module_platform_driver(sun20i_ppu_driver);
204
205 MODULE_AUTHOR("Samuel Holland <samuel@sholland.org>");
206 MODULE_DESCRIPTION("Allwinner D1 PPU power domain driver");
207 MODULE_LICENSE("GPL");
208