1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2023 Intel Corporation 4 */ 5 6 #ifndef _XE_GUC_SUBMIT_TYPES_H_ 7 #define _XE_GUC_SUBMIT_TYPES_H_ 8 9 #include "xe_hw_engine_types.h" 10 11 /* Work item for submitting workloads into work queue of GuC. */ 12 #define WQ_STATUS_ACTIVE 1 13 #define WQ_STATUS_SUSPENDED 2 14 #define WQ_STATUS_CMD_ERROR 3 15 #define WQ_STATUS_ENGINE_ID_NOT_USED 4 16 #define WQ_STATUS_SUSPENDED_FROM_RESET 5 17 #define WQ_TYPE_NOOP 0x4 18 #define WQ_TYPE_MULTI_LRC 0x5 19 #define WQ_TYPE_MASK GENMASK(7, 0) 20 #define WQ_LEN_MASK GENMASK(26, 16) 21 22 #define WQ_GUC_ID_MASK GENMASK(15, 0) 23 #define WQ_RING_TAIL_MASK GENMASK(28, 18) 24 25 #define PARALLEL_SCRATCH_SIZE 2048 26 #define WQ_SIZE (PARALLEL_SCRATCH_SIZE / 2) 27 #define WQ_OFFSET (PARALLEL_SCRATCH_SIZE - WQ_SIZE) 28 #define CACHELINE_BYTES 64 29 30 struct guc_sched_wq_desc { 31 u32 head; 32 u32 tail; 33 u32 error_offset; 34 u32 wq_status; 35 u32 reserved[28]; 36 } __packed; 37 38 struct sync_semaphore { 39 u32 semaphore; 40 u8 unused[CACHELINE_BYTES - sizeof(u32)]; 41 }; 42 43 /** 44 * struct guc_submit_parallel_scratch - A scratch shared mapped buffer. 45 */ 46 struct guc_submit_parallel_scratch { 47 /** @wq_desc: Guc scheduler workqueue descriptor */ 48 struct guc_sched_wq_desc wq_desc; 49 50 /** @go: Go Semaphore */ 51 struct sync_semaphore go; 52 /** @join: Joined semaphore for the relevant hw engine instances */ 53 struct sync_semaphore join[XE_HW_ENGINE_MAX_INSTANCE]; 54 55 /** @unused: Unused/Reserved memory space */ 56 u8 unused[WQ_OFFSET - sizeof(struct guc_sched_wq_desc) - 57 sizeof(struct sync_semaphore) * 58 (XE_HW_ENGINE_MAX_INSTANCE + 1)]; 59 60 /** @wq: Workqueue info */ 61 u32 wq[WQ_SIZE / sizeof(u32)]; 62 }; 63 64 struct pending_list_snapshot { 65 u32 seqno; 66 bool fence; 67 bool finished; 68 }; 69 70 /** 71 * struct xe_guc_submit_exec_queue_snapshot - Snapshot for devcoredump 72 */ 73 struct xe_guc_submit_exec_queue_snapshot { 74 /** @name: name of this exec queue */ 75 char name[MAX_FENCE_NAME_LEN]; 76 /** @class: class of this exec queue */ 77 enum xe_engine_class class; 78 /** 79 * @logical_mask: logical mask of where job submitted to exec queue can run 80 */ 81 u32 logical_mask; 82 /** @width: width (number BB submitted per exec) of this exec queue */ 83 u16 width; 84 /** @refcount: ref count of this exec queue */ 85 u32 refcount; 86 /** 87 * @sched_timeout: the time after which a job is removed from the 88 * scheduler. 89 */ 90 long sched_timeout; 91 92 /** @sched_props: scheduling properties */ 93 struct { 94 /** @sched_props.timeslice_us: timeslice period in micro-seconds */ 95 u32 timeslice_us; 96 /** @sched_props.preempt_timeout_us: preemption timeout in micro-seconds */ 97 u32 preempt_timeout_us; 98 } sched_props; 99 100 /** @lrc: LRC Snapshot */ 101 struct xe_lrc_snapshot **lrc; 102 103 /** @schedule_state: Schedule State at the moment of Crash */ 104 u32 schedule_state; 105 /** @exec_queue_flags: Flags of the faulty exec_queue */ 106 unsigned long exec_queue_flags; 107 108 /** @guc: GuC Engine Snapshot */ 109 struct { 110 /** @guc.wqi_head: work queue item head */ 111 u32 wqi_head; 112 /** @guc.wqi_tail: work queue item tail */ 113 u32 wqi_tail; 114 /** @guc.id: GuC id for this exec_queue */ 115 u16 id; 116 } guc; 117 118 /** 119 * @parallel_execution: Indication if the failure was during parallel 120 * execution 121 */ 122 bool parallel_execution; 123 /** @parallel: snapshot of the useful parallel scratch */ 124 struct { 125 /** @parallel.wq_desc: Workqueue description */ 126 struct { 127 /** @parallel.wq_desc.head: Workqueue Head */ 128 u32 head; 129 /** @parallel.wq_desc.tail: Workqueue Tail */ 130 u32 tail; 131 /** @parallel.wq_desc.status: Workqueue Status */ 132 u32 status; 133 } wq_desc; 134 /** @wq: Workqueue Items */ 135 u32 wq[WQ_SIZE / sizeof(u32)]; 136 } parallel; 137 138 /** @pending_list_size: Size of the pending list snapshot array */ 139 int pending_list_size; 140 /** @pending_list: snapshot of the pending list info */ 141 struct pending_list_snapshot *pending_list; 142 }; 143 144 #endif 145