| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 164 bool OffsetIsScalable; in runOnMachineFunction() local
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| H A D | AArch64InstrInfo.cpp | 2701 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
2723 bool OffsetIsScalable; in getAddrModeFromMemoryOp() local
3492 bool &OffsetIsScalable, TypeSize &Width, in getMemOperandWithOffsetWidth()
8467 bool OffsetIsScalable; in getOutliningCandidateInfo() local
9015 bool OffsetIsScalable; in fixupPostOutline() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 797 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetInstrInfo.cpp | 1426 bool &OffsetIsScalable, const TargetRegisterInfo *TRI) const { in getMemOperandWithOffset()
1554 bool OffsetIsScalable; in describeLoadedValue() local
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| H A D | MachineSink.cpp | 1361 bool OffsetIsScalable; in SinkingPreventsImplicitNullCheck() local
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| H A D | MachineScheduler.cpp | 1741 bool OffsetIsScalable; member
1951 bool OffsetIsScalable; in collectMemOpRecords() local
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| H A D | ModuloSchedule.cpp | 931 bool OffsetIsScalable; in computeDelta() local
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| H A D | MachinePipeliner.cpp | 2572 bool OffsetIsScalable; in computeDelta() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.cpp | 1912 bool OffsetIsScalable; in schedule() local
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| H A D | SIInstrInfo.cpp | 358 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1485 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2612 getMemOperandsWithOffsetWidth(const MachineInstr & LdSt,SmallVectorImpl<const MachineOperand * > & BaseOps,int64_t & Offset,bool & OffsetIsScalable,LocationSize & Width,const TargetRegisterInfo * TRI) const getMemOperandsWithOffsetWidth() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 3074 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2839 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4616 int64_t &Offset, bool &OffsetIsScalable, LocationSize &Width, in getMemOperandsWithOffsetWidth()
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