1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions 4 * 5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 6 * Copyright (C) 2010 Nokia Corporation 7 * 8 * Paul Walmsley 9 */ 10 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_H 11 #define __ARCH_ARM_MACH_OMAP2_PRM_H 12 13 #include "prcm-common.h" 14 15 # ifndef __ASSEMBLER__ 16 extern struct omap_domain_base prm_base; 17 extern u16 prm_features; 18 extern enum reboot_mode prm_reboot_mode; 19 int omap_prcm_init(void); 20 int omap2_prcm_base_init(void); 21 # endif 22 23 /* 24 * prm_features flag values 25 * 26 * PRM_HAS_IO_WAKEUP: has IO wakeup capability 27 * PRM_HAS_VOLTAGE: has voltage domains 28 */ 29 #define PRM_HAS_IO_WAKEUP BIT(0) 30 #define PRM_HAS_VOLTAGE BIT(1) 31 32 /* 33 * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP 34 * module to softreset 35 */ 36 #define MAX_MODULE_SOFTRESET_WAIT 10000 37 38 /* 39 * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP 40 * submodule to exit hardreset 41 */ 42 #define MAX_MODULE_HARDRESET_WAIT 10000 43 44 /* 45 * Register bitfields 46 */ 47 48 /* 49 * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP 50 * 51 * 2430: PM_PWSTST_MDM 52 * 53 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 54 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 55 * PM_PWSTST_NEON 56 */ 57 #define OMAP_INTRANSITION_MASK (1 << 20) 58 59 60 /* 61 * 24XX: PM_PWSTST_GFX, PM_PWSTST_DSP 62 * 63 * 2430: PM_PWSTST_MDM 64 * 65 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 66 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 67 * PM_PWSTST_NEON 68 */ 69 #define OMAP_POWERSTATEST_SHIFT 0 70 #define OMAP_POWERSTATEST_MASK (0x3 << 0) 71 72 /* 73 * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 74 * PM_PWSTCTRL_DSP, PM_PWSTST_MPU 75 * 76 * 2430: PM_PWSTCTRL_MDM shared bits 77 * 78 * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, 79 * PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, 80 * PM_PWSTCTRL_NEON shared bits 81 */ 82 #define OMAP_POWERSTATE_SHIFT 0 83 #define OMAP_POWERSTATE_MASK (0x3 << 0) 84 85 /* 86 * Standardized OMAP reset source bits 87 * 88 * To the extent these happen to match the hardware register bit 89 * shifts, it's purely coincidental. Used by omap-wdt.c. 90 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever 91 * there are any bits remaining in the global PRM_RSTST register that 92 * haven't been identified, or when the PRM code for the current SoC 93 * doesn't know how to interpret the register. 94 */ 95 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 96 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 97 #define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 98 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 99 #define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 100 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 101 #define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 102 #define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 103 #define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 104 #define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 105 #define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 106 #define OMAP_C2C_RST_SRC_ID_SHIFT 11 107 #define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 108 109 #ifndef __ASSEMBLER__ 110 111 /** 112 * struct prm_reset_src_map - map register bitshifts to standard bitshifts 113 * @reg_shift: bitshift in the PRM reset source register 114 * @std_shift: bitshift equivalent in the standard reset source list 115 * 116 * The fields are signed because -1 is used as a terminator. 117 */ 118 struct prm_reset_src_map { 119 s8 reg_shift; 120 s8 std_shift; 121 }; 122 123 /** 124 * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations 125 * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl 126 * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn 127 * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn 128 * @late_init: ptr to the late init function 129 * @assert_hardreset: ptr to the SoC PRM hardreset assert impl 130 * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl 131 * 132 * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are 133 * deprecated. 134 */ 135 struct prm_ll_data { 136 u32 (*read_reset_sources)(void); 137 bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx); 138 void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx); 139 int (*late_init)(void); 140 int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset); 141 int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod, 142 u16 offset, u16 st_offset); 143 int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, 144 u16 offset); 145 void (*reset_system)(void); 146 int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask); 147 u32 (*vp_check_txdone)(u8 vp_id); 148 void (*vp_clear_txdone)(u8 vp_id); 149 }; 150 151 extern int prm_register(struct prm_ll_data *pld); 152 extern int prm_unregister(struct prm_ll_data *pld); 153 154 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset); 155 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod, 156 u16 offset, u16 st_offset); 157 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset); 158 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx); 159 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); 160 void omap_prm_reset_system(void); 161 162 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); 163 164 /* 165 * Voltage Processor (VP) identifiers 166 */ 167 #define OMAP3_VP_VDD_MPU_ID 0 168 #define OMAP3_VP_VDD_CORE_ID 1 169 #define OMAP4_VP_VDD_CORE_ID 0 170 #define OMAP4_VP_VDD_IVA_ID 1 171 #define OMAP4_VP_VDD_MPU_ID 2 172 173 u32 omap_prm_vp_check_txdone(u8 vp_id); 174 void omap_prm_vp_clear_txdone(u8 vp_id); 175 176 #endif 177 178 179 #endif 180