1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2019 NXP.
4 */
5
6 #include <linux/init.h>
7 #include <linux/io.h>
8 #include <linux/of_address.h>
9 #include <linux/slab.h>
10 #include <linux/sys_soc.h>
11 #include <linux/platform_device.h>
12 #include <linux/arm-smccc.h>
13 #include <linux/of.h>
14 #include <linux/clk.h>
15
16 #define REV_B1 0x21
17
18 #define IMX8MQ_SW_INFO_B1 0x40
19 #define IMX8MQ_SW_MAGIC_B1 0xff0055aa
20
21 #define IMX_SIP_GET_SOC_INFO 0xc2000006
22
23 #define OCOTP_UID_LOW 0x410
24 #define OCOTP_UID_HIGH 0x420
25
26 #define IMX8MP_OCOTP_UID_OFFSET 0x10
27 #define IMX8MP_OCOTP_UID_HIGH 0xE00
28
29 /* Same as ANADIG_DIGPROG_IMX7D */
30 #define ANADIG_DIGPROG_IMX8MM 0x800
31
32 struct imx8_soc_data {
33 char *name;
34 const char *ocotp_compatible;
35 int (*soc_revision)(struct platform_device *pdev, u32 *socrev);
36 int (*soc_uid)(struct platform_device *pdev, u64 *socuid);
37 };
38
39 struct imx8_soc_drvdata {
40 void __iomem *ocotp_base;
41 struct clk *clk;
42 };
43
44 #ifdef CONFIG_HAVE_ARM_SMCCC
imx8mq_soc_revision_from_atf(void)45 static u32 imx8mq_soc_revision_from_atf(void)
46 {
47 struct arm_smccc_res res;
48
49 arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res);
50
51 if (res.a0 == SMCCC_RET_NOT_SUPPORTED)
52 return 0;
53 else
54 return res.a0 & 0xff;
55 }
56 #else
imx8mq_soc_revision_from_atf(void)57 static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; };
58 #endif
59
imx8m_soc_uid(struct platform_device * pdev,u64 * socuid)60 static int imx8m_soc_uid(struct platform_device *pdev, u64 *socuid)
61 {
62 struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev);
63 void __iomem *ocotp_base = drvdata->ocotp_base;
64
65 *socuid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH);
66 *socuid <<= 32;
67 *socuid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW);
68
69 return 0;
70 }
71
imx8mq_soc_revision(struct platform_device * pdev,u32 * socrev)72 static int imx8mq_soc_revision(struct platform_device *pdev, u32 *socrev)
73 {
74 struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev);
75 void __iomem *ocotp_base = drvdata->ocotp_base;
76 u32 magic;
77 u32 rev;
78
79 /*
80 * SOC revision on older imx8mq is not available in fuses so query
81 * the value from ATF instead.
82 */
83 rev = imx8mq_soc_revision_from_atf();
84 if (!rev) {
85 magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
86 if (magic == IMX8MQ_SW_MAGIC_B1)
87 rev = REV_B1;
88 }
89
90 *socrev = rev;
91
92 return 0;
93 }
94
imx8mp_soc_uid(struct platform_device * pdev,u64 * socuid)95 static int imx8mp_soc_uid(struct platform_device *pdev, u64 *socuid)
96 {
97 struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev);
98 void __iomem *ocotp_base = drvdata->ocotp_base;
99
100 socuid[0] = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + IMX8MP_OCOTP_UID_OFFSET);
101 socuid[0] <<= 32;
102 socuid[0] |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + IMX8MP_OCOTP_UID_OFFSET);
103
104 socuid[1] = readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH + 0x10);
105 socuid[1] <<= 32;
106 socuid[1] |= readl_relaxed(ocotp_base + IMX8MP_OCOTP_UID_HIGH);
107
108 return 0;
109 }
110
imx8mm_soc_revision(struct platform_device * pdev,u32 * socrev)111 static int imx8mm_soc_revision(struct platform_device *pdev, u32 *socrev)
112 {
113 struct device_node *np __free(device_node) =
114 of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
115 void __iomem *anatop_base;
116
117 if (!np)
118 return -EINVAL;
119
120 anatop_base = of_iomap(np, 0);
121 if (!anatop_base)
122 return -EINVAL;
123
124 *socrev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM);
125
126 iounmap(anatop_base);
127
128 return 0;
129 }
130
imx8m_soc_prepare(struct platform_device * pdev,const char * ocotp_compatible)131 static int imx8m_soc_prepare(struct platform_device *pdev, const char *ocotp_compatible)
132 {
133 struct device_node *np __free(device_node) =
134 of_find_compatible_node(NULL, NULL, ocotp_compatible);
135 struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev);
136 int ret = 0;
137
138 if (!np)
139 return -EINVAL;
140
141 drvdata->ocotp_base = of_iomap(np, 0);
142 if (!drvdata->ocotp_base)
143 return -EINVAL;
144
145 drvdata->clk = of_clk_get_by_name(np, NULL);
146 if (IS_ERR(drvdata->clk)) {
147 ret = PTR_ERR(drvdata->clk);
148 goto err_clk;
149 }
150
151 return clk_prepare_enable(drvdata->clk);
152
153 err_clk:
154 iounmap(drvdata->ocotp_base);
155 return ret;
156 }
157
imx8m_soc_unprepare(struct platform_device * pdev)158 static void imx8m_soc_unprepare(struct platform_device *pdev)
159 {
160 struct imx8_soc_drvdata *drvdata = platform_get_drvdata(pdev);
161
162 clk_disable_unprepare(drvdata->clk);
163 clk_put(drvdata->clk);
164 iounmap(drvdata->ocotp_base);
165 }
166
167 static const struct imx8_soc_data imx8mq_soc_data = {
168 .name = "i.MX8MQ",
169 .ocotp_compatible = "fsl,imx8mq-ocotp",
170 .soc_revision = imx8mq_soc_revision,
171 .soc_uid = imx8m_soc_uid,
172 };
173
174 static const struct imx8_soc_data imx8mm_soc_data = {
175 .name = "i.MX8MM",
176 .ocotp_compatible = "fsl,imx8mm-ocotp",
177 .soc_revision = imx8mm_soc_revision,
178 .soc_uid = imx8m_soc_uid,
179 };
180
181 static const struct imx8_soc_data imx8mn_soc_data = {
182 .name = "i.MX8MN",
183 .ocotp_compatible = "fsl,imx8mm-ocotp",
184 .soc_revision = imx8mm_soc_revision,
185 .soc_uid = imx8m_soc_uid,
186 };
187
188 static const struct imx8_soc_data imx8mp_soc_data = {
189 .name = "i.MX8MP",
190 .ocotp_compatible = "fsl,imx8mm-ocotp",
191 .soc_revision = imx8mm_soc_revision,
192 .soc_uid = imx8mp_soc_uid,
193 };
194
195 static __maybe_unused const struct of_device_id imx8_soc_match[] = {
196 { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
197 { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
198 { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, },
199 { .compatible = "fsl,imx8mp", .data = &imx8mp_soc_data, },
200 { }
201 };
202
203 #define imx8_revision(dev, soc_rev) \
204 (soc_rev) ? \
205 devm_kasprintf((dev), GFP_KERNEL, "%d.%d", ((soc_rev) >> 4) & 0xf, (soc_rev) & 0xf) : \
206 "unknown"
207
imx8m_unregister_soc(void * data)208 static void imx8m_unregister_soc(void *data)
209 {
210 soc_device_unregister(data);
211 }
212
imx8m_unregister_cpufreq(void * data)213 static void imx8m_unregister_cpufreq(void *data)
214 {
215 platform_device_unregister(data);
216 }
217
imx8m_soc_probe(struct platform_device * pdev)218 static int imx8m_soc_probe(struct platform_device *pdev)
219 {
220 struct soc_device_attribute *soc_dev_attr;
221 struct platform_device *cpufreq_dev;
222 const struct imx8_soc_data *data;
223 struct imx8_soc_drvdata *drvdata;
224 struct device *dev = &pdev->dev;
225 const struct of_device_id *id;
226 struct soc_device *soc_dev;
227 u32 soc_rev = 0;
228 u64 soc_uid[2] = {0, 0};
229 int ret;
230
231 soc_dev_attr = devm_kzalloc(dev, sizeof(*soc_dev_attr), GFP_KERNEL);
232 if (!soc_dev_attr)
233 return -ENOMEM;
234
235 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
236 if (!drvdata)
237 return -ENOMEM;
238
239 platform_set_drvdata(pdev, drvdata);
240
241 soc_dev_attr->family = "Freescale i.MX";
242
243 ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine);
244 if (ret)
245 return ret;
246
247 id = of_match_node(imx8_soc_match, of_root);
248 if (!id)
249 return -ENODEV;
250
251 data = id->data;
252 if (data) {
253 soc_dev_attr->soc_id = data->name;
254 ret = imx8m_soc_prepare(pdev, data->ocotp_compatible);
255 if (ret)
256 return ret;
257
258 if (data->soc_revision) {
259 ret = data->soc_revision(pdev, &soc_rev);
260 if (ret) {
261 imx8m_soc_unprepare(pdev);
262 return ret;
263 }
264 }
265 if (data->soc_uid) {
266 ret = data->soc_uid(pdev, soc_uid);
267 if (ret) {
268 imx8m_soc_unprepare(pdev);
269 return ret;
270 }
271 }
272 imx8m_soc_unprepare(pdev);
273 }
274
275 soc_dev_attr->revision = imx8_revision(dev, soc_rev);
276 if (!soc_dev_attr->revision)
277 return -ENOMEM;
278
279 if (soc_uid[1])
280 soc_dev_attr->serial_number = devm_kasprintf(dev, GFP_KERNEL, "%016llX%016llX",
281 soc_uid[1], soc_uid[0]);
282 else
283 soc_dev_attr->serial_number = devm_kasprintf(dev, GFP_KERNEL, "%016llX",
284 soc_uid[0]);
285 if (!soc_dev_attr->serial_number)
286 return -ENOMEM;
287
288 soc_dev = soc_device_register(soc_dev_attr);
289 if (IS_ERR(soc_dev))
290 return PTR_ERR(soc_dev);
291
292 ret = devm_add_action(dev, imx8m_unregister_soc, soc_dev);
293 if (ret)
294 return ret;
295
296 pr_info("SoC: %s revision %s\n", soc_dev_attr->soc_id,
297 soc_dev_attr->revision);
298
299 if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT)) {
300 cpufreq_dev = platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
301 if (IS_ERR(cpufreq_dev))
302 return dev_err_probe(dev, PTR_ERR(cpufreq_dev),
303 "Failed to register imx-cpufreq-dev device\n");
304 ret = devm_add_action(dev, imx8m_unregister_cpufreq, cpufreq_dev);
305 if (ret)
306 return ret;
307 }
308
309 return 0;
310 }
311
312 static struct platform_driver imx8m_soc_driver = {
313 .probe = imx8m_soc_probe,
314 .driver = {
315 .name = "imx8m-soc",
316 },
317 };
318
imx8_soc_init(void)319 static int __init imx8_soc_init(void)
320 {
321 struct platform_device *pdev;
322 int ret;
323
324 /* No match means this is non-i.MX8M hardware, do nothing. */
325 if (!of_match_node(imx8_soc_match, of_root))
326 return 0;
327
328 ret = platform_driver_register(&imx8m_soc_driver);
329 if (ret) {
330 pr_err("Failed to register imx8m-soc platform driver: %d\n", ret);
331 return ret;
332 }
333
334 pdev = platform_device_register_simple("imx8m-soc", -1, NULL, 0);
335 if (IS_ERR(pdev)) {
336 pr_err("Failed to register imx8m-soc platform device: %ld\n", PTR_ERR(pdev));
337 platform_driver_unregister(&imx8m_soc_driver);
338 return PTR_ERR(pdev);
339 }
340
341 return 0;
342 }
343 device_initcall(imx8_soc_init);
344 MODULE_DESCRIPTION("NXP i.MX8M SoC driver");
345 MODULE_LICENSE("GPL");
346