1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <linux/device.h>
4 #include <linux/err.h>
5 #include <linux/errno.h>
6 #include <linux/fs.h>
7 #include <linux/fsi-sbefifo.h>
8 #include <linux/gfp.h>
9 #include <linux/idr.h>
10 #include <linux/kernel.h>
11 #include <linux/list.h>
12 #include <linux/miscdevice.h>
13 #include <linux/mm.h>
14 #include <linux/module.h>
15 #include <linux/mutex.h>
16 #include <linux/fsi-occ.h>
17 #include <linux/of.h>
18 #include <linux/of_platform.h>
19 #include <linux/platform_device.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/uaccess.h>
23 #include <linux/unaligned.h>
24
25 #define OCC_SRAM_BYTES 8192
26 #define OCC_CMD_DATA_BYTES 8186
27 #define OCC_RESP_DATA_BYTES 8185
28
29 #define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000
30 #define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000
31
32 #define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000
33 #define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000
34
35 #define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */
36
37 #define OCC_TIMEOUT_MS 1000
38 #define OCC_CMD_IN_PRG_WAIT_MS 50
39
40 enum versions { occ_p9, occ_p10 };
41
42 struct occ {
43 struct device *dev;
44 struct device *sbefifo;
45 char name[32];
46 int idx;
47 bool platform_hwmon;
48 u8 sequence_number;
49 void *buffer;
50 void *client_buffer;
51 size_t client_buffer_size;
52 size_t client_response_size;
53 enum versions version;
54 struct miscdevice mdev;
55 struct mutex occ_lock;
56 };
57
58 #define to_occ(x) container_of((x), struct occ, mdev)
59
60 struct occ_response {
61 u8 seq_no;
62 u8 cmd_type;
63 u8 return_status;
64 __be16 data_length;
65 u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
66 } __packed;
67
68 struct occ_client {
69 struct occ *occ;
70 struct mutex lock;
71 size_t data_size;
72 size_t read_offset;
73 u8 *buffer;
74 };
75
76 #define to_client(x) container_of((x), struct occ_client, xfr)
77
78 static DEFINE_IDA(occ_ida);
79
occ_open(struct inode * inode,struct file * file)80 static int occ_open(struct inode *inode, struct file *file)
81 {
82 struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
83 struct miscdevice *mdev = file->private_data;
84 struct occ *occ = to_occ(mdev);
85
86 if (!client)
87 return -ENOMEM;
88
89 client->buffer = kvmalloc(OCC_SRAM_BYTES, GFP_KERNEL);
90 if (!client->buffer) {
91 kfree(client);
92 return -ENOMEM;
93 }
94
95 client->occ = occ;
96 mutex_init(&client->lock);
97 file->private_data = client;
98 get_device(occ->dev);
99
100 return 0;
101 }
102
occ_read(struct file * file,char __user * buf,size_t len,loff_t * offset)103 static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
104 loff_t *offset)
105 {
106 struct occ_client *client = file->private_data;
107 ssize_t rc = 0;
108
109 if (!client)
110 return -ENODEV;
111
112 if (len > OCC_SRAM_BYTES)
113 return -EINVAL;
114
115 mutex_lock(&client->lock);
116
117 /* This should not be possible ... */
118 if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
119 rc = -EIO;
120 goto done;
121 }
122
123 /* Grab how much data we have to read */
124 rc = min(len, client->data_size - client->read_offset);
125 if (copy_to_user(buf, client->buffer + client->read_offset, rc))
126 rc = -EFAULT;
127 else
128 client->read_offset += rc;
129
130 done:
131 mutex_unlock(&client->lock);
132
133 return rc;
134 }
135
occ_write(struct file * file,const char __user * buf,size_t len,loff_t * offset)136 static ssize_t occ_write(struct file *file, const char __user *buf,
137 size_t len, loff_t *offset)
138 {
139 struct occ_client *client = file->private_data;
140 size_t rlen, data_length;
141 ssize_t rc;
142 u8 *cmd;
143
144 if (!client)
145 return -ENODEV;
146
147 if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
148 return -EINVAL;
149
150 mutex_lock(&client->lock);
151
152 /* Construct the command */
153 cmd = client->buffer;
154
155 /*
156 * Copy the user command (assume user data follows the occ command
157 * format)
158 * byte 0: command type
159 * bytes 1-2: data length (msb first)
160 * bytes 3-n: data
161 */
162 if (copy_from_user(&cmd[1], buf, len)) {
163 rc = -EFAULT;
164 goto done;
165 }
166
167 /* Extract data length */
168 data_length = (cmd[2] << 8) + cmd[3];
169 if (data_length > OCC_CMD_DATA_BYTES) {
170 rc = -EINVAL;
171 goto done;
172 }
173
174 /* Submit command; 4 bytes before the data and 2 bytes after */
175 rlen = OCC_SRAM_BYTES;
176 rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
177 &rlen);
178 if (rc)
179 goto done;
180
181 /* Set read tracking data */
182 client->data_size = rlen;
183 client->read_offset = 0;
184
185 /* Done */
186 rc = len;
187
188 done:
189 mutex_unlock(&client->lock);
190
191 return rc;
192 }
193
occ_release(struct inode * inode,struct file * file)194 static int occ_release(struct inode *inode, struct file *file)
195 {
196 struct occ_client *client = file->private_data;
197
198 put_device(client->occ->dev);
199 kvfree(client->buffer);
200 kfree(client);
201
202 return 0;
203 }
204
205 static const struct file_operations occ_fops = {
206 .owner = THIS_MODULE,
207 .open = occ_open,
208 .read = occ_read,
209 .write = occ_write,
210 .release = occ_release,
211 };
212
occ_save_ffdc(struct occ * occ,__be32 * resp,size_t parsed_len,size_t resp_len)213 static void occ_save_ffdc(struct occ *occ, __be32 *resp, size_t parsed_len,
214 size_t resp_len)
215 {
216 if (resp_len > parsed_len) {
217 size_t dh = resp_len - parsed_len;
218 size_t ffdc_len = (dh - 1) * 4; /* SBE words are four bytes */
219 __be32 *ffdc = &resp[parsed_len];
220
221 if (ffdc_len > occ->client_buffer_size)
222 ffdc_len = occ->client_buffer_size;
223
224 memcpy(occ->client_buffer, ffdc, ffdc_len);
225 occ->client_response_size = ffdc_len;
226 }
227 }
228
occ_verify_checksum(struct occ * occ,struct occ_response * resp,u16 data_length)229 static int occ_verify_checksum(struct occ *occ, struct occ_response *resp,
230 u16 data_length)
231 {
232 /* Fetch the two bytes after the data for the checksum. */
233 u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
234 u16 checksum;
235 u16 i;
236
237 checksum = resp->seq_no;
238 checksum += resp->cmd_type;
239 checksum += resp->return_status;
240 checksum += (data_length >> 8) + (data_length & 0xFF);
241
242 for (i = 0; i < data_length; ++i)
243 checksum += resp->data[i];
244
245 if (checksum != checksum_resp) {
246 dev_err(occ->dev, "Bad checksum: %04x!=%04x\n", checksum,
247 checksum_resp);
248 return -EBADE;
249 }
250
251 return 0;
252 }
253
occ_getsram(struct occ * occ,u32 offset,void * data,ssize_t len)254 static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len)
255 {
256 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
257 size_t cmd_len, parsed_len, resp_data_len;
258 size_t resp_len = OCC_MAX_RESP_WORDS;
259 __be32 *resp = occ->buffer;
260 __be32 cmd[6];
261 int idx = 0, rc;
262
263 /*
264 * Magic sequence to do SBE getsram command. SBE will fetch data from
265 * specified SRAM address.
266 */
267 switch (occ->version) {
268 default:
269 case occ_p9:
270 cmd_len = 5;
271 cmd[2] = cpu_to_be32(1); /* Normal mode */
272 cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset);
273 break;
274 case occ_p10:
275 idx = 1;
276 cmd_len = 6;
277 cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
278 cmd[3] = 0;
279 cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset);
280 break;
281 }
282
283 cmd[0] = cpu_to_be32(cmd_len);
284 cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
285 cmd[4 + idx] = cpu_to_be32(data_len);
286
287 rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len);
288 if (rc)
289 return rc;
290
291 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
292 resp, resp_len, &parsed_len);
293 if (rc > 0) {
294 dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
295 rc);
296 occ_save_ffdc(occ, resp, parsed_len, resp_len);
297 return -ECOMM;
298 } else if (rc) {
299 return rc;
300 }
301
302 resp_data_len = be32_to_cpu(resp[parsed_len - 1]);
303 if (resp_data_len != data_len) {
304 dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
305 data_len, resp_data_len);
306 rc = -EBADMSG;
307 } else {
308 memcpy(data, resp, len);
309 }
310
311 return rc;
312 }
313
occ_putsram(struct occ * occ,const void * data,ssize_t len,u8 seq_no,u16 checksum)314 static int occ_putsram(struct occ *occ, const void *data, ssize_t len,
315 u8 seq_no, u16 checksum)
316 {
317 u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
318 size_t cmd_len, parsed_len, resp_data_len;
319 size_t resp_len = OCC_MAX_RESP_WORDS;
320 __be32 *buf = occ->buffer;
321 u8 *byte_buf;
322 int idx = 0, rc;
323
324 cmd_len = (occ->version == occ_p10) ? 6 : 5;
325 cmd_len += data_len >> 2;
326
327 /*
328 * Magic sequence to do SBE putsram command. SBE will transfer
329 * data to specified SRAM address.
330 */
331 buf[0] = cpu_to_be32(cmd_len);
332 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
333
334 switch (occ->version) {
335 default:
336 case occ_p9:
337 buf[2] = cpu_to_be32(1); /* Normal mode */
338 buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR);
339 break;
340 case occ_p10:
341 idx = 1;
342 buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
343 buf[3] = 0;
344 buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR);
345 break;
346 }
347
348 buf[4 + idx] = cpu_to_be32(data_len);
349 memcpy(&buf[5 + idx], data, len);
350
351 byte_buf = (u8 *)&buf[5 + idx];
352 /*
353 * Overwrite the first byte with our sequence number and the last two
354 * bytes with the checksum.
355 */
356 byte_buf[0] = seq_no;
357 byte_buf[len - 2] = checksum >> 8;
358 byte_buf[len - 1] = checksum & 0xff;
359
360 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
361 if (rc)
362 return rc;
363
364 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
365 buf, resp_len, &parsed_len);
366 if (rc > 0) {
367 dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
368 rc);
369 occ_save_ffdc(occ, buf, parsed_len, resp_len);
370 return -ECOMM;
371 } else if (rc) {
372 return rc;
373 }
374
375 if (parsed_len != 1) {
376 dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
377 parsed_len);
378 rc = -EBADMSG;
379 } else {
380 resp_data_len = be32_to_cpu(buf[0]);
381 if (resp_data_len != data_len) {
382 dev_err(occ->dev,
383 "SRAM write expected %d bytes got %zd\n",
384 data_len, resp_data_len);
385 rc = -EBADMSG;
386 }
387 }
388
389 return rc;
390 }
391
occ_trigger_attn(struct occ * occ)392 static int occ_trigger_attn(struct occ *occ)
393 {
394 __be32 *buf = occ->buffer;
395 size_t cmd_len, parsed_len, resp_data_len;
396 size_t resp_len = OCC_MAX_RESP_WORDS;
397 int idx = 0, rc;
398
399 switch (occ->version) {
400 default:
401 case occ_p9:
402 cmd_len = 7;
403 buf[2] = cpu_to_be32(3); /* Circular mode */
404 buf[3] = 0;
405 break;
406 case occ_p10:
407 idx = 1;
408 cmd_len = 8;
409 buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */
410 buf[3] = 0;
411 buf[4] = 0;
412 break;
413 }
414
415 buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */
416 buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
417 buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */
418 buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
419 buf[6 + idx] = 0;
420
421 rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
422 if (rc)
423 return rc;
424
425 rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
426 buf, resp_len, &parsed_len);
427 if (rc > 0) {
428 dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
429 rc);
430 occ_save_ffdc(occ, buf, parsed_len, resp_len);
431 return -ECOMM;
432 } else if (rc) {
433 return rc;
434 }
435
436 if (parsed_len != 1) {
437 dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
438 parsed_len);
439 rc = -EBADMSG;
440 } else {
441 resp_data_len = be32_to_cpu(buf[0]);
442 if (resp_data_len != 8) {
443 dev_err(occ->dev,
444 "SRAM attn expected 8 bytes got %zd\n",
445 resp_data_len);
446 rc = -EBADMSG;
447 }
448 }
449
450 return rc;
451 }
452
fsi_occ_response_not_ready(struct occ_response * resp,u8 seq_no,u8 cmd_type)453 static bool fsi_occ_response_not_ready(struct occ_response *resp, u8 seq_no,
454 u8 cmd_type)
455 {
456 return resp->return_status == OCC_RESP_CMD_IN_PRG ||
457 resp->return_status == OCC_RESP_CRIT_INIT ||
458 resp->seq_no != seq_no || resp->cmd_type != cmd_type;
459 }
460
fsi_occ_submit(struct device * dev,const void * request,size_t req_len,void * response,size_t * resp_len)461 int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
462 void *response, size_t *resp_len)
463 {
464 const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
465 const unsigned long wait_time =
466 msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
467 struct occ *occ = dev_get_drvdata(dev);
468 struct occ_response *resp = response;
469 size_t user_resp_len = *resp_len;
470 u8 seq_no;
471 u8 cmd_type;
472 u16 checksum = 0;
473 u16 resp_data_length;
474 const u8 *byte_request = (const u8 *)request;
475 unsigned long end;
476 int rc;
477 size_t i;
478
479 *resp_len = 0;
480
481 if (!occ)
482 return -ENODEV;
483
484 if (user_resp_len < 7) {
485 dev_dbg(dev, "Bad resplen %zd\n", user_resp_len);
486 return -EINVAL;
487 }
488
489 cmd_type = byte_request[1];
490
491 /* Checksum the request, ignoring first byte (sequence number). */
492 for (i = 1; i < req_len - 2; ++i)
493 checksum += byte_request[i];
494
495 rc = mutex_lock_interruptible(&occ->occ_lock);
496 if (rc)
497 return rc;
498
499 occ->client_buffer = response;
500 occ->client_buffer_size = user_resp_len;
501 occ->client_response_size = 0;
502
503 if (!occ->buffer) {
504 rc = -ENOENT;
505 goto done;
506 }
507
508 /*
509 * Get a sequence number and update the counter. Avoid a sequence
510 * number of 0 which would pass the response check below even if the
511 * OCC response is uninitialized. Any sequence number the user is
512 * trying to send is overwritten since this function is the only common
513 * interface to the OCC and therefore the only place we can guarantee
514 * unique sequence numbers.
515 */
516 seq_no = occ->sequence_number++;
517 if (!occ->sequence_number)
518 occ->sequence_number = 1;
519 checksum += seq_no;
520
521 rc = occ_putsram(occ, request, req_len, seq_no, checksum);
522 if (rc)
523 goto done;
524
525 rc = occ_trigger_attn(occ);
526 if (rc)
527 goto done;
528
529 end = jiffies + timeout;
530 while (true) {
531 /* Read occ response header */
532 rc = occ_getsram(occ, 0, resp, 8);
533 if (rc)
534 goto done;
535
536 if (fsi_occ_response_not_ready(resp, seq_no, cmd_type)) {
537 if (time_after(jiffies, end)) {
538 dev_err(occ->dev,
539 "resp timeout status=%02x seq=%d cmd=%d, our seq=%d cmd=%d\n",
540 resp->return_status, resp->seq_no,
541 resp->cmd_type, seq_no, cmd_type);
542 rc = -ETIMEDOUT;
543 goto done;
544 }
545
546 set_current_state(TASK_UNINTERRUPTIBLE);
547 schedule_timeout(wait_time);
548 } else {
549 /* Extract size of response data */
550 resp_data_length =
551 get_unaligned_be16(&resp->data_length);
552
553 /*
554 * Message size is data length + 5 bytes header + 2
555 * bytes checksum
556 */
557 if ((resp_data_length + 7) > user_resp_len) {
558 rc = -EMSGSIZE;
559 goto done;
560 }
561
562 /*
563 * Get the entire response including the header again,
564 * in case it changed
565 */
566 if (resp_data_length > 1) {
567 rc = occ_getsram(occ, 0, resp,
568 resp_data_length + 7);
569 if (rc)
570 goto done;
571
572 if (!fsi_occ_response_not_ready(resp, seq_no,
573 cmd_type))
574 break;
575 } else {
576 break;
577 }
578 }
579 }
580
581 dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
582 resp->return_status, resp_data_length);
583
584 rc = occ_verify_checksum(occ, resp, resp_data_length);
585 if (rc)
586 goto done;
587
588 occ->client_response_size = resp_data_length + 7;
589
590 done:
591 *resp_len = occ->client_response_size;
592 mutex_unlock(&occ->occ_lock);
593
594 return rc;
595 }
596 EXPORT_SYMBOL_GPL(fsi_occ_submit);
597
occ_unregister_platform_child(struct device * dev,void * data)598 static int occ_unregister_platform_child(struct device *dev, void *data)
599 {
600 struct platform_device *hwmon_dev = to_platform_device(dev);
601
602 platform_device_unregister(hwmon_dev);
603
604 return 0;
605 }
606
occ_unregister_of_child(struct device * dev,void * data)607 static int occ_unregister_of_child(struct device *dev, void *data)
608 {
609 struct platform_device *hwmon_dev = to_platform_device(dev);
610
611 of_device_unregister(hwmon_dev);
612 if (dev->of_node)
613 of_node_clear_flag(dev->of_node, OF_POPULATED);
614
615 return 0;
616 }
617
occ_probe(struct platform_device * pdev)618 static int occ_probe(struct platform_device *pdev)
619 {
620 int rc;
621 u32 reg;
622 char child_name[32];
623 struct occ *occ;
624 struct platform_device *hwmon_dev = NULL;
625 struct device_node *hwmon_node;
626 struct device *dev = &pdev->dev;
627 struct platform_device_info hwmon_dev_info = {
628 .parent = dev,
629 .name = "occ-hwmon",
630 };
631
632 occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
633 if (!occ)
634 return -ENOMEM;
635
636 /* SBE words are always four bytes */
637 occ->buffer = kvmalloc(OCC_MAX_RESP_WORDS * 4, GFP_KERNEL);
638 if (!occ->buffer)
639 return -ENOMEM;
640
641 occ->version = (uintptr_t)of_device_get_match_data(dev);
642 occ->dev = dev;
643 occ->sbefifo = dev->parent;
644 /*
645 * Quickly derive a pseudo-random number from jiffies so that
646 * re-probing the driver doesn't accidentally overlap sequence numbers.
647 */
648 occ->sequence_number = (u8)((jiffies % 0xff) + 1);
649 mutex_init(&occ->occ_lock);
650
651 if (dev->of_node) {
652 rc = of_property_read_u32(dev->of_node, "reg", ®);
653 if (!rc) {
654 /* make sure we don't have a duplicate from dts */
655 occ->idx = ida_alloc_range(&occ_ida, reg, reg,
656 GFP_KERNEL);
657 if (occ->idx < 0)
658 occ->idx = ida_alloc_min(&occ_ida, 1,
659 GFP_KERNEL);
660 } else {
661 occ->idx = ida_alloc_min(&occ_ida, 1, GFP_KERNEL);
662 }
663 } else {
664 occ->idx = ida_alloc_min(&occ_ida, 1, GFP_KERNEL);
665 }
666
667 platform_set_drvdata(pdev, occ);
668
669 snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
670 occ->mdev.fops = &occ_fops;
671 occ->mdev.minor = MISC_DYNAMIC_MINOR;
672 occ->mdev.name = occ->name;
673 occ->mdev.parent = dev;
674
675 rc = misc_register(&occ->mdev);
676 if (rc) {
677 dev_err(dev, "failed to register miscdevice: %d\n", rc);
678 ida_free(&occ_ida, occ->idx);
679 kvfree(occ->buffer);
680 return rc;
681 }
682
683 hwmon_node = of_get_child_by_name(dev->of_node, hwmon_dev_info.name);
684 if (hwmon_node) {
685 snprintf(child_name, sizeof(child_name), "%s.%d", hwmon_dev_info.name, occ->idx);
686 hwmon_dev = of_platform_device_create(hwmon_node, child_name, dev);
687 of_node_put(hwmon_node);
688 }
689
690 if (!hwmon_dev) {
691 occ->platform_hwmon = true;
692 hwmon_dev_info.id = occ->idx;
693 hwmon_dev = platform_device_register_full(&hwmon_dev_info);
694 if (IS_ERR(hwmon_dev))
695 dev_warn(dev, "failed to create hwmon device\n");
696 }
697
698 return 0;
699 }
700
occ_remove(struct platform_device * pdev)701 static void occ_remove(struct platform_device *pdev)
702 {
703 struct occ *occ = platform_get_drvdata(pdev);
704
705 misc_deregister(&occ->mdev);
706
707 mutex_lock(&occ->occ_lock);
708 kvfree(occ->buffer);
709 occ->buffer = NULL;
710 mutex_unlock(&occ->occ_lock);
711
712 if (occ->platform_hwmon)
713 device_for_each_child(&pdev->dev, NULL, occ_unregister_platform_child);
714 else
715 device_for_each_child(&pdev->dev, NULL, occ_unregister_of_child);
716
717 ida_free(&occ_ida, occ->idx);
718 }
719
720 static const struct of_device_id occ_match[] = {
721 {
722 .compatible = "ibm,p9-occ",
723 .data = (void *)occ_p9
724 },
725 {
726 .compatible = "ibm,p10-occ",
727 .data = (void *)occ_p10
728 },
729 { },
730 };
731 MODULE_DEVICE_TABLE(of, occ_match);
732
733 static struct platform_driver occ_driver = {
734 .driver = {
735 .name = "occ",
736 .of_match_table = occ_match,
737 },
738 .probe = occ_probe,
739 .remove = occ_remove,
740 };
741
occ_init(void)742 static int occ_init(void)
743 {
744 return platform_driver_register(&occ_driver);
745 }
746
occ_exit(void)747 static void occ_exit(void)
748 {
749 platform_driver_unregister(&occ_driver);
750
751 ida_destroy(&occ_ida);
752 }
753
754 module_init(occ_init);
755 module_exit(occ_exit);
756
757 MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
758 MODULE_DESCRIPTION("BMC P9 OCC driver");
759 MODULE_LICENSE("GPL");
760