1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * libnvdimm - Non-volatile-memory Devices Subsystem 4 * 5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. 6 */ 7 #ifndef __LIBNVDIMM_H__ 8 #define __LIBNVDIMM_H__ 9 10 #include <linux/io.h> 11 #include <linux/sizes.h> 12 #include <linux/spinlock.h> 13 #include <linux/types.h> 14 #include <linux/uuid.h> 15 16 struct badrange_entry { 17 u64 start; 18 u64 length; 19 struct list_head list; 20 }; 21 22 struct badrange { 23 struct list_head list; 24 spinlock_t lock; 25 }; 26 27 enum { 28 /* unarmed memory devices may not persist writes */ 29 NDD_UNARMED = 1, 30 /* locked memory devices should not be accessed */ 31 NDD_LOCKED = 2, 32 /* memory under security wipes should not be accessed */ 33 NDD_SECURITY_OVERWRITE = 3, 34 /* tracking whether or not there is a pending device reference */ 35 NDD_WORK_PENDING = 4, 36 /* dimm supports namespace labels */ 37 NDD_LABELING = 6, 38 /* 39 * dimm contents have changed requiring invalidation of CPU caches prior 40 * to activation of a region that includes this device 41 */ 42 NDD_INCOHERENT = 7, 43 44 /* dimm provider wants synchronous registration by __nvdimm_create() */ 45 NDD_REGISTER_SYNC = 8, 46 47 /* need to set a limit somewhere, but yes, this is likely overkill */ 48 ND_IOCTL_MAX_BUFLEN = SZ_4M, 49 ND_CMD_MAX_ELEM = 5, 50 ND_CMD_MAX_ENVELOPE = 256, 51 ND_MAX_MAPPINGS = 32, 52 53 /* region flag indicating to direct-map persistent memory by default */ 54 ND_REGION_PAGEMAP = 0, 55 /* 56 * Platform ensures entire CPU store data path is flushed to pmem on 57 * system power loss. 58 */ 59 ND_REGION_PERSIST_CACHE = 1, 60 /* 61 * Platform provides mechanisms to automatically flush outstanding 62 * write data from memory controler to pmem on system power loss. 63 * (ADR) 64 */ 65 ND_REGION_PERSIST_MEMCTRL = 2, 66 67 /* Platform provides asynchronous flush mechanism */ 68 ND_REGION_ASYNC = 3, 69 70 /* Region was created by CXL subsystem */ 71 ND_REGION_CXL = 4, 72 73 /* mark newly adjusted resources as requiring a label update */ 74 DPA_RESOURCE_ADJUSTED = 1 << 0, 75 }; 76 77 struct nvdimm; 78 struct nvdimm_bus_descriptor; 79 typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc, 80 struct nvdimm *nvdimm, unsigned int cmd, void *buf, 81 unsigned int buf_len, int *cmd_rc); 82 83 struct attribute_group; 84 struct device_node; 85 struct module; 86 struct nvdimm_bus_descriptor { 87 const struct attribute_group **attr_groups; 88 unsigned long cmd_mask; 89 unsigned long dimm_family_mask; 90 unsigned long bus_family_mask; 91 struct module *module; 92 char *provider_name; 93 struct device_node *of_node; 94 ndctl_fn ndctl; 95 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc); 96 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc, 97 struct nvdimm *nvdimm, unsigned int cmd, void *data); 98 const struct nvdimm_bus_fw_ops *fw_ops; 99 }; 100 101 struct nd_cmd_desc { 102 int in_num; 103 int out_num; 104 u32 in_sizes[ND_CMD_MAX_ELEM]; 105 int out_sizes[ND_CMD_MAX_ELEM]; 106 }; 107 108 struct nd_interleave_set { 109 /* v1.1 definition of the interleave-set-cookie algorithm */ 110 u64 cookie1; 111 /* v1.2 definition of the interleave-set-cookie algorithm */ 112 u64 cookie2; 113 /* compatibility with initial buggy Linux implementation */ 114 u64 altcookie; 115 116 guid_t type_guid; 117 }; 118 119 struct nd_mapping_desc { 120 struct nvdimm *nvdimm; 121 u64 start; 122 u64 size; 123 int position; 124 }; 125 126 struct bio; 127 struct resource; 128 struct nd_region; 129 struct nd_region_desc { 130 struct resource *res; 131 struct nd_mapping_desc *mapping; 132 u16 num_mappings; 133 const struct attribute_group **attr_groups; 134 struct nd_interleave_set *nd_set; 135 void *provider_data; 136 int num_lanes; 137 int numa_node; 138 int target_node; 139 unsigned long flags; 140 int memregion; 141 struct device_node *of_node; 142 int (*flush)(struct nd_region *nd_region, struct bio *bio); 143 }; 144 145 struct device; 146 void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset, 147 size_t size, unsigned long flags); 148 static inline void __iomem *devm_nvdimm_ioremap(struct device *dev, 149 resource_size_t offset, size_t size) 150 { 151 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0); 152 } 153 154 /* 155 * Note that separate bits for locked + unlocked are defined so that 156 * 'flags == 0' corresponds to an error / not-supported state. 157 */ 158 enum nvdimm_security_bits { 159 NVDIMM_SECURITY_DISABLED, 160 NVDIMM_SECURITY_UNLOCKED, 161 NVDIMM_SECURITY_LOCKED, 162 NVDIMM_SECURITY_FROZEN, 163 NVDIMM_SECURITY_OVERWRITE, 164 }; 165 166 #define NVDIMM_PASSPHRASE_LEN 32 167 #define NVDIMM_KEY_DESC_LEN 22 168 169 struct nvdimm_key_data { 170 u8 data[NVDIMM_PASSPHRASE_LEN]; 171 }; 172 173 enum nvdimm_passphrase_type { 174 NVDIMM_USER, 175 NVDIMM_MASTER, 176 }; 177 178 struct nvdimm_security_ops { 179 unsigned long (*get_flags)(struct nvdimm *nvdimm, 180 enum nvdimm_passphrase_type pass_type); 181 int (*freeze)(struct nvdimm *nvdimm); 182 int (*change_key)(struct nvdimm *nvdimm, 183 const struct nvdimm_key_data *old_data, 184 const struct nvdimm_key_data *new_data, 185 enum nvdimm_passphrase_type pass_type); 186 int (*unlock)(struct nvdimm *nvdimm, 187 const struct nvdimm_key_data *key_data); 188 int (*disable)(struct nvdimm *nvdimm, 189 const struct nvdimm_key_data *key_data); 190 int (*erase)(struct nvdimm *nvdimm, 191 const struct nvdimm_key_data *key_data, 192 enum nvdimm_passphrase_type pass_type); 193 int (*overwrite)(struct nvdimm *nvdimm, 194 const struct nvdimm_key_data *key_data); 195 int (*query_overwrite)(struct nvdimm *nvdimm); 196 int (*disable_master)(struct nvdimm *nvdimm, 197 const struct nvdimm_key_data *key_data); 198 }; 199 200 enum nvdimm_fwa_state { 201 NVDIMM_FWA_INVALID, 202 NVDIMM_FWA_IDLE, 203 NVDIMM_FWA_ARMED, 204 NVDIMM_FWA_BUSY, 205 NVDIMM_FWA_ARM_OVERFLOW, 206 }; 207 208 enum nvdimm_fwa_trigger { 209 NVDIMM_FWA_ARM, 210 NVDIMM_FWA_DISARM, 211 }; 212 213 enum nvdimm_fwa_capability { 214 NVDIMM_FWA_CAP_INVALID, 215 NVDIMM_FWA_CAP_NONE, 216 NVDIMM_FWA_CAP_QUIESCE, 217 NVDIMM_FWA_CAP_LIVE, 218 }; 219 220 enum nvdimm_fwa_result { 221 NVDIMM_FWA_RESULT_INVALID, 222 NVDIMM_FWA_RESULT_NONE, 223 NVDIMM_FWA_RESULT_SUCCESS, 224 NVDIMM_FWA_RESULT_NOTSTAGED, 225 NVDIMM_FWA_RESULT_NEEDRESET, 226 NVDIMM_FWA_RESULT_FAIL, 227 }; 228 229 struct nvdimm_bus_fw_ops { 230 enum nvdimm_fwa_state (*activate_state) 231 (struct nvdimm_bus_descriptor *nd_desc); 232 enum nvdimm_fwa_capability (*capability) 233 (struct nvdimm_bus_descriptor *nd_desc); 234 int (*activate)(struct nvdimm_bus_descriptor *nd_desc); 235 }; 236 237 struct nvdimm_fw_ops { 238 enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm); 239 enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm); 240 int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg); 241 }; 242 243 struct kobject; 244 struct nvdimm_bus; 245 246 void badrange_init(struct badrange *badrange); 247 int badrange_add(struct badrange *badrange, u64 addr, u64 length); 248 void badrange_forget(struct badrange *badrange, phys_addr_t start, 249 unsigned int len); 250 int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr, 251 u64 length); 252 struct nvdimm_bus *nvdimm_bus_register(struct device *parent, 253 struct nvdimm_bus_descriptor *nfit_desc); 254 void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus); 255 struct nvdimm_bus *to_nvdimm_bus(struct device *dev); 256 struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm); 257 struct nvdimm *to_nvdimm(struct device *dev); 258 struct nd_region *to_nd_region(struct device *dev); 259 struct device *nd_region_dev(struct nd_region *nd_region); 260 struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus); 261 struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus); 262 const char *nvdimm_name(struct nvdimm *nvdimm); 263 struct kobject *nvdimm_kobj(struct nvdimm *nvdimm); 264 unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm); 265 void *nvdimm_provider_data(struct nvdimm *nvdimm); 266 struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, 267 void *provider_data, const struct attribute_group **groups, 268 unsigned long flags, unsigned long cmd_mask, int num_flush, 269 struct resource *flush_wpq, const char *dimm_id, 270 const struct nvdimm_security_ops *sec_ops, 271 const struct nvdimm_fw_ops *fw_ops); 272 static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus, 273 void *provider_data, const struct attribute_group **groups, 274 unsigned long flags, unsigned long cmd_mask, int num_flush, 275 struct resource *flush_wpq) 276 { 277 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags, 278 cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL); 279 } 280 void nvdimm_delete(struct nvdimm *nvdimm); 281 void nvdimm_region_delete(struct nd_region *nd_region); 282 283 const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd); 284 const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd); 285 u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, 286 const struct nd_cmd_desc *desc, int idx, void *buf); 287 u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, 288 const struct nd_cmd_desc *desc, int idx, const u32 *in_field, 289 const u32 *out_field, unsigned long remainder); 290 int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count); 291 struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus, 292 struct nd_region_desc *ndr_desc); 293 struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus, 294 struct nd_region_desc *ndr_desc); 295 struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus, 296 struct nd_region_desc *ndr_desc); 297 void *nd_region_provider_data(struct nd_region *nd_region); 298 unsigned int nd_region_acquire_lane(struct nd_region *nd_region); 299 void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane); 300 u64 nd_fletcher64(void *addr, size_t len, bool le); 301 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio); 302 int generic_nvdimm_flush(struct nd_region *nd_region); 303 int nvdimm_has_flush(struct nd_region *nd_region); 304 int nvdimm_has_cache(struct nd_region *nd_region); 305 int nvdimm_in_overwrite(struct nvdimm *nvdimm); 306 bool is_nvdimm_sync(struct nd_region *nd_region); 307 308 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf, 309 unsigned int buf_len, int *cmd_rc) 310 { 311 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm); 312 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus); 313 314 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc); 315 } 316 317 #ifdef CONFIG_ARCH_HAS_PMEM_API 318 #define ARCH_MEMREMAP_PMEM MEMREMAP_WB 319 void arch_wb_cache_pmem(void *addr, size_t size); 320 void arch_invalidate_pmem(void *addr, size_t size); 321 #else 322 #define ARCH_MEMREMAP_PMEM MEMREMAP_WT 323 static inline void arch_wb_cache_pmem(void *addr, size_t size) 324 { 325 } 326 static inline void arch_invalidate_pmem(void *addr, size_t size) 327 { 328 } 329 #endif 330 331 #endif /* __LIBNVDIMM_H__ */ 332