xref: /linux/drivers/hwmon/nct6775-core.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * nct6775 - Driver for the hardware monitoring functionality of
4  *	       Nuvoton NCT677x Super-I/O chips
5  *
6  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
7  *
8  * Derived from w83627ehf driver
9  * Copyright (C) 2005-2012  Jean Delvare <jdelvare@suse.de>
10  * Copyright (C) 2006  Yuan Mu (Winbond),
11  *		       Rudolf Marek <r.marek@assembler.cz>
12  *		       David Hubbard <david.c.hubbard@gmail.com>
13  *		       Daniel J Blueman <daniel.blueman@gmail.com>
14  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
15  *
16  * Shamelessly ripped from the w83627hf driver
17  * Copyright (C) 2003  Mark Studebaker
18  *
19  * Supports the following chips:
20  *
21  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
22  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
23  * nct6116d     9      5       5       3+3    0xd280 0xc1    0x5ca3
24  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
25  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
26  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
27  * nct6791d    15      6       6       2+6    0xc800 0xc1    0x5ca3
28  * nct6792d    15      6       6       2+6    0xc910 0xc1    0x5ca3
29  * nct6793d    15      6       6       2+6    0xd120 0xc1    0x5ca3
30  * nct6795d    14      6       6       2+6    0xd350 0xc1    0x5ca3
31  * nct6796d    14      7       7       2+6    0xd420 0xc1    0x5ca3
32  * nct6797d    14      7       7       2+6    0xd450 0xc1    0x5ca3
33  *                                           (0xd451)
34  * nct6798d    14      7       7       2+6    0xd428 0xc1    0x5ca3
35  *                                           (0xd429)
36  * nct6796d-s  18      7       7       6+2    0xd801 0xc1    0x5ca3
37  * nct6799d-r  18      7       7       6+2    0xd802 0xc1    0x5ca3
38  *
39  * #temp lists the number of monitored temperature sources (first value) plus
40  * the number of directly connectable temperature sensors (second value).
41  */
42 
43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
44 
45 #include <linux/module.h>
46 #include <linux/init.h>
47 #include <linux/slab.h>
48 #include <linux/jiffies.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/bitops.h>
54 #include <linux/nospec.h>
55 #include <linux/regmap.h>
56 #include "lm75.h"
57 #include "nct6775.h"
58 
59 #undef DEFAULT_SYMBOL_NAMESPACE
60 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775
61 
62 #define USE_ALTERNATE
63 
64 /* used to set data->name = nct6775_device_names[data->sio_kind] */
65 static const char * const nct6775_device_names[] = {
66 	[nct6106] = "nct6106",
67 	[nct6116] = "nct6116",
68 	[nct6775] = "nct6775",
69 	[nct6776] = "nct6776",
70 	[nct6779] = "nct6779",
71 	[nct6791] = "nct6791",
72 	[nct6792] = "nct6792",
73 	[nct6793] = "nct6793",
74 	[nct6795] = "nct6795",
75 	[nct6796] = "nct6796",
76 	[nct6797] = "nct6797",
77 	[nct6798] = "nct6798",
78 	[nct6799] = "nct6799",
79 };
80 
81 /* Common and NCT6775 specific data */
82 
83 /*
84  * Voltage min/max registers for nr=7..14 are in bank 5
85  * min/max: 15-17 for NCT6799 only
86  */
87 
88 static const u16 NCT6775_REG_IN_MAX[] = {
89 	0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
90 	0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 };
91 static const u16 NCT6775_REG_IN_MIN[] = {
92 	0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
93 	0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 };
94 static const u16 NCT6775_REG_IN[] = {
95 	0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
96 };
97 
98 #define NCT6775_REG_VBAT		0x5D
99 #define NCT6775_REG_DIODE		0x5E
100 #define NCT6775_DIODE_MASK		0x02
101 
102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
103 
104 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = {
105 	 0,  1,  2,  3,  8, 21, 20, 16, 17, -1, -1, -1,	  /* in0-in11     */
106 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
107 	 6,  7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
108 	 4,  5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
109 	12, -1,						  /* intr0-intr1  */
110 };
111 
112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
113 
114 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = {
115 	 0,  1,  2,  3,  8,  9, 10, 16, 17, -1, -1, -1,	  /* in0-in11     */
116 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
117 	 6,  7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
118 	 4,  5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
119 	12, -1, 21					  /* intr0-intr1, beep_en */
120 };
121 
122 /* DC or PWM output fan configuration */
123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
125 
126 /* Advanced Fan control, some values are common for all fans */
127 
128 static const u16 NCT6775_REG_TARGET[] = {
129 	0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
130 static const u16 NCT6775_REG_FAN_MODE[] = {
131 	0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
132 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
133 	0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
134 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
135 	0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
136 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
137 	0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
138 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
139 	0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
142 
143 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
144 	0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
145 static const u16 NCT6775_REG_PWM[] = {
146 	0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
147 static const u16 NCT6775_REG_PWM_READ[] = {
148 	0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
149 
150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
152 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
153 	0x641, 0x642, 0x643, 0x644 };
154 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
155 
156 static const u16 NCT6775_REG_TEMP[] = {
157 	0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
158 
159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
160 
161 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
162 	0, 0x152, 0x252, 0x628, 0x629, 0x62A };
163 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
164 	0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
165 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
166 	0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
167 
168 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
169 	0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
170 
171 static const u16 NCT6775_REG_TEMP_SEL[] = {
172 	0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
173 
174 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
175 	0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
176 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
177 	0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
179 	0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
180 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
181 	0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
182 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
183 	0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
184 
185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
186 
187 static const u16 NCT6775_REG_AUTO_TEMP[] = {
188 	0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
189 static const u16 NCT6775_REG_AUTO_PWM[] = {
190 	0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
191 
192 #define NCT6775_AUTO_TEMP(data, nr, p)	((data)->REG_AUTO_TEMP[nr] + (p))
193 #define NCT6775_AUTO_PWM(data, nr, p)	((data)->REG_AUTO_PWM[nr] + (p))
194 
195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
196 
197 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
198 	0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
199 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
200 	0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
201 
202 static const char *const nct6775_temp_label[] = {
203 	"",
204 	"SYSTIN",
205 	"CPUTIN",
206 	"AUXTIN",
207 	"AMD SB-TSI",
208 	"PECI Agent 0",
209 	"PECI Agent 1",
210 	"PECI Agent 2",
211 	"PECI Agent 3",
212 	"PECI Agent 4",
213 	"PECI Agent 5",
214 	"PECI Agent 6",
215 	"PECI Agent 7",
216 	"PCH_CHIP_CPU_MAX_TEMP",
217 	"PCH_CHIP_TEMP",
218 	"PCH_CPU_TEMP",
219 	"PCH_MCH_TEMP",
220 	"PCH_DIM0_TEMP",
221 	"PCH_DIM1_TEMP",
222 	"PCH_DIM2_TEMP",
223 	"PCH_DIM3_TEMP"
224 };
225 
226 #define NCT6775_TEMP_MASK	0x001ffffe
227 #define NCT6775_VIRT_TEMP_MASK	0x00000000
228 
229 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
230 	[13] = 0x661,
231 	[14] = 0x662,
232 	[15] = 0x664,
233 };
234 
235 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
236 	[4] = 0xa00,
237 	[5] = 0xa01,
238 	[6] = 0xa02,
239 	[7] = 0xa03,
240 	[8] = 0xa04,
241 	[9] = 0xa05,
242 	[10] = 0xa06,
243 	[11] = 0xa07
244 };
245 
246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
247 
248 /* NCT6776 specific data */
249 
250 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
251 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
252 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
253 
254 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = {
255 	 0,  1,  2,  3,  8, 21, 20, 16, 17, -1, -1, -1,	  /* in0-in11     */
256 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
257 	 6,  7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
258 	 4,  5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
259 	12,  9,						  /* intr0-intr1  */
260 };
261 
262 /* 0xbf: nct6799 only */
263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
264 
265 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = {
266 	 0,  1,  2,  3,  4,  5,  6,  7,  8, -1, -1, -1,	  /* in0-in11     */
267 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
268 	25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
269 	16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
270 	30, 31, 24					  /* intr0-intr1, beep_en */
271 };
272 
273 static const u16 NCT6776_REG_TOLERANCE_H[] = {
274 	0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
275 
276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
278 
279 static const u16 NCT6776_REG_FAN_MIN[] = {
280 	0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
281 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
282 	0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
283 
284 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
285 	0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
286 
287 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 	0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
289 
290 static const char *const nct6776_temp_label[] = {
291 	"",
292 	"SYSTIN",
293 	"CPUTIN",
294 	"AUXTIN",
295 	"SMBUSMASTER 0",
296 	"SMBUSMASTER 1",
297 	"SMBUSMASTER 2",
298 	"SMBUSMASTER 3",
299 	"SMBUSMASTER 4",
300 	"SMBUSMASTER 5",
301 	"SMBUSMASTER 6",
302 	"SMBUSMASTER 7",
303 	"PECI Agent 0",
304 	"PECI Agent 1",
305 	"PCH_CHIP_CPU_MAX_TEMP",
306 	"PCH_CHIP_TEMP",
307 	"PCH_CPU_TEMP",
308 	"PCH_MCH_TEMP",
309 	"PCH_DIM0_TEMP",
310 	"PCH_DIM1_TEMP",
311 	"PCH_DIM2_TEMP",
312 	"PCH_DIM3_TEMP",
313 	"BYTE_TEMP"
314 };
315 
316 #define NCT6776_TEMP_MASK	0x007ffffe
317 #define NCT6776_VIRT_TEMP_MASK	0x00000000
318 
319 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
320 	[14] = 0x401,
321 	[15] = 0x402,
322 	[16] = 0x404,
323 };
324 
325 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
326 	[11] = 0x709,
327 	[12] = 0x70a,
328 };
329 
330 static const u16 NCT6776_REG_TSI_TEMP[] = {
331 	0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
332 
333 /* NCT6779 specific data */
334 
335 /*
336  * 15-17 for NCT6799 only, register labels are:
337  *      CPUVC,  VIN1,  AVSB,  3VCC,  VIN0,  VIN8,  VIN4, 3VSB
338  *       VBAT,   VTT,  VIN5,  VIN6,  VIN2,  VIN3,  VIN7, VIN9
339  *       VHIF, VIN10
340  */
341 static const u16 NCT6779_REG_IN[] = {
342 	0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
343 	0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f,
344 	0x470, 0x471};
345 
346 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
347 	0x459, 0x45A, 0x45B, 0x568 };
348 
349 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = {
350 	 0,  1,  2,  3,  8, 21, 20, 16, 17, 24, 25, 26,	  /* in0-in11     */
351 	27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
352 	 6,  7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
353 	 4,  5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
354 	12,  9,						  /* intr0-intr1  */
355 };
356 
357 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = {
358 	 0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11,	  /* in0-in11     */
359 	12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
360 	25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
361 	16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
362 	30, 31, 24					  /* intr0-intr1, beep_en */
363 };
364 
365 static const u16 NCT6779_REG_FAN[] = {
366 	0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
368 	0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
369 
370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
371 	0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK	0x01
373 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
374 	0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
375 
376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
379 	0x18, 0x152 };
380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
381 	0x3a, 0x153 };
382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
383 	0x39, 0x155 };
384 
385 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
386 	0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 };
387 
388 static const char *const nct6779_temp_label[] = {
389 	"",
390 	"SYSTIN",
391 	"CPUTIN",
392 	"AUXTIN0",
393 	"AUXTIN1",
394 	"AUXTIN2",
395 	"AUXTIN3",
396 	"",
397 	"SMBUSMASTER 0",
398 	"SMBUSMASTER 1",
399 	"SMBUSMASTER 2",
400 	"SMBUSMASTER 3",
401 	"SMBUSMASTER 4",
402 	"SMBUSMASTER 5",
403 	"SMBUSMASTER 6",
404 	"SMBUSMASTER 7",
405 	"PECI Agent 0",
406 	"PECI Agent 1",
407 	"PCH_CHIP_CPU_MAX_TEMP",
408 	"PCH_CHIP_TEMP",
409 	"PCH_CPU_TEMP",
410 	"PCH_MCH_TEMP",
411 	"PCH_DIM0_TEMP",
412 	"PCH_DIM1_TEMP",
413 	"PCH_DIM2_TEMP",
414 	"PCH_DIM3_TEMP",
415 	"BYTE_TEMP",
416 	"",
417 	"",
418 	"",
419 	"",
420 	"Virtual_TEMP"
421 };
422 
423 #define NCT6779_TEMP_MASK	0x07ffff7e
424 #define NCT6779_VIRT_TEMP_MASK	0x00000000
425 #define NCT6791_TEMP_MASK	0x87ffff7e
426 #define NCT6791_VIRT_TEMP_MASK	0x80000000
427 
428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
429 	= { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
430 	    0, 0, 0, 0, 0, 0, 0, 0,
431 	    0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
432 	    0x408, 0 };
433 
434 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
435 	[15] = 0x709,
436 	[16] = 0x70a,
437 };
438 
439 /* NCT6791 specific data */
440 
441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
447 
448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
449 	0x459, 0x45A, 0x45B, 0x568, 0x45D };
450 
451 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = {
452 	 0,  1,  2,  3,  8, 21, 20, 16, 17, 24, 25, 26,	  /* in0-in11     */
453 	27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
454 	 6,  7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
455 	 4,  5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
456 	12,  9,						  /* intr0-intr1  */
457 };
458 
459 /* NCT6792/NCT6793 specific data */
460 
461 static const u16 NCT6792_REG_TEMP_MON[] = {
462 	0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
463 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
464 	0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
465 
466 static const char *const nct6792_temp_label[] = {
467 	"",
468 	"SYSTIN",
469 	"CPUTIN",
470 	"AUXTIN0",
471 	"AUXTIN1",
472 	"AUXTIN2",
473 	"AUXTIN3",
474 	"",
475 	"SMBUSMASTER 0",
476 	"SMBUSMASTER 1",
477 	"SMBUSMASTER 2",
478 	"SMBUSMASTER 3",
479 	"SMBUSMASTER 4",
480 	"SMBUSMASTER 5",
481 	"SMBUSMASTER 6",
482 	"SMBUSMASTER 7",
483 	"PECI Agent 0",
484 	"PECI Agent 1",
485 	"PCH_CHIP_CPU_MAX_TEMP",
486 	"PCH_CHIP_TEMP",
487 	"PCH_CPU_TEMP",
488 	"PCH_MCH_TEMP",
489 	"PCH_DIM0_TEMP",
490 	"PCH_DIM1_TEMP",
491 	"PCH_DIM2_TEMP",
492 	"PCH_DIM3_TEMP",
493 	"BYTE_TEMP",
494 	"PECI Agent 0 Calibration",
495 	"PECI Agent 1 Calibration",
496 	"",
497 	"",
498 	"Virtual_TEMP"
499 };
500 
501 #define NCT6792_TEMP_MASK	0x9fffff7e
502 #define NCT6792_VIRT_TEMP_MASK	0x80000000
503 
504 static const char *const nct6793_temp_label[] = {
505 	"",
506 	"SYSTIN",
507 	"CPUTIN",
508 	"AUXTIN0",
509 	"AUXTIN1",
510 	"AUXTIN2",
511 	"AUXTIN3",
512 	"",
513 	"SMBUSMASTER 0",
514 	"SMBUSMASTER 1",
515 	"",
516 	"",
517 	"",
518 	"",
519 	"",
520 	"",
521 	"PECI Agent 0",
522 	"PECI Agent 1",
523 	"PCH_CHIP_CPU_MAX_TEMP",
524 	"PCH_CHIP_TEMP",
525 	"PCH_CPU_TEMP",
526 	"PCH_MCH_TEMP",
527 	"Agent0 Dimm0 ",
528 	"Agent0 Dimm1",
529 	"Agent1 Dimm0",
530 	"Agent1 Dimm1",
531 	"BYTE_TEMP0",
532 	"BYTE_TEMP1",
533 	"PECI Agent 0 Calibration",
534 	"PECI Agent 1 Calibration",
535 	"",
536 	"Virtual_TEMP"
537 };
538 
539 #define NCT6793_TEMP_MASK	0xbfff037e
540 #define NCT6793_VIRT_TEMP_MASK	0x80000000
541 
542 static const char *const nct6795_temp_label[] = {
543 	"",
544 	"SYSTIN",
545 	"CPUTIN",
546 	"AUXTIN0",
547 	"AUXTIN1",
548 	"AUXTIN2",
549 	"AUXTIN3",
550 	"",
551 	"SMBUSMASTER 0",
552 	"SMBUSMASTER 1",
553 	"SMBUSMASTER 2",
554 	"SMBUSMASTER 3",
555 	"SMBUSMASTER 4",
556 	"SMBUSMASTER 5",
557 	"SMBUSMASTER 6",
558 	"SMBUSMASTER 7",
559 	"PECI Agent 0",
560 	"PECI Agent 1",
561 	"PCH_CHIP_CPU_MAX_TEMP",
562 	"PCH_CHIP_TEMP",
563 	"PCH_CPU_TEMP",
564 	"PCH_MCH_TEMP",
565 	"Agent0 Dimm0",
566 	"Agent0 Dimm1",
567 	"Agent1 Dimm0",
568 	"Agent1 Dimm1",
569 	"BYTE_TEMP0",
570 	"BYTE_TEMP1",
571 	"PECI Agent 0 Calibration",
572 	"PECI Agent 1 Calibration",
573 	"",
574 	"Virtual_TEMP"
575 };
576 
577 #define NCT6795_TEMP_MASK	0xbfffff7e
578 #define NCT6795_VIRT_TEMP_MASK	0x80000000
579 
580 static const char *const nct6796_temp_label[] = {
581 	"",
582 	"SYSTIN",
583 	"CPUTIN",
584 	"AUXTIN0",
585 	"AUXTIN1",
586 	"AUXTIN2",
587 	"AUXTIN3",
588 	"AUXTIN4",
589 	"SMBUSMASTER 0",
590 	"SMBUSMASTER 1",
591 	"Virtual_TEMP",
592 	"Virtual_TEMP",
593 	"",
594 	"",
595 	"",
596 	"",
597 	"PECI Agent 0",
598 	"PECI Agent 1",
599 	"PCH_CHIP_CPU_MAX_TEMP",
600 	"PCH_CHIP_TEMP",
601 	"PCH_CPU_TEMP",
602 	"PCH_MCH_TEMP",
603 	"Agent0 Dimm0",
604 	"Agent0 Dimm1",
605 	"Agent1 Dimm0",
606 	"Agent1 Dimm1",
607 	"BYTE_TEMP0",
608 	"BYTE_TEMP1",
609 	"PECI Agent 0 Calibration",
610 	"PECI Agent 1 Calibration",
611 	"",
612 	"Virtual_TEMP"
613 };
614 
615 #define NCT6796_TEMP_MASK	0xbfff0ffe
616 #define NCT6796_VIRT_TEMP_MASK	0x80000c00
617 
618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
619 
620 static const u16 NCT6798_REG_TEMP[] = {
621 	0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a};
622 
623 static const u16 NCT6798_REG_TEMP_SOURCE[] = {
624 	0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b };
625 
626 static const u16 NCT6798_REG_TEMP_MON[] = {
627 	0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 };
628 static const u16 NCT6798_REG_TEMP_OVER[] = {
629 	0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f };
630 static const u16 NCT6798_REG_TEMP_HYST[] = {
631 	0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 };
632 
633 static const u16 NCT6798_REG_TEMP_CRIT[32] = {
634 	0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 };
635 
636 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = {
637 	0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0,
638 	0, 0, 0, 0, 0x4a2, 0, 0, 0,
639 	0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
640 	0x408, 0x419, 0x41a, 0x4f4, 0x4f5 };
641 
642 static const char *const nct6798_temp_label[] = {
643 	"",
644 	"SYSTIN",
645 	"CPUTIN",
646 	"AUXTIN0",
647 	"AUXTIN1",
648 	"AUXTIN2",
649 	"AUXTIN3",
650 	"AUXTIN4",
651 	"SMBUSMASTER 0",
652 	"SMBUSMASTER 1",
653 	"Virtual_TEMP",
654 	"Virtual_TEMP",
655 	"",
656 	"",
657 	"",
658 	"",
659 	"PECI Agent 0",
660 	"PECI Agent 1",
661 	"PCH_CHIP_CPU_MAX_TEMP",
662 	"PCH_CHIP_TEMP",
663 	"PCH_CPU_TEMP",
664 	"PCH_MCH_TEMP",
665 	"Agent0 Dimm0",
666 	"Agent0 Dimm1",
667 	"Agent1 Dimm0",
668 	"Agent1 Dimm1",
669 	"BYTE_TEMP0",
670 	"BYTE_TEMP1",
671 	"PECI Agent 0 Calibration",	/* undocumented */
672 	"PECI Agent 1 Calibration",	/* undocumented */
673 	"",
674 	"Virtual_TEMP"
675 };
676 
677 #define NCT6798_TEMP_MASK	0xbfff0ffe
678 #define NCT6798_VIRT_TEMP_MASK	0x80000c00
679 
680 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = {
681 	0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 };
682 
683 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = {
684 	 0,  1,  2,  3,  8, -1, 20, 16, 17, 24, 25, 26,	  /* in0-in11     */
685 	27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
686 	 6,  7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
687 	 4,  5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
688 	12,  9,						  /* intr0-intr1  */
689 };
690 
691 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = {
692 	 0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11,	  /* in0-in11     */
693 	12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
694 	25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
695 	16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1,	  /* temp1-temp12 */
696 	30, 31, 24					  /* intr0-intr1, beep_en */
697 };
698 
699 /* PECI Calibration only for NCT6799D, not NCT6796D-S */
700 static const char *const nct6799_temp_label[] = {
701 	"",
702 	"SYSTIN",
703 	"CPUTIN",
704 	"AUXTIN0",
705 	"AUXTIN1",
706 	"AUXTIN2",
707 	"AUXTIN3",
708 	"AUXTIN4",
709 	"SMBUSMASTER 0",
710 	"SMBUSMASTER 1",
711 	"Virtual_TEMP",
712 	"Virtual_TEMP",
713 	"",
714 	"AUXTIN5",
715 	"",
716 	"",
717 	"PECI Agent 0",
718 	"PECI Agent 1",
719 	"PCH_CHIP_CPU_MAX_TEMP",
720 	"PCH_CHIP_TEMP",
721 	"PCH_CPU_TEMP",
722 	"PCH_MCH_TEMP",
723 	"Agent0 Dimm0",
724 	"Agent0 Dimm1",
725 	"Agent1 Dimm0",
726 	"Agent1 Dimm1",
727 	"BYTE_TEMP0",
728 	"BYTE_TEMP1",
729 	"PECI/TSI Agent 0 Calibration",
730 	"PECI/TSI Agent 1 Calibration",
731 	"",
732 	"Virtual_TEMP"
733 };
734 
735 #define NCT6799_TEMP_MASK	0xbfff2ffe
736 #define NCT6799_VIRT_TEMP_MASK	0x80000c00
737 
738 /* NCT6102D/NCT6106D specific data */
739 
740 #define NCT6106_REG_VBAT	0x318
741 #define NCT6106_REG_DIODE	0x319
742 #define NCT6106_DIODE_MASK	0x01
743 
744 static const u16 NCT6106_REG_IN_MAX[] = {
745 	0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
746 static const u16 NCT6106_REG_IN_MIN[] = {
747 	0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
748 static const u16 NCT6106_REG_IN[] = {
749 	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
750 
751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
753 static const u16 NCT6106_REG_TEMP_HYST[] = {
754 	0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
755 static const u16 NCT6106_REG_TEMP_OVER[] = {
756 	0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
757 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
758 	0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
759 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
760 	0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
762 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
763 	0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
764 
765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
769 
770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3, 0, 0 };
771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04, 0, 0 };
772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c, 0xd8, 0xd9 };
773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
774 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
775 	0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
776 
777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
778 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
779 	0x11b, 0x12b, 0x13b };
780 
781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK	0x10
783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
784 
785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
791 
792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
793 
794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
800 
801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
803 
804 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
805 	0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
806 
807 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = {
808 	 0,  1,  2,  3,  4,  5,  7,  8,  9, -1, -1, -1,	  /* in0-in11     */
809 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
810 	32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
811 	16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
812 	48, -1,						  /* intr0-intr1  */
813 };
814 
815 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
816 	0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
817 
818 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = {
819 	 0,  1,  2,  3,  4,  5,  7,  8,  9, 10, 11, 12,	  /* in0-in11     */
820 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
821 	24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
822 	16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
823 	34, -1, 32					  /* intr0-intr1, beep_en */
824 };
825 
826 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
827 	[14] = 0x51,
828 	[15] = 0x52,
829 	[16] = 0x54,
830 };
831 
832 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
833 	[11] = 0x204,
834 	[12] = 0x205,
835 };
836 
837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
838 
839 /* NCT6112D/NCT6114D/NCT6116D specific data */
840 
841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
845 
846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
849 static const u16 NCT6116_REG_TEMP_SOURCE[] = {
850 	0xb0, 0xb1, 0xb2 };
851 
852 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
853 	0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
854 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
855 	0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
856 
857 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
858 	0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
859 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
860 	0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
861 
862 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
863 	0x114, 0x124, 0x134, 0x194, 0x1a4 };
864 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
865 	0x115, 0x125, 0x135, 0x195, 0x1a5 };
866 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
867 	0x116, 0x126, 0x136, 0x196, 0x1a6 };
868 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
869 	0x117, 0x127, 0x137, 0x197, 0x1a7 };
870 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
871 	0x118, 0x128, 0x138, 0x198, 0x1a8 };
872 static const u16 NCT6116_REG_TOLERANCE_H[] = {
873 	0x112, 0x122, 0x132, 0x192, 0x1a2 };
874 
875 static const u16 NCT6116_REG_TARGET[] = {
876 	0x111, 0x121, 0x131, 0x191, 0x1a1 };
877 
878 static const u16 NCT6116_REG_AUTO_TEMP[] = {
879 	0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
880 static const u16 NCT6116_REG_AUTO_PWM[] = {
881 	0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
882 
883 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = {
884 	 0,  1,  2,  3,  4,  5,  7,  8,  9, -1, -1, -1,	  /* in0-in11     */
885 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
886 	32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
887 	16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
888 	48, -1,						  /* intr0-intr1  */
889 };
890 
891 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = {
892 	 0,  1,  2,  3,  4,  5,  7,  8,  9, 10, 11, 12,	  /* in0-in11     */
893 	-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* in12-in23    */
894 	24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1,	  /* fan1-fan12   */
895 	16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1,	  /* temp1-temp12 */
896 	34, -1, 32					  /* intr0-intr1, beep_en */
897 };
898 
899 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
900 
reg_to_pwm_enable(int pwm,int mode)901 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
902 {
903 	if (mode == 0 && pwm == 255)
904 		return off;
905 	return mode + 1;
906 }
907 
pwm_enable_to_reg(enum pwm_enable mode)908 static int pwm_enable_to_reg(enum pwm_enable mode)
909 {
910 	if (mode == off)
911 		return 0;
912 	return mode - 1;
913 }
914 
915 /*
916  * Conversions
917  */
918 
919 /* 1 is DC mode, output in ms */
step_time_from_reg(u8 reg,u8 mode)920 static unsigned int step_time_from_reg(u8 reg, u8 mode)
921 {
922 	return mode ? 400 * reg : 100 * reg;
923 }
924 
step_time_to_reg(unsigned int msec,u8 mode)925 static u8 step_time_to_reg(unsigned int msec, u8 mode)
926 {
927 	return clamp_val((mode ? (msec + 200) / 400 :
928 					(msec + 50) / 100), 1, 255);
929 }
930 
fan_from_reg8(u16 reg,unsigned int divreg)931 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
932 {
933 	if (reg == 0 || reg == 255)
934 		return 0;
935 	return 1350000U / (reg << divreg);
936 }
937 
fan_from_reg13(u16 reg,unsigned int divreg)938 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
939 {
940 	if ((reg & 0xff1f) == 0xff1f)
941 		return 0;
942 
943 	reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
944 
945 	if (reg == 0)
946 		return 0;
947 
948 	return 1350000U / reg;
949 }
950 
fan_from_reg16(u16 reg,unsigned int divreg)951 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
952 {
953 	if (reg == 0 || reg == 0xffff)
954 		return 0;
955 
956 	/*
957 	 * Even though the registers are 16 bit wide, the fan divisor
958 	 * still applies.
959 	 */
960 	return 1350000U / (reg << divreg);
961 }
962 
fan_from_reg_rpm(u16 reg,unsigned int divreg)963 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
964 {
965 	return reg;
966 }
967 
fan_to_reg(u32 fan,unsigned int divreg)968 static u16 fan_to_reg(u32 fan, unsigned int divreg)
969 {
970 	if (!fan)
971 		return 0;
972 
973 	return (1350000U / fan) >> divreg;
974 }
975 
976 static inline unsigned int
div_from_reg(u8 reg)977 div_from_reg(u8 reg)
978 {
979 	return BIT(reg);
980 }
981 
982 /*
983  * Some of the voltage inputs have internal scaling, the tables below
984  * contain 8 (the ADC LSB in mV) * scaling factor * 100
985  */
986 static const u16 scale_in[15] = {
987 	800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
988 	800, 800
989 };
990 
991 /*
992  * NCT6798 scaling:
993  *    CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT,  VTT,  IN5,  IN6, IN2,
994  *      IN3, IN7,  IN9, VHIF, IN10
995  * 15-17 for NCT6799 only
996  */
997 static const u16 scale_in_6798[NUM_IN] = {
998 	800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800,
999 	800, 800,  800, 1600, 800
1000 };
1001 
in_from_reg(u8 reg,u8 nr,const u16 * scales)1002 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales)
1003 {
1004 	return DIV_ROUND_CLOSEST(reg * scales[nr], 100);
1005 }
1006 
in_to_reg(u32 val,u8 nr,const u16 * scales)1007 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales)
1008 {
1009 	return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255);
1010 }
1011 
1012 /* TSI temperatures are in 8.3 format */
tsi_temp_from_reg(unsigned int reg)1013 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
1014 {
1015 	return (reg >> 5) * 125;
1016 }
1017 
1018 /*
1019  * Data structures and manipulation thereof
1020  */
1021 
1022 struct sensor_device_template {
1023 	struct device_attribute dev_attr;
1024 	union {
1025 		struct {
1026 			u8 nr;
1027 			u8 index;
1028 		} s;
1029 		int index;
1030 	} u;
1031 	bool s2;	/* true if both index and nr are used */
1032 };
1033 
1034 struct sensor_device_attr_u {
1035 	union {
1036 		struct sensor_device_attribute a1;
1037 		struct sensor_device_attribute_2 a2;
1038 	} u;
1039 	char name[32];
1040 };
1041 
1042 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {	\
1043 	.attr = {.name = _template, .mode = _mode },		\
1044 	.show	= _show,					\
1045 	.store	= _store,					\
1046 }
1047 
1048 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index)	\
1049 	{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store),	\
1050 	  .u.index = _index,						\
1051 	  .s2 = false }
1052 
1053 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,	\
1054 				 _nr, _index)				\
1055 	{ .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store),	\
1056 	  .u.s.index = _index,						\
1057 	  .u.s.nr = _nr,						\
1058 	  .s2 = true }
1059 
1060 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index)	\
1061 static struct sensor_device_template sensor_dev_template_##_name	\
1062 	= SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,	\
1063 				 _index)
1064 
1065 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,	\
1066 			  _nr, _index)					\
1067 static struct sensor_device_template sensor_dev_template_##_name	\
1068 	= SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,	\
1069 				 _nr, _index)
1070 
1071 struct sensor_template_group {
1072 	struct sensor_device_template **templates;
1073 	umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1074 	int base;
1075 };
1076 
nct6775_add_template_attr_group(struct device * dev,struct nct6775_data * data,const struct sensor_template_group * tg,int repeat)1077 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
1078 					   const struct sensor_template_group *tg, int repeat)
1079 {
1080 	struct attribute_group *group;
1081 	struct sensor_device_attr_u *su;
1082 	struct sensor_device_attribute *a;
1083 	struct sensor_device_attribute_2 *a2;
1084 	struct attribute **attrs;
1085 	struct sensor_device_template **t;
1086 	int i, count;
1087 
1088 	if (repeat <= 0)
1089 		return -EINVAL;
1090 
1091 	t = tg->templates;
1092 	for (count = 0; *t; t++, count++)
1093 		;
1094 
1095 	if (count == 0)
1096 		return -EINVAL;
1097 
1098 	group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1099 	if (group == NULL)
1100 		return -ENOMEM;
1101 
1102 	attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1103 			     GFP_KERNEL);
1104 	if (attrs == NULL)
1105 		return -ENOMEM;
1106 
1107 	su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1108 			       GFP_KERNEL);
1109 	if (su == NULL)
1110 		return -ENOMEM;
1111 
1112 	group->attrs = attrs;
1113 	group->is_visible = tg->is_visible;
1114 
1115 	for (i = 0; i < repeat; i++) {
1116 		t = tg->templates;
1117 		while (*t != NULL) {
1118 			snprintf(su->name, sizeof(su->name),
1119 				 (*t)->dev_attr.attr.name, tg->base + i);
1120 			if ((*t)->s2) {
1121 				a2 = &su->u.a2;
1122 				sysfs_attr_init(&a2->dev_attr.attr);
1123 				a2->dev_attr.attr.name = su->name;
1124 				a2->nr = (*t)->u.s.nr + i;
1125 				a2->index = (*t)->u.s.index;
1126 				a2->dev_attr.attr.mode =
1127 				  (*t)->dev_attr.attr.mode;
1128 				a2->dev_attr.show = (*t)->dev_attr.show;
1129 				a2->dev_attr.store = (*t)->dev_attr.store;
1130 				*attrs = &a2->dev_attr.attr;
1131 			} else {
1132 				a = &su->u.a1;
1133 				sysfs_attr_init(&a->dev_attr.attr);
1134 				a->dev_attr.attr.name = su->name;
1135 				a->index = (*t)->u.index + i;
1136 				a->dev_attr.attr.mode =
1137 				  (*t)->dev_attr.attr.mode;
1138 				a->dev_attr.show = (*t)->dev_attr.show;
1139 				a->dev_attr.store = (*t)->dev_attr.store;
1140 				*attrs = &a->dev_attr.attr;
1141 			}
1142 			attrs++;
1143 			su++;
1144 			t++;
1145 		}
1146 	}
1147 
1148 	return nct6775_add_attr_group(data, group);
1149 }
1150 
nct6775_reg_is_word_sized(struct nct6775_data * data,u16 reg)1151 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1152 {
1153 	switch (data->kind) {
1154 	case nct6106:
1155 		return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1156 		  (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1157 		  reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1158 		  reg == 0x111 || reg == 0x121 || reg == 0x131;
1159 	case nct6116:
1160 		return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1161 		  reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1162 		  reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1163 		  reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1164 		  reg == 0x191 || reg == 0x1a1;
1165 	case nct6775:
1166 		return (((reg & 0xff00) == 0x100 ||
1167 		    (reg & 0xff00) == 0x200) &&
1168 		   ((reg & 0x00ff) == 0x50 ||
1169 		    (reg & 0x00ff) == 0x53 ||
1170 		    (reg & 0x00ff) == 0x55)) ||
1171 		  (reg & 0xfff0) == 0x630 ||
1172 		  reg == 0x640 || reg == 0x642 ||
1173 		  reg == 0x662 || reg == 0x669 ||
1174 		  ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1175 		  reg == 0x73 || reg == 0x75 || reg == 0x77;
1176 	case nct6776:
1177 		return (((reg & 0xff00) == 0x100 ||
1178 		    (reg & 0xff00) == 0x200) &&
1179 		   ((reg & 0x00ff) == 0x50 ||
1180 		    (reg & 0x00ff) == 0x53 ||
1181 		    (reg & 0x00ff) == 0x55)) ||
1182 		  (reg & 0xfff0) == 0x630 ||
1183 		  reg == 0x402 ||
1184 		  (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1185 		  reg == 0x640 || reg == 0x642 ||
1186 		  ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1187 		  reg == 0x73 || reg == 0x75 || reg == 0x77;
1188 	case nct6779:
1189 	case nct6791:
1190 	case nct6792:
1191 	case nct6793:
1192 	case nct6795:
1193 	case nct6796:
1194 	case nct6797:
1195 	case nct6798:
1196 	case nct6799:
1197 		return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1198 		  (reg & 0xfff0) == 0x4c0 ||
1199 		  reg == 0x402 ||
1200 		  (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1201 		  reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1202 		  reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1203 		  reg == 0x64c ||
1204 		  reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1205 		  reg == 0x7b || reg == 0x7d;
1206 	}
1207 	return false;
1208 }
1209 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
1210 
1211 /* We left-align 8-bit temperature values to make the code simpler */
nct6775_read_temp(struct nct6775_data * data,u16 reg,u16 * val)1212 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1213 {
1214 	int err;
1215 
1216 	err = nct6775_read_value(data, reg, val);
1217 	if (err)
1218 		return err;
1219 
1220 	if (!nct6775_reg_is_word_sized(data, reg))
1221 		*val <<= 8;
1222 
1223 	return 0;
1224 }
1225 
1226 /* This function assumes that the caller holds data->update_lock */
nct6775_write_fan_div(struct nct6775_data * data,int nr)1227 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1228 {
1229 	u16 reg;
1230 	int err;
1231 	u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1232 	unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
1233 
1234 	err = nct6775_read_value(data, fandiv_reg, &reg);
1235 	if (err)
1236 		return err;
1237 	reg &= 0x70 >> oddshift;
1238 	reg |= (data->fan_div[nr] & 0x7) << oddshift;
1239 	return nct6775_write_value(data, fandiv_reg, reg);
1240 }
1241 
nct6775_write_fan_div_common(struct nct6775_data * data,int nr)1242 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1243 {
1244 	if (data->kind == nct6775)
1245 		return nct6775_write_fan_div(data, nr);
1246 	return 0;
1247 }
1248 
nct6775_update_fan_div(struct nct6775_data * data)1249 static int nct6775_update_fan_div(struct nct6775_data *data)
1250 {
1251 	int err;
1252 	u16 i;
1253 
1254 	err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1255 	if (err)
1256 		return err;
1257 	data->fan_div[0] = i & 0x7;
1258 	data->fan_div[1] = (i & 0x70) >> 4;
1259 	err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1260 	if (err)
1261 		return err;
1262 	data->fan_div[2] = i & 0x7;
1263 	if (data->has_fan & BIT(3))
1264 		data->fan_div[3] = (i & 0x70) >> 4;
1265 
1266 	return 0;
1267 }
1268 
nct6775_update_fan_div_common(struct nct6775_data * data)1269 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1270 {
1271 	if (data->kind == nct6775)
1272 		return nct6775_update_fan_div(data);
1273 	return 0;
1274 }
1275 
nct6775_init_fan_div(struct nct6775_data * data)1276 static int nct6775_init_fan_div(struct nct6775_data *data)
1277 {
1278 	int i, err;
1279 
1280 	err = nct6775_update_fan_div_common(data);
1281 	if (err)
1282 		return err;
1283 
1284 	/*
1285 	 * For all fans, start with highest divider value if the divider
1286 	 * register is not initialized. This ensures that we get a
1287 	 * reading from the fan count register, even if it is not optimal.
1288 	 * We'll compute a better divider later on.
1289 	 */
1290 	for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1291 		if (!(data->has_fan & BIT(i)))
1292 			continue;
1293 		if (data->fan_div[i] == 0) {
1294 			data->fan_div[i] = 7;
1295 			err = nct6775_write_fan_div_common(data, i);
1296 			if (err)
1297 				return err;
1298 		}
1299 	}
1300 
1301 	return 0;
1302 }
1303 
nct6775_init_fan_common(struct device * dev,struct nct6775_data * data)1304 static int nct6775_init_fan_common(struct device *dev,
1305 				   struct nct6775_data *data)
1306 {
1307 	int i, err;
1308 	u16 reg;
1309 
1310 	if (data->has_fan_div) {
1311 		err = nct6775_init_fan_div(data);
1312 		if (err)
1313 			return err;
1314 	}
1315 
1316 	/*
1317 	 * If fan_min is not set (0), set it to 0xff to disable it. This
1318 	 * prevents the unnecessary warning when fanX_min is reported as 0.
1319 	 */
1320 	for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1321 		if (data->has_fan_min & BIT(i)) {
1322 			err = nct6775_read_value(data, data->REG_FAN_MIN[i], &reg);
1323 			if (err)
1324 				return err;
1325 			if (!reg) {
1326 				err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1327 							  data->has_fan_div ? 0xff : 0xff1f);
1328 				if (err)
1329 					return err;
1330 			}
1331 		}
1332 	}
1333 
1334 	return 0;
1335 }
1336 
nct6775_select_fan_div(struct device * dev,struct nct6775_data * data,int nr,u16 reg)1337 static int nct6775_select_fan_div(struct device *dev,
1338 				  struct nct6775_data *data, int nr, u16 reg)
1339 {
1340 	int err;
1341 	u8 fan_div = data->fan_div[nr];
1342 	u16 fan_min;
1343 
1344 	if (!data->has_fan_div)
1345 		return 0;
1346 
1347 	/*
1348 	 * If we failed to measure the fan speed, or the reported value is not
1349 	 * in the optimal range, and the clock divider can be modified,
1350 	 * let's try that for next time.
1351 	 */
1352 	if (reg == 0x00 && fan_div < 0x07)
1353 		fan_div++;
1354 	else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1355 		fan_div--;
1356 
1357 	if (fan_div != data->fan_div[nr]) {
1358 		dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1359 			nr + 1, div_from_reg(data->fan_div[nr]),
1360 			div_from_reg(fan_div));
1361 
1362 		/* Preserve min limit if possible */
1363 		if (data->has_fan_min & BIT(nr)) {
1364 			fan_min = data->fan_min[nr];
1365 			if (fan_div > data->fan_div[nr]) {
1366 				if (fan_min != 255 && fan_min > 1)
1367 					fan_min >>= 1;
1368 			} else {
1369 				if (fan_min != 255) {
1370 					fan_min <<= 1;
1371 					if (fan_min > 254)
1372 						fan_min = 254;
1373 				}
1374 			}
1375 			if (fan_min != data->fan_min[nr]) {
1376 				data->fan_min[nr] = fan_min;
1377 				err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1378 				if (err)
1379 					return err;
1380 			}
1381 		}
1382 		data->fan_div[nr] = fan_div;
1383 		err = nct6775_write_fan_div_common(data, nr);
1384 		if (err)
1385 			return err;
1386 	}
1387 
1388 	return 0;
1389 }
1390 
nct6775_update_pwm(struct device * dev)1391 static int nct6775_update_pwm(struct device *dev)
1392 {
1393 	struct nct6775_data *data = dev_get_drvdata(dev);
1394 	int i, j, err;
1395 	u16 fanmodecfg, reg;
1396 	bool duty_is_dc;
1397 
1398 	for (i = 0; i < data->pwm_num; i++) {
1399 		if (!(data->has_pwm & BIT(i)))
1400 			continue;
1401 
1402 		err = nct6775_read_value(data, data->REG_PWM_MODE[i], &reg);
1403 		if (err)
1404 			return err;
1405 		duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1406 		data->pwm_mode[i] = !duty_is_dc;
1407 
1408 		err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1409 		if (err)
1410 			return err;
1411 		for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1412 			if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1413 				err = nct6775_read_value(data, data->REG_PWM[j][i], &reg);
1414 				if (err)
1415 					return err;
1416 				data->pwm[j][i] = reg;
1417 			}
1418 		}
1419 
1420 		data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1421 							(fanmodecfg >> 4) & 7);
1422 
1423 		if (!data->temp_tolerance[0][i] ||
1424 		    data->pwm_enable[i] != speed_cruise)
1425 			data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1426 		if (!data->target_speed_tolerance[i] ||
1427 		    data->pwm_enable[i] == speed_cruise) {
1428 			u8 t = fanmodecfg & 0x0f;
1429 
1430 			if (data->REG_TOLERANCE_H) {
1431 				err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], &reg);
1432 				if (err)
1433 					return err;
1434 				t |= (reg & 0x70) >> 1;
1435 			}
1436 			data->target_speed_tolerance[i] = t;
1437 		}
1438 
1439 		err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], &reg);
1440 		if (err)
1441 			return err;
1442 		data->temp_tolerance[1][i] = reg;
1443 
1444 		err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &reg);
1445 		if (err)
1446 			return err;
1447 		data->pwm_temp_sel[i] = reg & 0x1f;
1448 		/* If fan can stop, report floor as 0 */
1449 		if (reg & 0x80)
1450 			data->pwm[2][i] = 0;
1451 
1452 		if (!data->REG_WEIGHT_TEMP_SEL[i])
1453 			continue;
1454 
1455 		err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], &reg);
1456 		if (err)
1457 			return err;
1458 		data->pwm_weight_temp_sel[i] = reg & 0x1f;
1459 		/* If weight is disabled, report weight source as 0 */
1460 		if (!(reg & 0x80))
1461 			data->pwm_weight_temp_sel[i] = 0;
1462 
1463 		/* Weight temp data */
1464 		for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1465 			err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], &reg);
1466 			if (err)
1467 				return err;
1468 			data->weight_temp[j][i] = reg;
1469 		}
1470 	}
1471 
1472 	return 0;
1473 }
1474 
nct6775_update_pwm_limits(struct device * dev)1475 static int nct6775_update_pwm_limits(struct device *dev)
1476 {
1477 	struct nct6775_data *data = dev_get_drvdata(dev);
1478 	int i, j, err;
1479 	u16 reg, reg_t;
1480 
1481 	for (i = 0; i < data->pwm_num; i++) {
1482 		if (!(data->has_pwm & BIT(i)))
1483 			continue;
1484 
1485 		for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1486 			err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], &reg);
1487 			if (err)
1488 				return err;
1489 			data->fan_time[j][i] = reg;
1490 		}
1491 
1492 		err = nct6775_read_value(data, data->REG_TARGET[i], &reg_t);
1493 		if (err)
1494 			return err;
1495 
1496 		/* Update only in matching mode or if never updated */
1497 		if (!data->target_temp[i] ||
1498 		    data->pwm_enable[i] == thermal_cruise)
1499 			data->target_temp[i] = reg_t & data->target_temp_mask;
1500 		if (!data->target_speed[i] ||
1501 		    data->pwm_enable[i] == speed_cruise) {
1502 			if (data->REG_TOLERANCE_H) {
1503 				err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], &reg);
1504 				if (err)
1505 					return err;
1506 				reg_t |= (reg & 0x0f) << 8;
1507 			}
1508 			data->target_speed[i] = reg_t;
1509 		}
1510 
1511 		for (j = 0; j < data->auto_pwm_num; j++) {
1512 			err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), &reg);
1513 			if (err)
1514 				return err;
1515 			data->auto_pwm[i][j] = reg;
1516 
1517 			err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), &reg);
1518 			if (err)
1519 				return err;
1520 			data->auto_temp[i][j] = reg;
1521 		}
1522 
1523 		/* critical auto_pwm temperature data */
1524 		err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], &reg);
1525 		if (err)
1526 			return err;
1527 		data->auto_temp[i][data->auto_pwm_num] = reg;
1528 
1529 		switch (data->kind) {
1530 		case nct6775:
1531 			err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], &reg);
1532 			if (err)
1533 				return err;
1534 			data->auto_pwm[i][data->auto_pwm_num] =
1535 						(reg & 0x02) ? 0xff : 0x00;
1536 			break;
1537 		case nct6776:
1538 			data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1539 			break;
1540 		case nct6106:
1541 		case nct6116:
1542 		case nct6779:
1543 		case nct6791:
1544 		case nct6792:
1545 		case nct6793:
1546 		case nct6795:
1547 		case nct6796:
1548 		case nct6797:
1549 		case nct6798:
1550 		case nct6799:
1551 			err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], &reg);
1552 			if (err)
1553 				return err;
1554 			if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1555 				err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], &reg);
1556 				if (err)
1557 					return err;
1558 			} else {
1559 				reg = 0xff;
1560 			}
1561 			data->auto_pwm[i][data->auto_pwm_num] = reg;
1562 			break;
1563 		}
1564 	}
1565 
1566 	return 0;
1567 }
1568 
nct6775_update_device(struct device * dev)1569 struct nct6775_data *nct6775_update_device(struct device *dev)
1570 {
1571 	struct nct6775_data *data = dev_get_drvdata(dev);
1572 	int i, j, err = 0;
1573 	u16 reg;
1574 
1575 	mutex_lock(&data->update_lock);
1576 
1577 	if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1578 	    || !data->valid) {
1579 		/* Fan clock dividers */
1580 		err = nct6775_update_fan_div_common(data);
1581 		if (err)
1582 			goto out;
1583 
1584 		/* Measured voltages and limits */
1585 		for (i = 0; i < data->in_num; i++) {
1586 			if (!(data->have_in & BIT(i)))
1587 				continue;
1588 
1589 			err = nct6775_read_value(data, data->REG_VIN[i], &reg);
1590 			if (err)
1591 				goto out;
1592 			data->in[i][0] = reg;
1593 
1594 			err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], &reg);
1595 			if (err)
1596 				goto out;
1597 			data->in[i][1] = reg;
1598 
1599 			err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], &reg);
1600 			if (err)
1601 				goto out;
1602 			data->in[i][2] = reg;
1603 		}
1604 
1605 		/* Measured fan speeds and limits */
1606 		for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1607 			if (!(data->has_fan & BIT(i)))
1608 				continue;
1609 
1610 			err = nct6775_read_value(data, data->REG_FAN[i], &reg);
1611 			if (err)
1612 				goto out;
1613 			data->rpm[i] = data->fan_from_reg(reg,
1614 							  data->fan_div[i]);
1615 
1616 			if (data->has_fan_min & BIT(i)) {
1617 				u16 tmp;
1618 
1619 				err = nct6775_read_value(data, data->REG_FAN_MIN[i], &tmp);
1620 				if (err)
1621 					goto out;
1622 				data->fan_min[i] = tmp;
1623 			}
1624 
1625 			if (data->REG_FAN_PULSES[i]) {
1626 				u16 tmp;
1627 
1628 				err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &tmp);
1629 				if (err)
1630 					goto out;
1631 				data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1632 			}
1633 
1634 			err = nct6775_select_fan_div(dev, data, i, reg);
1635 			if (err)
1636 				goto out;
1637 		}
1638 
1639 		err = nct6775_update_pwm(dev);
1640 		if (err)
1641 			goto out;
1642 
1643 		err = nct6775_update_pwm_limits(dev);
1644 		if (err)
1645 			goto out;
1646 
1647 		/* Measured temperatures and limits */
1648 		for (i = 0; i < NUM_TEMP; i++) {
1649 			if (!(data->have_temp & BIT(i)))
1650 				continue;
1651 			for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1652 				if (data->reg_temp[j][i]) {
1653 					err = nct6775_read_temp(data, data->reg_temp[j][i], &reg);
1654 					if (err)
1655 						goto out;
1656 					data->temp[j][i] = reg;
1657 				}
1658 			}
1659 			if (i >= NUM_TEMP_FIXED ||
1660 			    !(data->have_temp_fixed & BIT(i)))
1661 				continue;
1662 			err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], &reg);
1663 			if (err)
1664 				goto out;
1665 			data->temp_offset[i] = reg;
1666 		}
1667 
1668 		for (i = 0; i < NUM_TSI_TEMP; i++) {
1669 			if (!(data->have_tsi_temp & BIT(i)))
1670 				continue;
1671 			err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &reg);
1672 			if (err)
1673 				goto out;
1674 			data->tsi_temp[i] = reg;
1675 		}
1676 
1677 		data->alarms = 0;
1678 		for (i = 0; i < NUM_REG_ALARM; i++) {
1679 			u16 alarm;
1680 
1681 			if (!data->REG_ALARM[i])
1682 				continue;
1683 			err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
1684 			if (err)
1685 				goto out;
1686 			data->alarms |= ((u64)alarm) << (i << 3);
1687 		}
1688 
1689 		data->beeps = 0;
1690 		for (i = 0; i < NUM_REG_BEEP; i++) {
1691 			u16 beep;
1692 
1693 			if (!data->REG_BEEP[i])
1694 				continue;
1695 			err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
1696 			if (err)
1697 				goto out;
1698 			data->beeps |= ((u64)beep) << (i << 3);
1699 		}
1700 
1701 		data->last_updated = jiffies;
1702 		data->valid = true;
1703 	}
1704 out:
1705 	mutex_unlock(&data->update_lock);
1706 	return err ? ERR_PTR(err) : data;
1707 }
1708 EXPORT_SYMBOL_GPL(nct6775_update_device);
1709 
1710 /*
1711  * Sysfs callback functions
1712  */
1713 static ssize_t
show_in_reg(struct device * dev,struct device_attribute * attr,char * buf)1714 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1715 {
1716 	struct nct6775_data *data = nct6775_update_device(dev);
1717 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1718 	int index = sattr->index;
1719 	int nr = sattr->nr;
1720 
1721 	if (IS_ERR(data))
1722 		return PTR_ERR(data);
1723 
1724 	return sprintf(buf, "%ld\n",
1725 		       in_from_reg(data->in[nr][index], nr, data->scale_in));
1726 }
1727 
1728 static ssize_t
store_in_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1729 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1730 	     size_t count)
1731 {
1732 	struct nct6775_data *data = dev_get_drvdata(dev);
1733 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1734 	int index = sattr->index;
1735 	int nr = sattr->nr;
1736 	unsigned long val;
1737 	int err;
1738 
1739 	err = kstrtoul(buf, 10, &val);
1740 	if (err < 0)
1741 		return err;
1742 	mutex_lock(&data->update_lock);
1743 	data->in[nr][index] = in_to_reg(val, nr, data->scale_in);
1744 	err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
1745 	mutex_unlock(&data->update_lock);
1746 	return err ? : count;
1747 }
1748 
1749 ssize_t
nct6775_show_alarm(struct device * dev,struct device_attribute * attr,char * buf)1750 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1751 {
1752 	struct nct6775_data *data = nct6775_update_device(dev);
1753 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1754 	int nr;
1755 
1756 	if (IS_ERR(data))
1757 		return PTR_ERR(data);
1758 
1759 	nr = data->ALARM_BITS[sattr->index];
1760 	return sprintf(buf, "%u\n",
1761 		       (unsigned int)((data->alarms >> nr) & 0x01));
1762 }
1763 EXPORT_SYMBOL_GPL(nct6775_show_alarm);
1764 
find_temp_source(struct nct6775_data * data,int index,int count)1765 static int find_temp_source(struct nct6775_data *data, int index, int count)
1766 {
1767 	int source = data->temp_src[index];
1768 	int nr, err;
1769 
1770 	for (nr = 0; nr < count; nr++) {
1771 		u16 src;
1772 
1773 		err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
1774 		if (err)
1775 			return err;
1776 		if ((src & 0x1f) == source)
1777 			return nr;
1778 	}
1779 	return -ENODEV;
1780 }
1781 
1782 static ssize_t
show_temp_alarm(struct device * dev,struct device_attribute * attr,char * buf)1783 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1784 {
1785 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1786 	struct nct6775_data *data = nct6775_update_device(dev);
1787 	unsigned int alarm = 0;
1788 	int nr;
1789 
1790 	if (IS_ERR(data))
1791 		return PTR_ERR(data);
1792 
1793 	/*
1794 	 * For temperatures, there is no fixed mapping from registers to alarm
1795 	 * bits. Alarm bits are determined by the temperature source mapping.
1796 	 */
1797 	nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1798 	if (nr >= 0) {
1799 		int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1800 
1801 		alarm = (data->alarms >> bit) & 0x01;
1802 	}
1803 	return sprintf(buf, "%u\n", alarm);
1804 }
1805 
1806 ssize_t
nct6775_show_beep(struct device * dev,struct device_attribute * attr,char * buf)1807 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1808 {
1809 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1810 	struct nct6775_data *data = nct6775_update_device(dev);
1811 	int nr;
1812 
1813 	if (IS_ERR(data))
1814 		return PTR_ERR(data);
1815 
1816 	nr = data->BEEP_BITS[sattr->index];
1817 
1818 	return sprintf(buf, "%u\n",
1819 		       (unsigned int)((data->beeps >> nr) & 0x01));
1820 }
1821 EXPORT_SYMBOL_GPL(nct6775_show_beep);
1822 
1823 ssize_t
nct6775_store_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1824 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1825 {
1826 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1827 	struct nct6775_data *data = dev_get_drvdata(dev);
1828 	int nr = data->BEEP_BITS[sattr->index];
1829 	int regindex = nr >> 3;
1830 	unsigned long val;
1831 	int err;
1832 
1833 	err = kstrtoul(buf, 10, &val);
1834 	if (err < 0)
1835 		return err;
1836 	if (val > 1)
1837 		return -EINVAL;
1838 
1839 	mutex_lock(&data->update_lock);
1840 	if (val)
1841 		data->beeps |= (1ULL << nr);
1842 	else
1843 		data->beeps &= ~(1ULL << nr);
1844 	err = nct6775_write_value(data, data->REG_BEEP[regindex],
1845 				  (data->beeps >> (regindex << 3)) & 0xff);
1846 	mutex_unlock(&data->update_lock);
1847 	return err ? : count;
1848 }
1849 EXPORT_SYMBOL_GPL(nct6775_store_beep);
1850 
1851 static ssize_t
show_temp_beep(struct device * dev,struct device_attribute * attr,char * buf)1852 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1853 {
1854 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1855 	struct nct6775_data *data = nct6775_update_device(dev);
1856 	unsigned int beep = 0;
1857 	int nr;
1858 
1859 	if (IS_ERR(data))
1860 		return PTR_ERR(data);
1861 
1862 	/*
1863 	 * For temperatures, there is no fixed mapping from registers to beep
1864 	 * enable bits. Beep enable bits are determined by the temperature
1865 	 * source mapping.
1866 	 */
1867 	nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1868 	if (nr >= 0) {
1869 		int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1870 
1871 		beep = (data->beeps >> bit) & 0x01;
1872 	}
1873 	return sprintf(buf, "%u\n", beep);
1874 }
1875 
1876 static ssize_t
store_temp_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1877 store_temp_beep(struct device *dev, struct device_attribute *attr,
1878 		const char *buf, size_t count)
1879 {
1880 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1881 	struct nct6775_data *data = dev_get_drvdata(dev);
1882 	int nr, bit, regindex;
1883 	unsigned long val;
1884 	int err;
1885 
1886 	err = kstrtoul(buf, 10, &val);
1887 	if (err < 0)
1888 		return err;
1889 	if (val > 1)
1890 		return -EINVAL;
1891 
1892 	nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1893 	if (nr < 0)
1894 		return nr;
1895 
1896 	bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1897 	regindex = bit >> 3;
1898 
1899 	mutex_lock(&data->update_lock);
1900 	if (val)
1901 		data->beeps |= (1ULL << bit);
1902 	else
1903 		data->beeps &= ~(1ULL << bit);
1904 	err = nct6775_write_value(data, data->REG_BEEP[regindex],
1905 				  (data->beeps >> (regindex << 3)) & 0xff);
1906 	mutex_unlock(&data->update_lock);
1907 
1908 	return err ? : count;
1909 }
1910 
nct6775_in_is_visible(struct kobject * kobj,struct attribute * attr,int index)1911 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1912 				     struct attribute *attr, int index)
1913 {
1914 	struct device *dev = kobj_to_dev(kobj);
1915 	struct nct6775_data *data = dev_get_drvdata(dev);
1916 	int in = index / 5;	/* voltage index */
1917 	int nr = index % 5;	/* attribute index */
1918 
1919 	if (nr == 1 && data->ALARM_BITS[in] == -1)
1920 		return 0;
1921 
1922 	if (!(data->have_in & BIT(in)))
1923 		return 0;
1924 
1925 	return nct6775_attr_mode(data, attr);
1926 }
1927 
1928 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1929 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1930 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1931 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1932 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
1933 
1934 /*
1935  * nct6775_in_is_visible uses the index into the following array
1936  * to determine if attributes should be created or not.
1937  * Any change in order or content must be matched.
1938  */
1939 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1940 	&sensor_dev_template_in_input,
1941 	&sensor_dev_template_in_alarm,
1942 	&sensor_dev_template_in_beep,
1943 	&sensor_dev_template_in_min,
1944 	&sensor_dev_template_in_max,
1945 	NULL
1946 };
1947 
1948 static const struct sensor_template_group nct6775_in_template_group = {
1949 	.templates = nct6775_attributes_in_template,
1950 	.is_visible = nct6775_in_is_visible,
1951 };
1952 
1953 static ssize_t
show_fan(struct device * dev,struct device_attribute * attr,char * buf)1954 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1955 {
1956 	struct nct6775_data *data = nct6775_update_device(dev);
1957 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1958 	int nr = sattr->index;
1959 
1960 	if (IS_ERR(data))
1961 		return PTR_ERR(data);
1962 
1963 	return sprintf(buf, "%d\n", data->rpm[nr]);
1964 }
1965 
1966 static ssize_t
show_fan_min(struct device * dev,struct device_attribute * attr,char * buf)1967 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1968 {
1969 	struct nct6775_data *data = nct6775_update_device(dev);
1970 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1971 	int nr = sattr->index;
1972 
1973 	if (IS_ERR(data))
1974 		return PTR_ERR(data);
1975 
1976 	return sprintf(buf, "%d\n",
1977 		       data->fan_from_reg_min(data->fan_min[nr],
1978 					      data->fan_div[nr]));
1979 }
1980 
1981 static ssize_t
show_fan_div(struct device * dev,struct device_attribute * attr,char * buf)1982 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1983 {
1984 	struct nct6775_data *data = nct6775_update_device(dev);
1985 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1986 	int nr = sattr->index;
1987 
1988 	if (IS_ERR(data))
1989 		return PTR_ERR(data);
1990 
1991 	return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1992 }
1993 
1994 static ssize_t
store_fan_min(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1995 store_fan_min(struct device *dev, struct device_attribute *attr,
1996 	      const char *buf, size_t count)
1997 {
1998 	struct nct6775_data *data = dev_get_drvdata(dev);
1999 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2000 	int nr = sattr->index;
2001 	unsigned long val;
2002 	unsigned int reg;
2003 	u8 new_div;
2004 	int err;
2005 
2006 	err = kstrtoul(buf, 10, &val);
2007 	if (err < 0)
2008 		return err;
2009 
2010 	mutex_lock(&data->update_lock);
2011 	if (!data->has_fan_div) {
2012 		/* NCT6776F or NCT6779D; we know this is a 13 bit register */
2013 		if (!val) {
2014 			val = 0xff1f;
2015 		} else {
2016 			if (val > 1350000U)
2017 				val = 135000U;
2018 			val = 1350000U / val;
2019 			val = (val & 0x1f) | ((val << 3) & 0xff00);
2020 		}
2021 		data->fan_min[nr] = val;
2022 		goto write_min;	/* Leave fan divider alone */
2023 	}
2024 	if (!val) {
2025 		/* No min limit, alarm disabled */
2026 		data->fan_min[nr] = 255;
2027 		new_div = data->fan_div[nr]; /* No change */
2028 		dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
2029 		goto write_div;
2030 	}
2031 	reg = 1350000U / val;
2032 	if (reg >= 128 * 255) {
2033 		/*
2034 		 * Speed below this value cannot possibly be represented,
2035 		 * even with the highest divider (128)
2036 		 */
2037 		data->fan_min[nr] = 254;
2038 		new_div = 7; /* 128 == BIT(7) */
2039 		dev_warn(dev,
2040 			 "fan%u low limit %lu below minimum %u, set to minimum\n",
2041 			 nr + 1, val, data->fan_from_reg_min(254, 7));
2042 	} else if (!reg) {
2043 		/*
2044 		 * Speed above this value cannot possibly be represented,
2045 		 * even with the lowest divider (1)
2046 		 */
2047 		data->fan_min[nr] = 1;
2048 		new_div = 0; /* 1 == BIT(0) */
2049 		dev_warn(dev,
2050 			 "fan%u low limit %lu above maximum %u, set to maximum\n",
2051 			 nr + 1, val, data->fan_from_reg_min(1, 0));
2052 	} else {
2053 		/*
2054 		 * Automatically pick the best divider, i.e. the one such
2055 		 * that the min limit will correspond to a register value
2056 		 * in the 96..192 range
2057 		 */
2058 		new_div = 0;
2059 		while (reg > 192 && new_div < 7) {
2060 			reg >>= 1;
2061 			new_div++;
2062 		}
2063 		data->fan_min[nr] = reg;
2064 	}
2065 
2066 write_div:
2067 	/*
2068 	 * Write both the fan clock divider (if it changed) and the new
2069 	 * fan min (unconditionally)
2070 	 */
2071 	if (new_div != data->fan_div[nr]) {
2072 		dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
2073 			nr + 1, div_from_reg(data->fan_div[nr]),
2074 			div_from_reg(new_div));
2075 		data->fan_div[nr] = new_div;
2076 		err = nct6775_write_fan_div_common(data, nr);
2077 		if (err)
2078 			goto write_min;
2079 		/* Give the chip time to sample a new speed value */
2080 		data->last_updated = jiffies;
2081 	}
2082 
2083 write_min:
2084 	err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
2085 	mutex_unlock(&data->update_lock);
2086 
2087 	return err ? : count;
2088 }
2089 
2090 static ssize_t
show_fan_pulses(struct device * dev,struct device_attribute * attr,char * buf)2091 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2092 {
2093 	struct nct6775_data *data = nct6775_update_device(dev);
2094 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2095 	int p;
2096 
2097 	if (IS_ERR(data))
2098 		return PTR_ERR(data);
2099 
2100 	p = data->fan_pulses[sattr->index];
2101 	return sprintf(buf, "%d\n", p ? : 4);
2102 }
2103 
2104 static ssize_t
store_fan_pulses(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2105 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2106 		 const char *buf, size_t count)
2107 {
2108 	struct nct6775_data *data = dev_get_drvdata(dev);
2109 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2110 	int nr = sattr->index;
2111 	unsigned long val;
2112 	int err;
2113 	u16 reg;
2114 
2115 	err = kstrtoul(buf, 10, &val);
2116 	if (err < 0)
2117 		return err;
2118 
2119 	if (val > 4)
2120 		return -EINVAL;
2121 
2122 	mutex_lock(&data->update_lock);
2123 	data->fan_pulses[nr] = val & 3;
2124 	err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], &reg);
2125 	if (err)
2126 		goto out;
2127 	reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2128 	reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2129 	err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2130 out:
2131 	mutex_unlock(&data->update_lock);
2132 
2133 	return err ? : count;
2134 }
2135 
nct6775_fan_is_visible(struct kobject * kobj,struct attribute * attr,int index)2136 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2137 				      struct attribute *attr, int index)
2138 {
2139 	struct device *dev = kobj_to_dev(kobj);
2140 	struct nct6775_data *data = dev_get_drvdata(dev);
2141 	int fan = index / 6;	/* fan index */
2142 	int nr = index % 6;	/* attribute index */
2143 
2144 	if (!(data->has_fan & BIT(fan)))
2145 		return 0;
2146 
2147 	if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2148 		return 0;
2149 	if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2150 		return 0;
2151 	if (nr == 3 && !data->REG_FAN_PULSES[fan])
2152 		return 0;
2153 	if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2154 		return 0;
2155 	if (nr == 5 && data->kind != nct6775)
2156 		return 0;
2157 
2158 	return nct6775_attr_mode(data, attr);
2159 }
2160 
2161 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2162 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
2163 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
2164 		nct6775_store_beep, FAN_ALARM_BASE);
2165 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2166 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2167 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2168 
2169 /*
2170  * nct6775_fan_is_visible uses the index into the following array
2171  * to determine if attributes should be created or not.
2172  * Any change in order or content must be matched.
2173  */
2174 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2175 	&sensor_dev_template_fan_input,
2176 	&sensor_dev_template_fan_alarm,	/* 1 */
2177 	&sensor_dev_template_fan_beep,	/* 2 */
2178 	&sensor_dev_template_fan_pulses,
2179 	&sensor_dev_template_fan_min,	/* 4 */
2180 	&sensor_dev_template_fan_div,	/* 5 */
2181 	NULL
2182 };
2183 
2184 static const struct sensor_template_group nct6775_fan_template_group = {
2185 	.templates = nct6775_attributes_fan_template,
2186 	.is_visible = nct6775_fan_is_visible,
2187 	.base = 1,
2188 };
2189 
2190 static ssize_t
show_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2191 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2192 {
2193 	struct nct6775_data *data = nct6775_update_device(dev);
2194 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2195 	int nr = sattr->index;
2196 
2197 	if (IS_ERR(data))
2198 		return PTR_ERR(data);
2199 
2200 	return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2201 }
2202 
2203 static ssize_t
show_temp(struct device * dev,struct device_attribute * attr,char * buf)2204 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2205 {
2206 	struct nct6775_data *data = nct6775_update_device(dev);
2207 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2208 	int nr = sattr->nr;
2209 	int index = sattr->index;
2210 
2211 	if (IS_ERR(data))
2212 		return PTR_ERR(data);
2213 
2214 	return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2215 }
2216 
2217 static ssize_t
store_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2218 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2219 	   size_t count)
2220 {
2221 	struct nct6775_data *data = dev_get_drvdata(dev);
2222 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2223 	int nr = sattr->nr;
2224 	int index = sattr->index;
2225 	int err;
2226 	long val;
2227 
2228 	err = kstrtol(buf, 10, &val);
2229 	if (err < 0)
2230 		return err;
2231 
2232 	mutex_lock(&data->update_lock);
2233 	data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2234 	err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2235 	mutex_unlock(&data->update_lock);
2236 	return err ? : count;
2237 }
2238 
2239 static ssize_t
show_temp_offset(struct device * dev,struct device_attribute * attr,char * buf)2240 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2241 {
2242 	struct nct6775_data *data = nct6775_update_device(dev);
2243 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2244 
2245 	if (IS_ERR(data))
2246 		return PTR_ERR(data);
2247 
2248 	return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2249 }
2250 
2251 static ssize_t
store_temp_offset(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2252 store_temp_offset(struct device *dev, struct device_attribute *attr,
2253 		  const char *buf, size_t count)
2254 {
2255 	struct nct6775_data *data = dev_get_drvdata(dev);
2256 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2257 	int nr = sattr->index;
2258 	long val;
2259 	int err;
2260 
2261 	err = kstrtol(buf, 10, &val);
2262 	if (err < 0)
2263 		return err;
2264 
2265 	val = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
2266 
2267 	mutex_lock(&data->update_lock);
2268 	data->temp_offset[nr] = val;
2269 	err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2270 	mutex_unlock(&data->update_lock);
2271 
2272 	return err ? : count;
2273 }
2274 
2275 static ssize_t
show_temp_type(struct device * dev,struct device_attribute * attr,char * buf)2276 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2277 {
2278 	struct nct6775_data *data = nct6775_update_device(dev);
2279 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2280 	int nr = sattr->index;
2281 
2282 	if (IS_ERR(data))
2283 		return PTR_ERR(data);
2284 
2285 	return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2286 }
2287 
2288 static ssize_t
store_temp_type(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2289 store_temp_type(struct device *dev, struct device_attribute *attr,
2290 		const char *buf, size_t count)
2291 {
2292 	struct nct6775_data *data = nct6775_update_device(dev);
2293 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2294 	int nr = sattr->index;
2295 	unsigned long val;
2296 	int err;
2297 	u8 vbit, dbit;
2298 	u16 vbat, diode;
2299 
2300 	if (IS_ERR(data))
2301 		return PTR_ERR(data);
2302 
2303 	err = kstrtoul(buf, 10, &val);
2304 	if (err < 0)
2305 		return err;
2306 
2307 	if (val != 1 && val != 3 && val != 4)
2308 		return -EINVAL;
2309 
2310 	mutex_lock(&data->update_lock);
2311 
2312 	data->temp_type[nr] = val;
2313 	vbit = 0x02 << nr;
2314 	dbit = data->DIODE_MASK << nr;
2315 
2316 	err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2317 	if (err)
2318 		goto out;
2319 	vbat &= ~vbit;
2320 
2321 	err = nct6775_read_value(data, data->REG_DIODE, &diode);
2322 	if (err)
2323 		goto out;
2324 	diode &= ~dbit;
2325 
2326 	switch (val) {
2327 	case 1:	/* CPU diode (diode, current mode) */
2328 		vbat |= vbit;
2329 		diode |= dbit;
2330 		break;
2331 	case 3: /* diode, voltage mode */
2332 		vbat |= dbit;
2333 		break;
2334 	case 4:	/* thermistor */
2335 		break;
2336 	}
2337 	err = nct6775_write_value(data, data->REG_VBAT, vbat);
2338 	if (err)
2339 		goto out;
2340 	err = nct6775_write_value(data, data->REG_DIODE, diode);
2341 out:
2342 	mutex_unlock(&data->update_lock);
2343 	return err ? : count;
2344 }
2345 
nct6775_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2346 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2347 				       struct attribute *attr, int index)
2348 {
2349 	struct device *dev = kobj_to_dev(kobj);
2350 	struct nct6775_data *data = dev_get_drvdata(dev);
2351 	int temp = index / 10;	/* temp index */
2352 	int nr = index % 10;	/* attribute index */
2353 
2354 	if (!(data->have_temp & BIT(temp)))
2355 		return 0;
2356 
2357 	if (nr == 1 && !data->temp_label)
2358 		return 0;
2359 
2360 	if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2361 		return 0;				/* alarm */
2362 
2363 	if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2364 		return 0;				/* beep */
2365 
2366 	if (nr == 4 && !data->reg_temp[1][temp])	/* max */
2367 		return 0;
2368 
2369 	if (nr == 5 && !data->reg_temp[2][temp])	/* max_hyst */
2370 		return 0;
2371 
2372 	if (nr == 6 && !data->reg_temp[3][temp])	/* crit */
2373 		return 0;
2374 
2375 	if (nr == 7 && !data->reg_temp[4][temp])	/* lcrit */
2376 		return 0;
2377 
2378 	/* offset and type only apply to fixed sensors */
2379 	if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2380 		return 0;
2381 
2382 	return nct6775_attr_mode(data, attr);
2383 }
2384 
2385 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2386 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2387 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2388 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2389 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2390 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2391 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2392 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2393 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2394 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2395 
2396 /*
2397  * nct6775_temp_is_visible uses the index into the following array
2398  * to determine if attributes should be created or not.
2399  * Any change in order or content must be matched.
2400  */
2401 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2402 	&sensor_dev_template_temp_input,
2403 	&sensor_dev_template_temp_label,
2404 	&sensor_dev_template_temp_alarm,	/* 2 */
2405 	&sensor_dev_template_temp_beep,		/* 3 */
2406 	&sensor_dev_template_temp_max,		/* 4 */
2407 	&sensor_dev_template_temp_max_hyst,	/* 5 */
2408 	&sensor_dev_template_temp_crit,		/* 6 */
2409 	&sensor_dev_template_temp_lcrit,	/* 7 */
2410 	&sensor_dev_template_temp_offset,	/* 8 */
2411 	&sensor_dev_template_temp_type,		/* 9 */
2412 	NULL
2413 };
2414 
2415 static const struct sensor_template_group nct6775_temp_template_group = {
2416 	.templates = nct6775_attributes_temp_template,
2417 	.is_visible = nct6775_temp_is_visible,
2418 	.base = 1,
2419 };
2420 
show_tsi_temp(struct device * dev,struct device_attribute * attr,char * buf)2421 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2422 {
2423 	struct nct6775_data *data = nct6775_update_device(dev);
2424 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2425 
2426 	if (IS_ERR(data))
2427 		return PTR_ERR(data);
2428 
2429 	return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2430 }
2431 
show_tsi_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2432 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2433 {
2434 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2435 
2436 	return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2437 }
2438 
2439 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2440 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2441 
nct6775_tsi_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2442 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2443 					       int index)
2444 {
2445 	struct device *dev = kobj_to_dev(kobj);
2446 	struct nct6775_data *data = dev_get_drvdata(dev);
2447 	int temp = index / 2;
2448 
2449 	return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2450 }
2451 
2452 /*
2453  * The index calculation in nct6775_tsi_temp_is_visible() must be kept in
2454  * sync with the size of this array.
2455  */
2456 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2457 	&sensor_dev_template_tsi_temp_input,
2458 	&sensor_dev_template_tsi_temp_label,
2459 	NULL
2460 };
2461 
2462 static ssize_t
show_pwm_mode(struct device * dev,struct device_attribute * attr,char * buf)2463 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2464 {
2465 	struct nct6775_data *data = nct6775_update_device(dev);
2466 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2467 
2468 	if (IS_ERR(data))
2469 		return PTR_ERR(data);
2470 
2471 	return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2472 }
2473 
2474 static ssize_t
store_pwm_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2475 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2476 	       const char *buf, size_t count)
2477 {
2478 	struct nct6775_data *data = dev_get_drvdata(dev);
2479 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2480 	int nr = sattr->index;
2481 	unsigned long val;
2482 	int err;
2483 	u16 reg;
2484 
2485 	err = kstrtoul(buf, 10, &val);
2486 	if (err < 0)
2487 		return err;
2488 
2489 	if (val > 1)
2490 		return -EINVAL;
2491 
2492 	/* Setting DC mode (0) is not supported for all chips/channels */
2493 	if (data->REG_PWM_MODE[nr] == 0) {
2494 		if (!val)
2495 			return -EINVAL;
2496 		return count;
2497 	}
2498 
2499 	mutex_lock(&data->update_lock);
2500 	data->pwm_mode[nr] = val;
2501 	err = nct6775_read_value(data, data->REG_PWM_MODE[nr], &reg);
2502 	if (err)
2503 		goto out;
2504 	reg &= ~data->PWM_MODE_MASK[nr];
2505 	if (!val)
2506 		reg |= data->PWM_MODE_MASK[nr];
2507 	err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2508 out:
2509 	mutex_unlock(&data->update_lock);
2510 	return err ? : count;
2511 }
2512 
2513 static ssize_t
show_pwm(struct device * dev,struct device_attribute * attr,char * buf)2514 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2515 {
2516 	struct nct6775_data *data = nct6775_update_device(dev);
2517 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2518 	int nr = sattr->nr;
2519 	int index = sattr->index;
2520 	int err;
2521 	u16 pwm;
2522 
2523 	if (IS_ERR(data))
2524 		return PTR_ERR(data);
2525 
2526 	/*
2527 	 * For automatic fan control modes, show current pwm readings.
2528 	 * Otherwise, show the configured value.
2529 	 */
2530 	if (index == 0 && data->pwm_enable[nr] > manual) {
2531 		err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
2532 		if (err)
2533 			return err;
2534 	} else {
2535 		pwm = data->pwm[index][nr];
2536 	}
2537 
2538 	return sprintf(buf, "%d\n", pwm);
2539 }
2540 
2541 static ssize_t
store_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2542 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2543 	  size_t count)
2544 {
2545 	struct nct6775_data *data = dev_get_drvdata(dev);
2546 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2547 	int nr = sattr->nr;
2548 	int index = sattr->index;
2549 	unsigned long val;
2550 	int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2551 	int maxval[7]
2552 	  = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2553 	int err;
2554 	u16 reg;
2555 
2556 	/*
2557 	 * The fan control mode should be set to manual if the user wants to adjust
2558 	 * the fan speed. Otherwise, it will fail to set.
2559 	 */
2560 	if (index == 0 && data->pwm_enable[nr] > manual)
2561 		return -EBUSY;
2562 
2563 	err = kstrtoul(buf, 10, &val);
2564 	if (err < 0)
2565 		return err;
2566 	val = clamp_val(val, minval[index], maxval[index]);
2567 
2568 	mutex_lock(&data->update_lock);
2569 	data->pwm[index][nr] = val;
2570 	err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
2571 	if (err)
2572 		goto out;
2573 	if (index == 2)	{ /* floor: disable if val == 0 */
2574 		err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], &reg);
2575 		if (err)
2576 			goto out;
2577 		reg &= 0x7f;
2578 		if (val)
2579 			reg |= 0x80;
2580 		err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2581 	}
2582 out:
2583 	mutex_unlock(&data->update_lock);
2584 	return err ? : count;
2585 }
2586 
2587 /* Returns 0 if OK, -EINVAL otherwise */
check_trip_points(struct nct6775_data * data,int nr)2588 static int check_trip_points(struct nct6775_data *data, int nr)
2589 {
2590 	int i;
2591 
2592 	for (i = 0; i < data->auto_pwm_num - 1; i++) {
2593 		if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2594 			return -EINVAL;
2595 	}
2596 	for (i = 0; i < data->auto_pwm_num - 1; i++) {
2597 		if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2598 			return -EINVAL;
2599 	}
2600 	/* validate critical temperature and pwm if enabled (pwm > 0) */
2601 	if (data->auto_pwm[nr][data->auto_pwm_num]) {
2602 		if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2603 				data->auto_temp[nr][data->auto_pwm_num] ||
2604 		    data->auto_pwm[nr][data->auto_pwm_num - 1] >
2605 				data->auto_pwm[nr][data->auto_pwm_num])
2606 			return -EINVAL;
2607 	}
2608 	return 0;
2609 }
2610 
pwm_update_registers(struct nct6775_data * data,int nr)2611 static int pwm_update_registers(struct nct6775_data *data, int nr)
2612 {
2613 	u16 reg;
2614 	int err;
2615 
2616 	switch (data->pwm_enable[nr]) {
2617 	case off:
2618 	case manual:
2619 		break;
2620 	case speed_cruise:
2621 		err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
2622 		if (err)
2623 			return err;
2624 		reg = (reg & ~data->tolerance_mask) |
2625 		  (data->target_speed_tolerance[nr] & data->tolerance_mask);
2626 		err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2627 		if (err)
2628 			return err;
2629 		err = nct6775_write_value(data, data->REG_TARGET[nr],
2630 					  data->target_speed[nr] & 0xff);
2631 		if (err)
2632 			return err;
2633 		if (data->REG_TOLERANCE_H) {
2634 			reg = (data->target_speed[nr] >> 8) & 0x0f;
2635 			reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2636 			err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2637 			if (err)
2638 				return err;
2639 		}
2640 		break;
2641 	case thermal_cruise:
2642 		err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
2643 		if (err)
2644 			return err;
2645 		fallthrough;
2646 	default:
2647 		err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
2648 		if (err)
2649 			return err;
2650 		reg = (reg & ~data->tolerance_mask) |
2651 		  data->temp_tolerance[0][nr];
2652 		err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2653 		if (err)
2654 			return err;
2655 		break;
2656 	}
2657 
2658 	return 0;
2659 }
2660 
2661 static ssize_t
show_pwm_enable(struct device * dev,struct device_attribute * attr,char * buf)2662 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2663 {
2664 	struct nct6775_data *data = nct6775_update_device(dev);
2665 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2666 
2667 	if (IS_ERR(data))
2668 		return PTR_ERR(data);
2669 
2670 	return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2671 }
2672 
2673 static ssize_t
store_pwm_enable(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2674 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2675 		 const char *buf, size_t count)
2676 {
2677 	struct nct6775_data *data = dev_get_drvdata(dev);
2678 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2679 	int nr = sattr->index;
2680 	unsigned long val;
2681 	int err;
2682 	u16 reg;
2683 
2684 	err = kstrtoul(buf, 10, &val);
2685 	if (err < 0)
2686 		return err;
2687 
2688 	if (val > sf4)
2689 		return -EINVAL;
2690 
2691 	if (val == sf3 && data->kind != nct6775)
2692 		return -EINVAL;
2693 
2694 	if (val == sf4 && check_trip_points(data, nr)) {
2695 		dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2696 		dev_err(dev, "Adjust trip points and try again\n");
2697 		return -EINVAL;
2698 	}
2699 
2700 	mutex_lock(&data->update_lock);
2701 	data->pwm_enable[nr] = val;
2702 	if (val == off) {
2703 		/*
2704 		 * turn off pwm control: select manual mode, set pwm to maximum
2705 		 */
2706 		data->pwm[0][nr] = 255;
2707 		err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2708 		if (err)
2709 			goto out;
2710 	}
2711 	err = pwm_update_registers(data, nr);
2712 	if (err)
2713 		goto out;
2714 	err = nct6775_read_value(data, data->REG_FAN_MODE[nr], &reg);
2715 	if (err)
2716 		goto out;
2717 	reg &= 0x0f;
2718 	reg |= pwm_enable_to_reg(val) << 4;
2719 	err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2720 out:
2721 	mutex_unlock(&data->update_lock);
2722 	return err ? : count;
2723 }
2724 
2725 static ssize_t
show_pwm_temp_sel_common(struct nct6775_data * data,char * buf,int src)2726 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2727 {
2728 	int i, sel = 0;
2729 
2730 	for (i = 0; i < NUM_TEMP; i++) {
2731 		if (!(data->have_temp & BIT(i)))
2732 			continue;
2733 		if (src == data->temp_src[i]) {
2734 			sel = i + 1;
2735 			break;
2736 		}
2737 	}
2738 
2739 	return sprintf(buf, "%d\n", sel);
2740 }
2741 
2742 static ssize_t
show_pwm_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2743 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2744 {
2745 	struct nct6775_data *data = nct6775_update_device(dev);
2746 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2747 	int index = sattr->index;
2748 
2749 	if (IS_ERR(data))
2750 		return PTR_ERR(data);
2751 
2752 	return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2753 }
2754 
2755 static ssize_t
store_pwm_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2756 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2757 		   const char *buf, size_t count)
2758 {
2759 	struct nct6775_data *data = nct6775_update_device(dev);
2760 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2761 	int nr = sattr->index;
2762 	unsigned long val;
2763 	int err, src;
2764 	u16 reg;
2765 
2766 	if (IS_ERR(data))
2767 		return PTR_ERR(data);
2768 
2769 	err = kstrtoul(buf, 10, &val);
2770 	if (err < 0)
2771 		return err;
2772 	if (val == 0 || val > NUM_TEMP)
2773 		return -EINVAL;
2774 	if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2775 		return -EINVAL;
2776 
2777 	mutex_lock(&data->update_lock);
2778 	src = data->temp_src[val - 1];
2779 	data->pwm_temp_sel[nr] = src;
2780 	err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], &reg);
2781 	if (err)
2782 		goto out;
2783 	reg &= 0xe0;
2784 	reg |= src;
2785 	err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2786 out:
2787 	mutex_unlock(&data->update_lock);
2788 
2789 	return err ? : count;
2790 }
2791 
2792 static ssize_t
show_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2793 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2794 			 char *buf)
2795 {
2796 	struct nct6775_data *data = nct6775_update_device(dev);
2797 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2798 	int index = sattr->index;
2799 
2800 	if (IS_ERR(data))
2801 		return PTR_ERR(data);
2802 
2803 	return show_pwm_temp_sel_common(data, buf,
2804 					data->pwm_weight_temp_sel[index]);
2805 }
2806 
2807 static ssize_t
store_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2808 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2809 			  const char *buf, size_t count)
2810 {
2811 	struct nct6775_data *data = nct6775_update_device(dev);
2812 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2813 	int nr = sattr->index;
2814 	unsigned long val;
2815 	int err, src;
2816 	u16 reg;
2817 
2818 	if (IS_ERR(data))
2819 		return PTR_ERR(data);
2820 
2821 	err = kstrtoul(buf, 10, &val);
2822 	if (err < 0)
2823 		return err;
2824 	if (val > NUM_TEMP)
2825 		return -EINVAL;
2826 	val = array_index_nospec(val, NUM_TEMP + 1);
2827 	if (val && (!(data->have_temp & BIT(val - 1)) ||
2828 		    !data->temp_src[val - 1]))
2829 		return -EINVAL;
2830 
2831 	mutex_lock(&data->update_lock);
2832 	if (val) {
2833 		src = data->temp_src[val - 1];
2834 		data->pwm_weight_temp_sel[nr] = src;
2835 		err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], &reg);
2836 		if (err)
2837 			goto out;
2838 		reg &= 0xe0;
2839 		reg |= (src | 0x80);
2840 		err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2841 	} else {
2842 		data->pwm_weight_temp_sel[nr] = 0;
2843 		err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], &reg);
2844 		if (err)
2845 			goto out;
2846 		reg &= 0x7f;
2847 		err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2848 	}
2849 out:
2850 	mutex_unlock(&data->update_lock);
2851 
2852 	return err ? : count;
2853 }
2854 
2855 static ssize_t
show_target_temp(struct device * dev,struct device_attribute * attr,char * buf)2856 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2857 {
2858 	struct nct6775_data *data = nct6775_update_device(dev);
2859 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2860 
2861 	if (IS_ERR(data))
2862 		return PTR_ERR(data);
2863 
2864 	return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2865 }
2866 
2867 static ssize_t
store_target_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2868 store_target_temp(struct device *dev, struct device_attribute *attr,
2869 		  const char *buf, size_t count)
2870 {
2871 	struct nct6775_data *data = dev_get_drvdata(dev);
2872 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2873 	int nr = sattr->index;
2874 	unsigned long val;
2875 	int err;
2876 
2877 	err = kstrtoul(buf, 10, &val);
2878 	if (err < 0)
2879 		return err;
2880 
2881 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2882 			data->target_temp_mask);
2883 
2884 	mutex_lock(&data->update_lock);
2885 	data->target_temp[nr] = val;
2886 	err = pwm_update_registers(data, nr);
2887 	mutex_unlock(&data->update_lock);
2888 	return err ? : count;
2889 }
2890 
2891 static ssize_t
show_target_speed(struct device * dev,struct device_attribute * attr,char * buf)2892 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2893 {
2894 	struct nct6775_data *data = nct6775_update_device(dev);
2895 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2896 	int nr = sattr->index;
2897 
2898 	if (IS_ERR(data))
2899 		return PTR_ERR(data);
2900 
2901 	return sprintf(buf, "%d\n",
2902 		       fan_from_reg16(data->target_speed[nr],
2903 				      data->fan_div[nr]));
2904 }
2905 
2906 static ssize_t
store_target_speed(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2907 store_target_speed(struct device *dev, struct device_attribute *attr,
2908 		   const char *buf, size_t count)
2909 {
2910 	struct nct6775_data *data = dev_get_drvdata(dev);
2911 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2912 	int nr = sattr->index;
2913 	unsigned long val;
2914 	int err;
2915 	u16 speed;
2916 
2917 	err = kstrtoul(buf, 10, &val);
2918 	if (err < 0)
2919 		return err;
2920 
2921 	val = clamp_val(val, 0, 1350000U);
2922 	speed = fan_to_reg(val, data->fan_div[nr]);
2923 
2924 	mutex_lock(&data->update_lock);
2925 	data->target_speed[nr] = speed;
2926 	err = pwm_update_registers(data, nr);
2927 	mutex_unlock(&data->update_lock);
2928 	return err ? : count;
2929 }
2930 
2931 static ssize_t
show_temp_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2932 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2933 		    char *buf)
2934 {
2935 	struct nct6775_data *data = nct6775_update_device(dev);
2936 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2937 	int nr = sattr->nr;
2938 	int index = sattr->index;
2939 
2940 	if (IS_ERR(data))
2941 		return PTR_ERR(data);
2942 
2943 	return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2944 }
2945 
2946 static ssize_t
store_temp_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2947 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2948 		     const char *buf, size_t count)
2949 {
2950 	struct nct6775_data *data = dev_get_drvdata(dev);
2951 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2952 	int nr = sattr->nr;
2953 	int index = sattr->index;
2954 	unsigned long val;
2955 	int err;
2956 
2957 	err = kstrtoul(buf, 10, &val);
2958 	if (err < 0)
2959 		return err;
2960 
2961 	/* Limit tolerance as needed */
2962 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2963 
2964 	mutex_lock(&data->update_lock);
2965 	data->temp_tolerance[index][nr] = val;
2966 	if (index)
2967 		err = pwm_update_registers(data, nr);
2968 	else
2969 		err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
2970 	mutex_unlock(&data->update_lock);
2971 	return err ? : count;
2972 }
2973 
2974 /*
2975  * Fan speed tolerance is a tricky beast, since the associated register is
2976  * a tick counter, but the value is reported and configured as rpm.
2977  * Compute resulting low and high rpm values and report the difference.
2978  * A fan speed tolerance only makes sense if a fan target speed has been
2979  * configured, so only display values other than 0 if that is the case.
2980  */
2981 static ssize_t
show_speed_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2982 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2983 		     char *buf)
2984 {
2985 	struct nct6775_data *data = nct6775_update_device(dev);
2986 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2987 	int nr = sattr->index;
2988 	int target, tolerance = 0;
2989 
2990 	if (IS_ERR(data))
2991 		return PTR_ERR(data);
2992 
2993 	target = data->target_speed[nr];
2994 
2995 	if (target) {
2996 		int low = target - data->target_speed_tolerance[nr];
2997 		int high = target + data->target_speed_tolerance[nr];
2998 
2999 		if (low <= 0)
3000 			low = 1;
3001 		if (high > 0xffff)
3002 			high = 0xffff;
3003 		if (high < low)
3004 			high = low;
3005 
3006 		tolerance = (fan_from_reg16(low, data->fan_div[nr])
3007 			     - fan_from_reg16(high, data->fan_div[nr])) / 2;
3008 	}
3009 
3010 	return sprintf(buf, "%d\n", tolerance);
3011 }
3012 
3013 static ssize_t
store_speed_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3014 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
3015 		      const char *buf, size_t count)
3016 {
3017 	struct nct6775_data *data = dev_get_drvdata(dev);
3018 	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
3019 	int nr = sattr->index;
3020 	unsigned long val;
3021 	int err;
3022 	int low, high;
3023 
3024 	err = kstrtoul(buf, 10, &val);
3025 	if (err < 0)
3026 		return err;
3027 
3028 	high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
3029 	low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
3030 	if (low <= 0)
3031 		low = 1;
3032 	if (high < low)
3033 		high = low;
3034 
3035 	val = (fan_to_reg(low, data->fan_div[nr]) -
3036 	       fan_to_reg(high, data->fan_div[nr])) / 2;
3037 
3038 	/* Limit tolerance as needed */
3039 	val = clamp_val(val, 0, data->speed_tolerance_limit);
3040 
3041 	mutex_lock(&data->update_lock);
3042 	data->target_speed_tolerance[nr] = val;
3043 	err = pwm_update_registers(data, nr);
3044 	mutex_unlock(&data->update_lock);
3045 	return err ? : count;
3046 }
3047 
3048 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
3049 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
3050 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
3051 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
3052 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
3053 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
3054 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
3055 		store_speed_tolerance, 0);
3056 
3057 /* Smart Fan registers */
3058 
3059 static ssize_t
show_weight_temp(struct device * dev,struct device_attribute * attr,char * buf)3060 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
3061 {
3062 	struct nct6775_data *data = nct6775_update_device(dev);
3063 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3064 	int nr = sattr->nr;
3065 	int index = sattr->index;
3066 
3067 	if (IS_ERR(data))
3068 		return PTR_ERR(data);
3069 
3070 	return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
3071 }
3072 
3073 static ssize_t
store_weight_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3074 store_weight_temp(struct device *dev, struct device_attribute *attr,
3075 		  const char *buf, size_t count)
3076 {
3077 	struct nct6775_data *data = dev_get_drvdata(dev);
3078 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3079 	int nr = sattr->nr;
3080 	int index = sattr->index;
3081 	unsigned long val;
3082 	int err;
3083 
3084 	err = kstrtoul(buf, 10, &val);
3085 	if (err < 0)
3086 		return err;
3087 
3088 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
3089 
3090 	mutex_lock(&data->update_lock);
3091 	data->weight_temp[index][nr] = val;
3092 	err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
3093 	mutex_unlock(&data->update_lock);
3094 	return err ? : count;
3095 }
3096 
3097 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
3098 		show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3099 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
3100 		  0644, show_weight_temp, store_weight_temp, 0, 0);
3101 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3102 		  0644, show_weight_temp, store_weight_temp, 0, 1);
3103 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3104 		  0644, show_weight_temp, store_weight_temp, 0, 2);
3105 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3106 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3107 
3108 static ssize_t
show_fan_time(struct device * dev,struct device_attribute * attr,char * buf)3109 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3110 {
3111 	struct nct6775_data *data = nct6775_update_device(dev);
3112 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3113 	int nr = sattr->nr;
3114 	int index = sattr->index;
3115 
3116 	if (IS_ERR(data))
3117 		return PTR_ERR(data);
3118 
3119 	return sprintf(buf, "%d\n",
3120 		       step_time_from_reg(data->fan_time[index][nr],
3121 					  data->pwm_mode[nr]));
3122 }
3123 
3124 static ssize_t
store_fan_time(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3125 store_fan_time(struct device *dev, struct device_attribute *attr,
3126 	       const char *buf, size_t count)
3127 {
3128 	struct nct6775_data *data = dev_get_drvdata(dev);
3129 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3130 	int nr = sattr->nr;
3131 	int index = sattr->index;
3132 	unsigned long val;
3133 	int err;
3134 
3135 	err = kstrtoul(buf, 10, &val);
3136 	if (err < 0)
3137 		return err;
3138 
3139 	val = step_time_to_reg(val, data->pwm_mode[nr]);
3140 	mutex_lock(&data->update_lock);
3141 	data->fan_time[index][nr] = val;
3142 	err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3143 	mutex_unlock(&data->update_lock);
3144 	return err ? : count;
3145 }
3146 
3147 static ssize_t
show_auto_pwm(struct device * dev,struct device_attribute * attr,char * buf)3148 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3149 {
3150 	struct nct6775_data *data = nct6775_update_device(dev);
3151 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3152 
3153 	if (IS_ERR(data))
3154 		return PTR_ERR(data);
3155 
3156 	return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3157 }
3158 
3159 static ssize_t
store_auto_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3160 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3161 	       const char *buf, size_t count)
3162 {
3163 	struct nct6775_data *data = dev_get_drvdata(dev);
3164 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3165 	int nr = sattr->nr;
3166 	int point = sattr->index;
3167 	unsigned long val;
3168 	int err;
3169 	u16 reg;
3170 
3171 	err = kstrtoul(buf, 10, &val);
3172 	if (err < 0)
3173 		return err;
3174 	if (val > 255)
3175 		return -EINVAL;
3176 
3177 	if (point == data->auto_pwm_num) {
3178 		if (data->kind != nct6775 && !val)
3179 			return -EINVAL;
3180 		if (data->kind != nct6779 && val)
3181 			val = 0xff;
3182 	}
3183 
3184 	mutex_lock(&data->update_lock);
3185 	data->auto_pwm[nr][point] = val;
3186 	if (point < data->auto_pwm_num) {
3187 		err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3188 					  data->auto_pwm[nr][point]);
3189 	} else {
3190 		switch (data->kind) {
3191 		case nct6775:
3192 			/* disable if needed (pwm == 0) */
3193 			err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], &reg);
3194 			if (err)
3195 				break;
3196 			if (val)
3197 				reg |= 0x02;
3198 			else
3199 				reg &= ~0x02;
3200 			err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3201 			break;
3202 		case nct6776:
3203 			break; /* always enabled, nothing to do */
3204 		case nct6106:
3205 		case nct6116:
3206 		case nct6779:
3207 		case nct6791:
3208 		case nct6792:
3209 		case nct6793:
3210 		case nct6795:
3211 		case nct6796:
3212 		case nct6797:
3213 		case nct6798:
3214 		case nct6799:
3215 			err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3216 			if (err)
3217 				break;
3218 			err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], &reg);
3219 			if (err)
3220 				break;
3221 			if (val == 255)
3222 				reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3223 			else
3224 				reg |= data->CRITICAL_PWM_ENABLE_MASK;
3225 			err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3226 			break;
3227 		}
3228 	}
3229 	mutex_unlock(&data->update_lock);
3230 	return err ? : count;
3231 }
3232 
3233 static ssize_t
show_auto_temp(struct device * dev,struct device_attribute * attr,char * buf)3234 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3235 {
3236 	struct nct6775_data *data = nct6775_update_device(dev);
3237 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3238 	int nr = sattr->nr;
3239 	int point = sattr->index;
3240 
3241 	if (IS_ERR(data))
3242 		return PTR_ERR(data);
3243 
3244 	/*
3245 	 * We don't know for sure if the temperature is signed or unsigned.
3246 	 * Assume it is unsigned.
3247 	 */
3248 	return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3249 }
3250 
3251 static ssize_t
store_auto_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3252 store_auto_temp(struct device *dev, struct device_attribute *attr,
3253 		const char *buf, size_t count)
3254 {
3255 	struct nct6775_data *data = dev_get_drvdata(dev);
3256 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3257 	int nr = sattr->nr;
3258 	int point = sattr->index;
3259 	unsigned long val;
3260 	int err;
3261 
3262 	err = kstrtoul(buf, 10, &val);
3263 	if (err)
3264 		return err;
3265 	if (val > 255000)
3266 		return -EINVAL;
3267 
3268 	mutex_lock(&data->update_lock);
3269 	data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3270 	if (point < data->auto_pwm_num) {
3271 		err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3272 					  data->auto_temp[nr][point]);
3273 	} else {
3274 		err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3275 					  data->auto_temp[nr][point]);
3276 	}
3277 	mutex_unlock(&data->update_lock);
3278 	return err ? : count;
3279 }
3280 
nct6775_pwm_is_visible(struct kobject * kobj,struct attribute * attr,int index)3281 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3282 				      struct attribute *attr, int index)
3283 {
3284 	struct device *dev = kobj_to_dev(kobj);
3285 	struct nct6775_data *data = dev_get_drvdata(dev);
3286 	int pwm = index / 36;	/* pwm index */
3287 	int nr = index % 36;	/* attribute index */
3288 
3289 	if (!(data->has_pwm & BIT(pwm)))
3290 		return 0;
3291 
3292 	if ((nr >= 14 && nr <= 18) || nr == 21)   /* weight */
3293 		if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3294 			return 0;
3295 	if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3296 		return 0;
3297 	if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3298 		return 0;
3299 	if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3300 		return 0;
3301 
3302 	if (nr >= 22 && nr <= 35) {		/* auto point */
3303 		int api = (nr - 22) / 2;	/* auto point index */
3304 
3305 		if (api > data->auto_pwm_num)
3306 			return 0;
3307 	}
3308 	return nct6775_attr_mode(data, attr);
3309 }
3310 
3311 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3312 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
3313 		  show_fan_time, store_fan_time, 0, 1);
3314 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
3315 		  show_fan_time, store_fan_time, 0, 2);
3316 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3317 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3318 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
3319 		  show_temp_tolerance, store_temp_tolerance, 0, 0);
3320 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3321 		  0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3322 
3323 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3324 
3325 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3326 
3327 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3328 		  0644, show_auto_pwm, store_auto_pwm, 0, 0);
3329 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3330 		  0644, show_auto_temp, store_auto_temp, 0, 0);
3331 
3332 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3333 		  0644, show_auto_pwm, store_auto_pwm, 0, 1);
3334 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3335 		  0644, show_auto_temp, store_auto_temp, 0, 1);
3336 
3337 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3338 		  0644, show_auto_pwm, store_auto_pwm, 0, 2);
3339 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3340 		  0644, show_auto_temp, store_auto_temp, 0, 2);
3341 
3342 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3343 		  0644, show_auto_pwm, store_auto_pwm, 0, 3);
3344 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3345 		  0644, show_auto_temp, store_auto_temp, 0, 3);
3346 
3347 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3348 		  0644, show_auto_pwm, store_auto_pwm, 0, 4);
3349 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3350 		  0644, show_auto_temp, store_auto_temp, 0, 4);
3351 
3352 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3353 		  0644, show_auto_pwm, store_auto_pwm, 0, 5);
3354 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3355 		  0644, show_auto_temp, store_auto_temp, 0, 5);
3356 
3357 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3358 		  0644, show_auto_pwm, store_auto_pwm, 0, 6);
3359 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3360 		  0644, show_auto_temp, store_auto_temp, 0, 6);
3361 
3362 /*
3363  * nct6775_pwm_is_visible uses the index into the following array
3364  * to determine if attributes should be created or not.
3365  * Any change in order or content must be matched.
3366  */
3367 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3368 	&sensor_dev_template_pwm,
3369 	&sensor_dev_template_pwm_mode,
3370 	&sensor_dev_template_pwm_enable,
3371 	&sensor_dev_template_pwm_temp_sel,
3372 	&sensor_dev_template_pwm_temp_tolerance,
3373 	&sensor_dev_template_pwm_crit_temp_tolerance,
3374 	&sensor_dev_template_pwm_target_temp,
3375 	&sensor_dev_template_fan_target,
3376 	&sensor_dev_template_fan_tolerance,
3377 	&sensor_dev_template_pwm_stop_time,
3378 	&sensor_dev_template_pwm_step_up_time,
3379 	&sensor_dev_template_pwm_step_down_time,
3380 	&sensor_dev_template_pwm_start,
3381 	&sensor_dev_template_pwm_floor,
3382 	&sensor_dev_template_pwm_weight_temp_sel,	/* 14 */
3383 	&sensor_dev_template_pwm_weight_temp_step,
3384 	&sensor_dev_template_pwm_weight_temp_step_tol,
3385 	&sensor_dev_template_pwm_weight_temp_step_base,
3386 	&sensor_dev_template_pwm_weight_duty_step,	/* 18 */
3387 	&sensor_dev_template_pwm_max,			/* 19 */
3388 	&sensor_dev_template_pwm_step,			/* 20 */
3389 	&sensor_dev_template_pwm_weight_duty_base,	/* 21 */
3390 	&sensor_dev_template_pwm_auto_point1_pwm,	/* 22 */
3391 	&sensor_dev_template_pwm_auto_point1_temp,
3392 	&sensor_dev_template_pwm_auto_point2_pwm,
3393 	&sensor_dev_template_pwm_auto_point2_temp,
3394 	&sensor_dev_template_pwm_auto_point3_pwm,
3395 	&sensor_dev_template_pwm_auto_point3_temp,
3396 	&sensor_dev_template_pwm_auto_point4_pwm,
3397 	&sensor_dev_template_pwm_auto_point4_temp,
3398 	&sensor_dev_template_pwm_auto_point5_pwm,
3399 	&sensor_dev_template_pwm_auto_point5_temp,
3400 	&sensor_dev_template_pwm_auto_point6_pwm,
3401 	&sensor_dev_template_pwm_auto_point6_temp,
3402 	&sensor_dev_template_pwm_auto_point7_pwm,
3403 	&sensor_dev_template_pwm_auto_point7_temp,	/* 35 */
3404 
3405 	NULL
3406 };
3407 
3408 static const struct sensor_template_group nct6775_pwm_template_group = {
3409 	.templates = nct6775_attributes_pwm_template,
3410 	.is_visible = nct6775_pwm_is_visible,
3411 	.base = 1,
3412 };
3413 
nct6775_init_device(struct nct6775_data * data)3414 static inline int nct6775_init_device(struct nct6775_data *data)
3415 {
3416 	int i, err;
3417 	u16 tmp, diode;
3418 
3419 	/* Start monitoring if needed */
3420 	if (data->REG_CONFIG) {
3421 		err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
3422 		if (err)
3423 			return err;
3424 		if (!(tmp & 0x01)) {
3425 			err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3426 			if (err)
3427 				return err;
3428 		}
3429 	}
3430 
3431 	/* Enable temperature sensors if needed */
3432 	for (i = 0; i < NUM_TEMP; i++) {
3433 		if (!(data->have_temp & BIT(i)))
3434 			continue;
3435 		if (!data->reg_temp_config[i])
3436 			continue;
3437 		err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
3438 		if (err)
3439 			return err;
3440 		if (tmp & 0x01) {
3441 			err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
3442 			if (err)
3443 				return err;
3444 		}
3445 	}
3446 
3447 	/* Enable VBAT monitoring if needed */
3448 	err = nct6775_read_value(data, data->REG_VBAT, &tmp);
3449 	if (err)
3450 		return err;
3451 	if (!(tmp & 0x01)) {
3452 		err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3453 		if (err)
3454 			return err;
3455 	}
3456 
3457 	err = nct6775_read_value(data, data->REG_DIODE, &diode);
3458 	if (err)
3459 		return err;
3460 
3461 	for (i = 0; i < data->temp_fixed_num; i++) {
3462 		if (!(data->have_temp_fixed & BIT(i)))
3463 			continue;
3464 		if ((tmp & (data->DIODE_MASK << i)))	/* diode */
3465 			data->temp_type[i]
3466 			  = 3 - ((diode >> i) & data->DIODE_MASK);
3467 		else				/* thermistor */
3468 			data->temp_type[i] = 4;
3469 	}
3470 
3471 	return 0;
3472 }
3473 
add_temp_sensors(struct nct6775_data * data,const u16 * regp,int * available,int * mask)3474 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3475 			    int *available, int *mask)
3476 {
3477 	int i, err;
3478 	u16 src;
3479 
3480 	for (i = 0; i < data->pwm_num && *available; i++) {
3481 		int index;
3482 
3483 		if (!regp[i])
3484 			continue;
3485 		err = nct6775_read_value(data, regp[i], &src);
3486 		if (err)
3487 			return err;
3488 		src &= 0x1f;
3489 		if (!src || (*mask & BIT(src)))
3490 			continue;
3491 		if (!(data->temp_mask & BIT(src)))
3492 			continue;
3493 
3494 		index = __ffs(*available);
3495 		err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3496 		if (err)
3497 			return err;
3498 		*available &= ~BIT(index);
3499 		*mask |= BIT(src);
3500 	}
3501 
3502 	return 0;
3503 }
3504 
nct6775_probe(struct device * dev,struct nct6775_data * data,const struct regmap_config * regmapcfg)3505 int nct6775_probe(struct device *dev, struct nct6775_data *data,
3506 		  const struct regmap_config *regmapcfg)
3507 {
3508 	int i, s, err = 0;
3509 	int mask, available;
3510 	u16 src;
3511 	const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3512 	const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3513 	const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3514 	int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
3515 	int num_reg_temp_config;
3516 	struct device *hwmon_dev;
3517 	struct sensor_template_group tsi_temp_tg;
3518 
3519 	data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
3520 	if (IS_ERR(data->regmap))
3521 		return PTR_ERR(data->regmap);
3522 
3523 	mutex_init(&data->update_lock);
3524 	data->name = nct6775_device_names[data->kind];
3525 	data->bank = 0xff;		/* Force initial bank selection */
3526 	data->scale_in = scale_in;
3527 
3528 	switch (data->kind) {
3529 	case nct6106:
3530 		data->in_num = 9;
3531 		data->pwm_num = 3;
3532 		data->auto_pwm_num = 4;
3533 		data->temp_fixed_num = 3;
3534 		data->num_temp_alarms = 6;
3535 		data->num_temp_beeps = 6;
3536 
3537 		data->fan_from_reg = fan_from_reg13;
3538 		data->fan_from_reg_min = fan_from_reg13;
3539 
3540 		data->temp_label = nct6776_temp_label;
3541 		data->temp_mask = NCT6776_TEMP_MASK;
3542 		data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3543 
3544 		data->REG_VBAT = NCT6106_REG_VBAT;
3545 		data->REG_DIODE = NCT6106_REG_DIODE;
3546 		data->DIODE_MASK = NCT6106_DIODE_MASK;
3547 		data->REG_VIN = NCT6106_REG_IN;
3548 		data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3549 		data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3550 		data->REG_TARGET = NCT6106_REG_TARGET;
3551 		data->REG_FAN = NCT6106_REG_FAN;
3552 		data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3553 		data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3554 		data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3555 		data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3556 		data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3557 		data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3558 		data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3559 		data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3560 		data->REG_PWM[0] = NCT6116_REG_PWM;
3561 		data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3562 		data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3563 		data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3564 		data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3565 		data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3566 		data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3567 		data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3568 		data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3569 		data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3570 		data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3571 		data->REG_CRITICAL_TEMP_TOLERANCE
3572 		  = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3573 		data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3574 		data->CRITICAL_PWM_ENABLE_MASK
3575 		  = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3576 		data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3577 		data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3578 		data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3579 		data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3580 		data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3581 		data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3582 		data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3583 		data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3584 		data->REG_ALARM = NCT6106_REG_ALARM;
3585 		data->ALARM_BITS = NCT6106_ALARM_BITS;
3586 		data->REG_BEEP = NCT6106_REG_BEEP;
3587 		data->BEEP_BITS = NCT6106_BEEP_BITS;
3588 		data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
3589 
3590 		reg_temp = NCT6106_REG_TEMP;
3591 		reg_temp_mon = NCT6106_REG_TEMP_MON;
3592 		num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3593 		num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3594 		num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
3595 		reg_temp_over = NCT6106_REG_TEMP_OVER;
3596 		reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3597 		reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3598 		num_reg_temp_config = ARRAY_SIZE(NCT6106_REG_TEMP_CONFIG);
3599 		reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3600 		reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3601 		reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3602 		reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3603 
3604 		break;
3605 	case nct6116:
3606 		data->in_num = 9;
3607 		data->pwm_num = 5;
3608 		data->auto_pwm_num = 4;
3609 		data->temp_fixed_num = 3;
3610 		data->num_temp_alarms = 3;
3611 		data->num_temp_beeps = 3;
3612 
3613 		data->fan_from_reg = fan_from_reg13;
3614 		data->fan_from_reg_min = fan_from_reg13;
3615 
3616 		data->temp_label = nct6776_temp_label;
3617 		data->temp_mask = NCT6776_TEMP_MASK;
3618 		data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3619 
3620 		data->REG_VBAT = NCT6106_REG_VBAT;
3621 		data->REG_DIODE = NCT6106_REG_DIODE;
3622 		data->DIODE_MASK = NCT6106_DIODE_MASK;
3623 		data->REG_VIN = NCT6106_REG_IN;
3624 		data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3625 		data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3626 		data->REG_TARGET = NCT6116_REG_TARGET;
3627 		data->REG_FAN = NCT6116_REG_FAN;
3628 		data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
3629 		data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
3630 		data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
3631 		data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
3632 		data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
3633 		data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
3634 		data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
3635 		data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
3636 		data->REG_PWM[0] = NCT6116_REG_PWM;
3637 		data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
3638 		data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
3639 		data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3640 		data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3641 		data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3642 		data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3643 		data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3644 		data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
3645 		data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
3646 		data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
3647 		data->REG_CRITICAL_TEMP_TOLERANCE
3648 		  = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
3649 		data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
3650 		data->CRITICAL_PWM_ENABLE_MASK
3651 		  = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3652 		data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
3653 		data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3654 		data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
3655 		data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3656 		data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3657 		data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3658 		data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3659 		data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3660 		data->REG_ALARM = NCT6106_REG_ALARM;
3661 		data->ALARM_BITS = NCT6116_ALARM_BITS;
3662 		data->REG_BEEP = NCT6106_REG_BEEP;
3663 		data->BEEP_BITS = NCT6116_BEEP_BITS;
3664 		data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
3665 
3666 		reg_temp = NCT6106_REG_TEMP;
3667 		reg_temp_mon = NCT6106_REG_TEMP_MON;
3668 		num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3669 		num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3670 		num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
3671 		reg_temp_over = NCT6106_REG_TEMP_OVER;
3672 		reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3673 		reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3674 		num_reg_temp_config = ARRAY_SIZE(NCT6106_REG_TEMP_CONFIG);
3675 		reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3676 		reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3677 		reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3678 		reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3679 
3680 		break;
3681 	case nct6775:
3682 		data->in_num = 9;
3683 		data->pwm_num = 3;
3684 		data->auto_pwm_num = 6;
3685 		data->has_fan_div = true;
3686 		data->temp_fixed_num = 3;
3687 		data->num_temp_alarms = 3;
3688 		data->num_temp_beeps = 3;
3689 
3690 		data->ALARM_BITS = NCT6775_ALARM_BITS;
3691 		data->BEEP_BITS = NCT6775_BEEP_BITS;
3692 
3693 		data->fan_from_reg = fan_from_reg16;
3694 		data->fan_from_reg_min = fan_from_reg8;
3695 		data->target_temp_mask = 0x7f;
3696 		data->tolerance_mask = 0x0f;
3697 		data->speed_tolerance_limit = 15;
3698 
3699 		data->temp_label = nct6775_temp_label;
3700 		data->temp_mask = NCT6775_TEMP_MASK;
3701 		data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3702 
3703 		data->REG_CONFIG = NCT6775_REG_CONFIG;
3704 		data->REG_VBAT = NCT6775_REG_VBAT;
3705 		data->REG_DIODE = NCT6775_REG_DIODE;
3706 		data->DIODE_MASK = NCT6775_DIODE_MASK;
3707 		data->REG_VIN = NCT6775_REG_IN;
3708 		data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3709 		data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3710 		data->REG_TARGET = NCT6775_REG_TARGET;
3711 		data->REG_FAN = NCT6775_REG_FAN;
3712 		data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3713 		data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3714 		data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3715 		data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3716 		data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3717 		data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3718 		data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3719 		data->REG_PWM[0] = NCT6775_REG_PWM;
3720 		data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3721 		data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3722 		data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3723 		data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3724 		data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3725 		data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3726 		data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3727 		data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3728 		data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3729 		data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3730 		data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3731 		data->REG_CRITICAL_TEMP_TOLERANCE
3732 		  = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3733 		data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3734 		data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3735 		data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3736 		data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3737 		data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3738 		data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3739 		data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3740 		data->REG_ALARM = NCT6775_REG_ALARM;
3741 		data->REG_BEEP = NCT6775_REG_BEEP;
3742 		data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
3743 
3744 		reg_temp = NCT6775_REG_TEMP;
3745 		reg_temp_mon = NCT6775_REG_TEMP_MON;
3746 		num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3747 		num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3748 		num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
3749 		reg_temp_over = NCT6775_REG_TEMP_OVER;
3750 		reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3751 		reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3752 		num_reg_temp_config = ARRAY_SIZE(NCT6775_REG_TEMP_CONFIG);
3753 		reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3754 		reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3755 
3756 		break;
3757 	case nct6776:
3758 		data->in_num = 9;
3759 		data->pwm_num = 3;
3760 		data->auto_pwm_num = 4;
3761 		data->has_fan_div = false;
3762 		data->temp_fixed_num = 3;
3763 		data->num_temp_alarms = 3;
3764 		data->num_temp_beeps = 6;
3765 
3766 		data->ALARM_BITS = NCT6776_ALARM_BITS;
3767 		data->BEEP_BITS = NCT6776_BEEP_BITS;
3768 
3769 		data->fan_from_reg = fan_from_reg13;
3770 		data->fan_from_reg_min = fan_from_reg13;
3771 		data->target_temp_mask = 0xff;
3772 		data->tolerance_mask = 0x07;
3773 		data->speed_tolerance_limit = 63;
3774 
3775 		data->temp_label = nct6776_temp_label;
3776 		data->temp_mask = NCT6776_TEMP_MASK;
3777 		data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3778 
3779 		data->REG_CONFIG = NCT6775_REG_CONFIG;
3780 		data->REG_VBAT = NCT6775_REG_VBAT;
3781 		data->REG_DIODE = NCT6775_REG_DIODE;
3782 		data->DIODE_MASK = NCT6775_DIODE_MASK;
3783 		data->REG_VIN = NCT6775_REG_IN;
3784 		data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3785 		data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3786 		data->REG_TARGET = NCT6775_REG_TARGET;
3787 		data->REG_FAN = NCT6775_REG_FAN;
3788 		data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3789 		data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3790 		data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3791 		data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3792 		data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3793 		data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3794 		data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3795 		data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3796 		data->REG_PWM[0] = NCT6775_REG_PWM;
3797 		data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3798 		data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3799 		data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3800 		data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3801 		data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3802 		data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3803 		data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3804 		data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3805 		data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3806 		data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3807 		data->REG_CRITICAL_TEMP_TOLERANCE
3808 		  = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3809 		data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3810 		data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3811 		data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3812 		data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3813 		data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3814 		data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3815 		data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3816 		data->REG_ALARM = NCT6775_REG_ALARM;
3817 		data->REG_BEEP = NCT6776_REG_BEEP;
3818 		data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3819 
3820 		reg_temp = NCT6775_REG_TEMP;
3821 		reg_temp_mon = NCT6775_REG_TEMP_MON;
3822 		num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3823 		num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3824 		num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3825 		reg_temp_over = NCT6775_REG_TEMP_OVER;
3826 		reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3827 		reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3828 		num_reg_temp_config = ARRAY_SIZE(NCT6776_REG_TEMP_CONFIG);
3829 		reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3830 		reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3831 
3832 		break;
3833 	case nct6779:
3834 		data->in_num = 15;
3835 		data->pwm_num = 5;
3836 		data->auto_pwm_num = 4;
3837 		data->has_fan_div = false;
3838 		data->temp_fixed_num = 6;
3839 		data->num_temp_alarms = 2;
3840 		data->num_temp_beeps = 2;
3841 
3842 		data->ALARM_BITS = NCT6779_ALARM_BITS;
3843 		data->BEEP_BITS = NCT6779_BEEP_BITS;
3844 
3845 		data->fan_from_reg = fan_from_reg_rpm;
3846 		data->fan_from_reg_min = fan_from_reg13;
3847 		data->target_temp_mask = 0xff;
3848 		data->tolerance_mask = 0x07;
3849 		data->speed_tolerance_limit = 63;
3850 
3851 		data->temp_label = nct6779_temp_label;
3852 		data->temp_mask = NCT6779_TEMP_MASK;
3853 		data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3854 
3855 		data->REG_CONFIG = NCT6775_REG_CONFIG;
3856 		data->REG_VBAT = NCT6775_REG_VBAT;
3857 		data->REG_DIODE = NCT6775_REG_DIODE;
3858 		data->DIODE_MASK = NCT6775_DIODE_MASK;
3859 		data->REG_VIN = NCT6779_REG_IN;
3860 		data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3861 		data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3862 		data->REG_TARGET = NCT6775_REG_TARGET;
3863 		data->REG_FAN = NCT6779_REG_FAN;
3864 		data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3865 		data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3866 		data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3867 		data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3868 		data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3869 		data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3870 		data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3871 		data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3872 		data->REG_PWM[0] = NCT6775_REG_PWM;
3873 		data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3874 		data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3875 		data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3876 		data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3877 		data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3878 		data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3879 		data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3880 		data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3881 		data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3882 		data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3883 		data->REG_CRITICAL_TEMP_TOLERANCE
3884 		  = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3885 		data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3886 		data->CRITICAL_PWM_ENABLE_MASK
3887 		  = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3888 		data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3889 		data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3890 		data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3891 		data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3892 		data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3893 		data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3894 		data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3895 		data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3896 		data->REG_ALARM = NCT6779_REG_ALARM;
3897 		data->REG_BEEP = NCT6776_REG_BEEP;
3898 		data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3899 
3900 		reg_temp = NCT6779_REG_TEMP;
3901 		reg_temp_mon = NCT6779_REG_TEMP_MON;
3902 		num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3903 		num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3904 		num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3905 		reg_temp_over = NCT6779_REG_TEMP_OVER;
3906 		reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3907 		reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3908 		num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
3909 		reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3910 		reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3911 
3912 		break;
3913 	case nct6791:
3914 	case nct6792:
3915 	case nct6793:
3916 	case nct6795:
3917 	case nct6796:
3918 	case nct6797:
3919 		data->in_num = 15;
3920 		data->pwm_num = (data->kind == nct6796 ||
3921 				 data->kind == nct6797) ? 7 : 6;
3922 		data->auto_pwm_num = 4;
3923 		data->has_fan_div = false;
3924 		data->temp_fixed_num = 6;
3925 		data->num_temp_alarms = 2;
3926 		data->num_temp_beeps = 2;
3927 
3928 		data->ALARM_BITS = NCT6791_ALARM_BITS;
3929 		data->BEEP_BITS = NCT6779_BEEP_BITS;
3930 
3931 		data->fan_from_reg = fan_from_reg_rpm;
3932 		data->fan_from_reg_min = fan_from_reg13;
3933 		data->target_temp_mask = 0xff;
3934 		data->tolerance_mask = 0x07;
3935 		data->speed_tolerance_limit = 63;
3936 
3937 		switch (data->kind) {
3938 		default:
3939 		case nct6791:
3940 			data->temp_label = nct6779_temp_label;
3941 			data->temp_mask = NCT6791_TEMP_MASK;
3942 			data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3943 			break;
3944 		case nct6792:
3945 			data->temp_label = nct6792_temp_label;
3946 			data->temp_mask = NCT6792_TEMP_MASK;
3947 			data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3948 			break;
3949 		case nct6793:
3950 			data->temp_label = nct6793_temp_label;
3951 			data->temp_mask = NCT6793_TEMP_MASK;
3952 			data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3953 			break;
3954 		case nct6795:
3955 		case nct6797:
3956 			data->temp_label = nct6795_temp_label;
3957 			data->temp_mask = NCT6795_TEMP_MASK;
3958 			data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3959 			break;
3960 		case nct6796:
3961 			data->temp_label = nct6796_temp_label;
3962 			data->temp_mask = NCT6796_TEMP_MASK;
3963 			data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3964 			break;
3965 		}
3966 
3967 		data->REG_CONFIG = NCT6775_REG_CONFIG;
3968 		data->REG_VBAT = NCT6775_REG_VBAT;
3969 		data->REG_DIODE = NCT6775_REG_DIODE;
3970 		data->DIODE_MASK = NCT6775_DIODE_MASK;
3971 		data->REG_VIN = NCT6779_REG_IN;
3972 		data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3973 		data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3974 		data->REG_TARGET = NCT6775_REG_TARGET;
3975 		data->REG_FAN = NCT6779_REG_FAN;
3976 		data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3977 		data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3978 		data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3979 		data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3980 		data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3981 		data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3982 		data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3983 		data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3984 		data->REG_PWM[0] = NCT6775_REG_PWM;
3985 		data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3986 		data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3987 		data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3988 		data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3989 		data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3990 		data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3991 		data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3992 		data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3993 		data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3994 		data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3995 		data->REG_CRITICAL_TEMP_TOLERANCE
3996 		  = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3997 		data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3998 		data->CRITICAL_PWM_ENABLE_MASK
3999 		  = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4000 		data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4001 		data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4002 		data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
4003 		data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4004 		data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4005 		data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4006 		data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4007 		data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4008 		data->REG_ALARM = NCT6791_REG_ALARM;
4009 		if (data->kind == nct6791)
4010 			data->REG_BEEP = NCT6776_REG_BEEP;
4011 		else
4012 			data->REG_BEEP = NCT6792_REG_BEEP;
4013 		switch (data->kind) {
4014 		case nct6791:
4015 		case nct6792:
4016 		case nct6793:
4017 			data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
4018 			num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
4019 			break;
4020 		case nct6795:
4021 		case nct6796:
4022 		case nct6797:
4023 			data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4024 			num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4025 			break;
4026 		default:
4027 			num_reg_tsi_temp = 0;
4028 			break;
4029 		}
4030 
4031 		reg_temp = NCT6779_REG_TEMP;
4032 		num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
4033 		if (data->kind == nct6791) {
4034 			reg_temp_mon = NCT6779_REG_TEMP_MON;
4035 			num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
4036 		} else {
4037 			reg_temp_mon = NCT6792_REG_TEMP_MON;
4038 			num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
4039 		}
4040 		reg_temp_over = NCT6779_REG_TEMP_OVER;
4041 		reg_temp_hyst = NCT6779_REG_TEMP_HYST;
4042 		reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4043 		num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
4044 		reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
4045 		reg_temp_crit = NCT6779_REG_TEMP_CRIT;
4046 
4047 		break;
4048 	case nct6798:
4049 	case nct6799:
4050 		data->in_num = data->kind == nct6799 ? 18 : 15;
4051 		data->scale_in = scale_in_6798;
4052 		data->pwm_num = 7;
4053 		data->auto_pwm_num = 4;
4054 		data->has_fan_div = false;
4055 		data->temp_fixed_num = 6;
4056 		data->num_temp_alarms = 7;
4057 		data->num_temp_beeps = 8;
4058 
4059 		data->ALARM_BITS = NCT6799_ALARM_BITS;
4060 		data->BEEP_BITS = NCT6799_BEEP_BITS;
4061 
4062 		data->fan_from_reg = fan_from_reg_rpm;
4063 		data->fan_from_reg_min = fan_from_reg13;
4064 		data->target_temp_mask = 0xff;
4065 		data->tolerance_mask = 0x07;
4066 		data->speed_tolerance_limit = 63;
4067 
4068 		switch (data->kind) {
4069 		default:
4070 		case nct6798:
4071 			data->temp_label = nct6798_temp_label;
4072 			data->temp_mask = NCT6798_TEMP_MASK;
4073 			data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
4074 			break;
4075 		case nct6799:
4076 			data->temp_label = nct6799_temp_label;
4077 			data->temp_mask = NCT6799_TEMP_MASK;
4078 			data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK;
4079 			break;
4080 		}
4081 
4082 		data->REG_CONFIG = NCT6775_REG_CONFIG;
4083 		data->REG_VBAT = NCT6775_REG_VBAT;
4084 		data->REG_DIODE = NCT6775_REG_DIODE;
4085 		data->DIODE_MASK = NCT6775_DIODE_MASK;
4086 		data->REG_VIN = NCT6779_REG_IN;
4087 		data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
4088 		data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
4089 		data->REG_TARGET = NCT6775_REG_TARGET;
4090 		data->REG_FAN = NCT6779_REG_FAN;
4091 		data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
4092 		data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
4093 		data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
4094 		data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
4095 		data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
4096 		data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
4097 		data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
4098 		data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
4099 		data->REG_PWM[0] = NCT6775_REG_PWM;
4100 		data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
4101 		data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
4102 		data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
4103 		data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
4104 		data->REG_PWM_READ = NCT6775_REG_PWM_READ;
4105 		data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
4106 		data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
4107 		data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
4108 		data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
4109 		data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
4110 		data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
4111 		data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
4112 		data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK;
4113 		data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
4114 		data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
4115 		data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE;
4116 		data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
4117 		data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
4118 		data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
4119 		data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
4120 		data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
4121 		data->REG_ALARM = NCT6799_REG_ALARM;
4122 		data->REG_BEEP = NCT6792_REG_BEEP;
4123 		data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
4124 		num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
4125 
4126 		reg_temp = NCT6798_REG_TEMP;
4127 		num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP);
4128 		reg_temp_mon = NCT6798_REG_TEMP_MON;
4129 		num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON);
4130 		reg_temp_over = NCT6798_REG_TEMP_OVER;
4131 		reg_temp_hyst = NCT6798_REG_TEMP_HYST;
4132 		reg_temp_config = NCT6779_REG_TEMP_CONFIG;
4133 		num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG);
4134 		reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE;
4135 		reg_temp_crit = NCT6798_REG_TEMP_CRIT;
4136 
4137 		break;
4138 	default:
4139 		return -ENODEV;
4140 	}
4141 	data->have_in = BIT(data->in_num) - 1;
4142 	data->have_temp = 0;
4143 
4144 	/*
4145 	 * On some boards, not all available temperature sources are monitored,
4146 	 * even though some of the monitoring registers are unused.
4147 	 * Get list of unused monitoring registers, then detect if any fan
4148 	 * controls are configured to use unmonitored temperature sources.
4149 	 * If so, assign the unmonitored temperature sources to available
4150 	 * monitoring registers.
4151 	 */
4152 	mask = 0;
4153 	available = 0;
4154 	for (i = 0; i < num_reg_temp; i++) {
4155 		if (reg_temp[i] == 0)
4156 			continue;
4157 
4158 		err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4159 		if (err)
4160 			return err;
4161 		src &= 0x1f;
4162 		if (!src || (mask & BIT(src)))
4163 			available |= BIT(i);
4164 
4165 		mask |= BIT(src);
4166 	}
4167 
4168 	/*
4169 	 * Now find unmonitored temperature registers and enable monitoring
4170 	 * if additional monitoring registers are available.
4171 	 */
4172 	err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
4173 	if (err)
4174 		return err;
4175 	err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
4176 	if (err)
4177 		return err;
4178 
4179 	mask = 0;
4180 	s = NUM_TEMP_FIXED;	/* First dynamic temperature attribute */
4181 	for (i = 0; i < num_reg_temp; i++) {
4182 		if (reg_temp[i] == 0)
4183 			continue;
4184 
4185 		err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4186 		if (err)
4187 			return err;
4188 		src &= 0x1f;
4189 		if (!src || (mask & BIT(src)))
4190 			continue;
4191 
4192 		if (!(data->temp_mask & BIT(src))) {
4193 			dev_info(dev,
4194 				 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4195 				 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4196 			continue;
4197 		}
4198 
4199 		mask |= BIT(src);
4200 
4201 		/* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4202 		if (src <= data->temp_fixed_num) {
4203 			data->have_temp |= BIT(src - 1);
4204 			data->have_temp_fixed |= BIT(src - 1);
4205 			data->reg_temp[0][src - 1] = reg_temp[i];
4206 			data->reg_temp[1][src - 1] = reg_temp_over[i];
4207 			data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4208 			if (reg_temp_crit_h && reg_temp_crit_h[i])
4209 				data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4210 			else if (reg_temp_crit[src - 1])
4211 				data->reg_temp[3][src - 1]
4212 				  = reg_temp_crit[src - 1];
4213 			if (reg_temp_crit_l && reg_temp_crit_l[i])
4214 				data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4215 			if (i < num_reg_temp_config)
4216 				data->reg_temp_config[src - 1] = reg_temp_config[i];
4217 			data->temp_src[src - 1] = src;
4218 			continue;
4219 		}
4220 
4221 		if (s >= NUM_TEMP)
4222 			continue;
4223 
4224 		/* Use dynamic index for other sources */
4225 		data->have_temp |= BIT(s);
4226 		data->reg_temp[0][s] = reg_temp[i];
4227 		data->reg_temp[1][s] = reg_temp_over[i];
4228 		data->reg_temp[2][s] = reg_temp_hyst[i];
4229 		if (i < num_reg_temp_config)
4230 			data->reg_temp_config[s] = reg_temp_config[i];
4231 		if (reg_temp_crit_h && reg_temp_crit_h[i])
4232 			data->reg_temp[3][s] = reg_temp_crit_h[i];
4233 		else if (reg_temp_crit[src - 1])
4234 			data->reg_temp[3][s] = reg_temp_crit[src - 1];
4235 		if (reg_temp_crit_l && reg_temp_crit_l[i])
4236 			data->reg_temp[4][s] = reg_temp_crit_l[i];
4237 
4238 		data->temp_src[s] = src;
4239 		s++;
4240 	}
4241 
4242 	/*
4243 	 * Repeat with temperatures used for fan control.
4244 	 * This set of registers does not support limits.
4245 	 */
4246 	for (i = 0; i < num_reg_temp_mon; i++) {
4247 		if (reg_temp_mon[i] == 0)
4248 			continue;
4249 
4250 		err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
4251 		if (err)
4252 			return err;
4253 		src &= 0x1f;
4254 		if (!src)
4255 			continue;
4256 
4257 		if (!(data->temp_mask & BIT(src))) {
4258 			dev_info(dev,
4259 				 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4260 				 src, i, data->REG_TEMP_SEL[i],
4261 				 reg_temp_mon[i]);
4262 			continue;
4263 		}
4264 
4265 		/*
4266 		 * For virtual temperature sources, the 'virtual' temperature
4267 		 * for each fan reflects a different temperature, and there
4268 		 * are no duplicates.
4269 		 */
4270 		if (!(data->virt_temp_mask & BIT(src))) {
4271 			if (mask & BIT(src))
4272 				continue;
4273 			mask |= BIT(src);
4274 		}
4275 
4276 		/* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4277 		if (src <= data->temp_fixed_num) {
4278 			if (data->have_temp & BIT(src - 1))
4279 				continue;
4280 			data->have_temp |= BIT(src - 1);
4281 			data->have_temp_fixed |= BIT(src - 1);
4282 			data->reg_temp[0][src - 1] = reg_temp_mon[i];
4283 			data->temp_src[src - 1] = src;
4284 			continue;
4285 		}
4286 
4287 		if (s >= NUM_TEMP)
4288 			continue;
4289 
4290 		/* Use dynamic index for other sources */
4291 		data->have_temp |= BIT(s);
4292 		data->reg_temp[0][s] = reg_temp_mon[i];
4293 		data->temp_src[s] = src;
4294 		s++;
4295 	}
4296 
4297 #ifdef USE_ALTERNATE
4298 	/*
4299 	 * Go through the list of alternate temp registers and enable
4300 	 * if possible.
4301 	 * The temperature is already monitored if the respective bit in <mask>
4302 	 * is set.
4303 	 */
4304 	for (i = 0; i < 31; i++) {
4305 		if (!(data->temp_mask & BIT(i + 1)))
4306 			continue;
4307 		if (!reg_temp_alternate[i])
4308 			continue;
4309 		if (mask & BIT(i + 1))
4310 			continue;
4311 		if (i < data->temp_fixed_num) {
4312 			if (data->have_temp & BIT(i))
4313 				continue;
4314 			data->have_temp |= BIT(i);
4315 			data->have_temp_fixed |= BIT(i);
4316 			data->reg_temp[0][i] = reg_temp_alternate[i];
4317 			if (i < num_reg_temp) {
4318 				data->reg_temp[1][i] = reg_temp_over[i];
4319 				data->reg_temp[2][i] = reg_temp_hyst[i];
4320 			}
4321 			data->temp_src[i] = i + 1;
4322 			continue;
4323 		}
4324 
4325 		if (s >= NUM_TEMP)	/* Abort if no more space */
4326 			break;
4327 
4328 		data->have_temp |= BIT(s);
4329 		data->reg_temp[0][s] = reg_temp_alternate[i];
4330 		data->temp_src[s] = i + 1;
4331 		s++;
4332 	}
4333 #endif /* USE_ALTERNATE */
4334 
4335 	/* Check which TSIx_TEMP registers are active */
4336 	for (i = 0; i < num_reg_tsi_temp; i++) {
4337 		u16 tmp;
4338 
4339 		err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
4340 		if (err)
4341 			return err;
4342 		if (tmp)
4343 			data->have_tsi_temp |= BIT(i);
4344 	}
4345 
4346 	/* Initialize the chip */
4347 	err = nct6775_init_device(data);
4348 	if (err)
4349 		return err;
4350 
4351 	if (data->driver_init) {
4352 		err = data->driver_init(data);
4353 		if (err)
4354 			return err;
4355 	}
4356 
4357 	/* Read fan clock dividers immediately */
4358 	err = nct6775_init_fan_common(dev, data);
4359 	if (err)
4360 		return err;
4361 
4362 	/* Register sysfs hooks */
4363 	err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
4364 					      data->pwm_num);
4365 	if (err)
4366 		return err;
4367 
4368 	err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
4369 					      fls(data->have_in));
4370 	if (err)
4371 		return err;
4372 
4373 	err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
4374 					      fls(data->has_fan));
4375 	if (err)
4376 		return err;
4377 
4378 	err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
4379 					      fls(data->have_temp));
4380 	if (err)
4381 		return err;
4382 
4383 	if (data->have_tsi_temp) {
4384 		tsi_temp_tg.templates = nct6775_tsi_temp_template;
4385 		tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
4386 		tsi_temp_tg.base = fls(data->have_temp) + 1;
4387 		err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
4388 						      fls(data->have_tsi_temp));
4389 		if (err)
4390 			return err;
4391 	}
4392 
4393 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4394 							   data, data->groups);
4395 	return PTR_ERR_OR_ZERO(hwmon_dev);
4396 }
4397 EXPORT_SYMBOL_GPL(nct6775_probe);
4398 
4399 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4400 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
4401 MODULE_LICENSE("GPL");
4402