1 /* Generic MTRR (Memory Type Range Register) ioctls.
2
3 Copyright (C) 1997-1999 Richard Gooch
4
5 This library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public
7 License as published by the Free Software Foundation; either
8 version 2 of the License, or (at your option) any later version.
9
10 This library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
14
15 You should have received a copy of the GNU Library General Public
16 License along with this library; if not, write to the Free
17 Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
19 Richard Gooch may be reached by email at rgooch@atnf.csiro.au
20 The postal address is:
21 Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
22 */
23 #ifndef _ASM_X86_MTRR_H
24 #define _ASM_X86_MTRR_H
25
26 #include <linux/bits.h>
27 #include <uapi/asm/mtrr.h>
28
29 /* Defines for hardware MTRR registers. */
30 #define MTRR_CAP_VCNT GENMASK(7, 0)
31 #define MTRR_CAP_FIX BIT_MASK(8)
32 #define MTRR_CAP_WC BIT_MASK(10)
33
34 #define MTRR_DEF_TYPE_TYPE GENMASK(7, 0)
35 #define MTRR_DEF_TYPE_FE BIT_MASK(10)
36 #define MTRR_DEF_TYPE_E BIT_MASK(11)
37
38 #define MTRR_DEF_TYPE_ENABLE (MTRR_DEF_TYPE_FE | MTRR_DEF_TYPE_E)
39 #define MTRR_DEF_TYPE_DISABLE ~(MTRR_DEF_TYPE_TYPE | MTRR_DEF_TYPE_ENABLE)
40
41 #define MTRR_PHYSBASE_TYPE GENMASK(7, 0)
42 #define MTRR_PHYSBASE_RSVD GENMASK(11, 8)
43
44 #define MTRR_PHYSMASK_RSVD GENMASK(10, 0)
45 #define MTRR_PHYSMASK_V BIT_MASK(11)
46
47 struct mtrr_state_type {
48 struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
49 mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
50 unsigned char enabled;
51 bool have_fixed;
52 mtrr_type def_type;
53 };
54
55 /*
56 * The following functions are for use by other drivers that cannot use
57 * arch_phys_wc_add and arch_phys_wc_del.
58 */
59 # ifdef CONFIG_MTRR
60 void mtrr_bp_init(void);
61 void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
62 mtrr_type def_type);
63 extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
64 extern void mtrr_save_fixed_ranges(void *);
65 extern void mtrr_save_state(void);
66 extern int mtrr_add(unsigned long base, unsigned long size,
67 unsigned int type, bool increment);
68 extern int mtrr_add_page(unsigned long base, unsigned long size,
69 unsigned int type, bool increment);
70 extern int mtrr_del(int reg, unsigned long base, unsigned long size);
71 extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
72 extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
73 extern int amd_special_default_mtrr(void);
74 void mtrr_disable(void);
75 void mtrr_enable(void);
76 void mtrr_generic_set_state(void);
77 # else
mtrr_overwrite_state(struct mtrr_var_range * var,unsigned int num_var,mtrr_type def_type)78 static inline void mtrr_overwrite_state(struct mtrr_var_range *var,
79 unsigned int num_var,
80 mtrr_type def_type)
81 {
82 }
83
mtrr_type_lookup(u64 addr,u64 end,u8 * uniform)84 static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
85 {
86 /*
87 * Return the default MTRR type, without any known other types in
88 * that range.
89 */
90 *uniform = 1;
91
92 return MTRR_TYPE_UNCACHABLE;
93 }
94 #define mtrr_save_fixed_ranges(arg) do {} while (0)
95 #define mtrr_save_state() do {} while (0)
mtrr_add(unsigned long base,unsigned long size,unsigned int type,bool increment)96 static inline int mtrr_add(unsigned long base, unsigned long size,
97 unsigned int type, bool increment)
98 {
99 return -ENODEV;
100 }
mtrr_add_page(unsigned long base,unsigned long size,unsigned int type,bool increment)101 static inline int mtrr_add_page(unsigned long base, unsigned long size,
102 unsigned int type, bool increment)
103 {
104 return -ENODEV;
105 }
mtrr_del(int reg,unsigned long base,unsigned long size)106 static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
107 {
108 return -ENODEV;
109 }
mtrr_del_page(int reg,unsigned long base,unsigned long size)110 static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
111 {
112 return -ENODEV;
113 }
mtrr_trim_uncached_memory(unsigned long end_pfn)114 static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
115 {
116 return 0;
117 }
118 #define mtrr_bp_init() do {} while (0)
119 #define mtrr_disable() do {} while (0)
120 #define mtrr_enable() do {} while (0)
121 #define mtrr_generic_set_state() do {} while (0)
122 # endif
123
124 #ifdef CONFIG_COMPAT
125 #include <linux/compat.h>
126
127 struct mtrr_sentry32 {
128 compat_ulong_t base; /* Base address */
129 compat_uint_t size; /* Size of region */
130 compat_uint_t type; /* Type of region */
131 };
132
133 struct mtrr_gentry32 {
134 compat_ulong_t regnum; /* Register number */
135 compat_uint_t base; /* Base address */
136 compat_uint_t size; /* Size of region */
137 compat_uint_t type; /* Type of region */
138 };
139
140 #define MTRR_IOCTL_BASE 'M'
141
142 #define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
143 #define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
144 #define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
145 #define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
146 #define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
147 #define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
148 #define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
149 #define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
150 #define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
151 #define MTRRIOC32_KILL_PAGE_ENTRY \
152 _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
153 #endif /* CONFIG_COMPAT */
154
155 /* Bit fields for enabled in struct mtrr_state_type */
156 #define MTRR_STATE_SHIFT 10
157 #define MTRR_STATE_MTRR_FIXED_ENABLED (MTRR_DEF_TYPE_FE >> MTRR_STATE_SHIFT)
158 #define MTRR_STATE_MTRR_ENABLED (MTRR_DEF_TYPE_E >> MTRR_STATE_SHIFT)
159
160 #endif /* _ASM_X86_MTRR_H */
161