xref: /linux/include/dt-bindings/power/mt8192-power.h (revision cdd38c5f1ce4398ec58fec95904b75824daab7b5)
1 /* SPDX-License-Identifier: GPL-2.0
2  *
3  * Copyright (c) 2020 MediaTek Inc.
4  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5  */
6 
7 #ifndef _DT_BINDINGS_POWER_MT8192_POWER_H
8 #define _DT_BINDINGS_POWER_MT8192_POWER_H
9 
10 #define MT8192_POWER_DOMAIN_AUDIO	0
11 #define MT8192_POWER_DOMAIN_CONN	1
12 #define MT8192_POWER_DOMAIN_MFG0	2
13 #define MT8192_POWER_DOMAIN_MFG1	3
14 #define MT8192_POWER_DOMAIN_MFG2	4
15 #define MT8192_POWER_DOMAIN_MFG3	5
16 #define MT8192_POWER_DOMAIN_MFG4	6
17 #define MT8192_POWER_DOMAIN_MFG5	7
18 #define MT8192_POWER_DOMAIN_MFG6	8
19 #define MT8192_POWER_DOMAIN_DISP	9
20 #define MT8192_POWER_DOMAIN_IPE		10
21 #define MT8192_POWER_DOMAIN_ISP		11
22 #define MT8192_POWER_DOMAIN_ISP2	12
23 #define MT8192_POWER_DOMAIN_MDP		13
24 #define MT8192_POWER_DOMAIN_VENC	14
25 #define MT8192_POWER_DOMAIN_VDEC	15
26 #define MT8192_POWER_DOMAIN_VDEC2	16
27 #define MT8192_POWER_DOMAIN_CAM		17
28 #define MT8192_POWER_DOMAIN_CAM_RAWA	18
29 #define MT8192_POWER_DOMAIN_CAM_RAWB	19
30 #define MT8192_POWER_DOMAIN_CAM_RAWC	20
31 
32 #endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
33