Searched defs:MCRegister (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/MCParser/ |
| H A D | MCParsedAsmOperand.h | 20 class MCRegister; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCTargetDesc.h | 29 class MCRegister; variable
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 97 constexpr operator MCRegister() const { return MCRegister(Reg); } in MCRegister() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.h | 32 class MCRegister; variable
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCSE.cpp | 286 SmallSet<MCRegister, 8> &PhysRefs, in hasLivePhysRegDefUses()
335 const SmallSet<MCRegister, 8> &PhysRefs, in PhysRegDefsReach()
801 SmallSet<MCRegister, 8> &PhysRefs) { in isPRECandidate()
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| H A D | AggressiveAntiDepBreaker.cpp | 80 std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference> in GetGroupRegs()
541 RenameOrderType &RenameOrder, std::map<MCRegister, MCRegister> &RenameMap) { in FindSuitableFreeRegisters()
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| H A D | IfConversion.cpp | 2113 SmallSet<MCRegister, 4> &LaterRedefs) { in MaySpeculate()
2135 SmallSet<MCRegister, 4> *LaterRedefs) { in PredicateBlock()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstPrinter.h | 25 class MCRegister; variable
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| H A D | MCStreamer.h | 50 class MCRegister; variable
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 754 … SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs, in passSpecialInputs()
1162 ArrayRef<std::pair<MCRegister, Register>> ImplicitArgRegs) const { in handleImplicitCallArguments()
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