xref: /linux/drivers/media/pci/ddbridge/ddbridge-mci.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * ddbridge-mci.h: Digital Devices micro code interface
4  *
5  * Copyright (C) 2017-2018 Digital Devices GmbH
6  *                         Marcus Metzler <mocm@metzlerbros.de>
7  *                         Ralph Metzler <rjkm@metzlerbros.de>
8  */
9 
10 #ifndef _DDBRIDGE_MCI_H_
11 #define _DDBRIDGE_MCI_H_
12 
13 #define MCI_DEMOD_MAX                       8
14 #define MCI_TUNER_MAX                       4
15 #define DEMOD_UNUSED                        (0xFF)
16 
17 #define MCI_CONTROL                         (0x500)
18 #define MCI_COMMAND                         (0x600)
19 #define MCI_RESULT                          (0x680)
20 
21 #define MCI_COMMAND_SIZE                    (0x80)
22 #define MCI_RESULT_SIZE                     (0x80)
23 
24 #define MCI_CONTROL_START_COMMAND           (0x00000001)
25 #define MCI_CONTROL_ENABLE_DONE_INTERRUPT   (0x00000002)
26 #define MCI_CONTROL_RESET                   (0x00008000)
27 #define MCI_CONTROL_READY                   (0x00010000)
28 
29 #define SX8_TSCONFIG                        (0x280)
30 
31 #define SX8_TSCONFIG_MODE_MASK              (0x00000003)
32 #define SX8_TSCONFIG_MODE_OFF               (0x00000000)
33 #define SX8_TSCONFIG_MODE_NORMAL            (0x00000001)
34 #define SX8_TSCONFIG_MODE_IQ                (0x00000003)
35 
36 /*
37  * IQMode is only available on MaxSX8 on a single tuner
38  *
39  * IQ_MODE_SAMPLES
40  *       sampling rate is 1550/24 MHz (64.583 MHz)
41  *       channel agc is frozen, to allow stitching the FFT results together
42  *
43  * IQ_MODE_VTM
44  *       sampling rate is the supplied symbolrate
45  *       channel agc is active
46  *
47  * in both cases down sampling is done with a RRC Filter (currently fixed to
48  * alpha = 0.05) which causes some (ca 5%) aliasing at the edges from
49  * outside the spectrum
50  */
51 
52 #define SX8_TSCONFIG_TSHEADER               (0x00000004)
53 #define SX8_TSCONFIG_BURST                  (0x00000008)
54 
55 #define SX8_TSCONFIG_BURSTSIZE_MASK         (0x00000030)
56 #define SX8_TSCONFIG_BURSTSIZE_2K           (0x00000000)
57 #define SX8_TSCONFIG_BURSTSIZE_4K           (0x00000010)
58 #define SX8_TSCONFIG_BURSTSIZE_8K           (0x00000020)
59 #define SX8_TSCONFIG_BURSTSIZE_16K          (0x00000030)
60 
61 #define SX8_DEMOD_STOPPED        (0)
62 #define SX8_DEMOD_IQ_MODE        (1)
63 #define SX8_DEMOD_WAIT_SIGNAL    (2)
64 #define SX8_DEMOD_WAIT_MATYPE    (3)
65 #define SX8_DEMOD_TIMEOUT        (14)
66 #define SX8_DEMOD_LOCKED         (15)
67 
68 #define MCI_CMD_STOP             (0x01)
69 #define MCI_CMD_GETSTATUS        (0x02)
70 #define MCI_CMD_GETSIGNALINFO    (0x03)
71 #define MCI_CMD_RFPOWER          (0x04)
72 
73 #define MCI_CMD_SEARCH_DVBS      (0x10)
74 
75 #define MCI_CMD_GET_IQSYMBOL     (0x30)
76 
77 #define SX8_CMD_INPUT_ENABLE     (0x40)
78 #define SX8_CMD_INPUT_DISABLE    (0x41)
79 #define SX8_CMD_START_IQ         (0x42)
80 #define SX8_CMD_STOP_IQ          (0x43)
81 #define SX8_CMD_ENABLE_IQOUTPUT  (0x44)
82 #define SX8_CMD_DISABLE_IQOUTPUT (0x45)
83 
84 #define MCI_STATUS_OK            (0x00)
85 #define MCI_STATUS_UNSUPPORTED   (0x80)
86 #define MCI_STATUS_RETRY         (0xFD)
87 #define MCI_STATUS_NOT_READY     (0xFE)
88 #define MCI_STATUS_ERROR         (0xFF)
89 
90 #define MCI_SUCCESS(status)      ((status & MCI_STATUS_UNSUPPORTED) == 0)
91 
92 struct mci_command {
93 	union {
94 		u32 command_word;
95 		struct {
96 			u8  command;
97 			u8  tuner;
98 			u8  demod;
99 			u8  output;
100 		};
101 	};
102 	union {
103 		u32 params[31];
104 		struct {
105 			/*
106 			 * Bit 0: DVB-S Enabled
107 			 * Bit 1: DVB-S2 Enabled
108 			 * Bit 7: InputStreamID
109 			 */
110 			u8  flags;
111 			/*
112 			 * Bit 0: QPSK,
113 			 * Bit 1: 8PSK/8APSK
114 			 * Bit 2: 16APSK
115 			 * Bit 3: 32APSK
116 			 * Bit 4: 64APSK
117 			 * Bit 5: 128APSK
118 			 * Bit 6: 256APSK
119 			 */
120 			u8  s2_modulation_mask;
121 			u8  rsvd1;
122 			u8  retry;
123 			u32 frequency;
124 			u32 symbol_rate;
125 			u8  input_stream_id;
126 			u8  rsvd2[3];
127 			u32 scrambling_sequence_index;
128 			u32 frequency_range;
129 		} dvbs2_search;
130 
131 		struct {
132 			u8  tap;
133 			u8  rsvd;
134 			u16 point;
135 		} get_iq_symbol;
136 
137 		struct {
138 			/*
139 			 * Bit 0: 0=VTM/1=SCAN
140 			 * Bit 1: Set Gain
141 			 */
142 			u8  flags;
143 			u8  roll_off;
144 			u8  rsvd1;
145 			u8  rsvd2;
146 			u32 frequency;
147 			u32 symbol_rate; /* Only in VTM mode */
148 			u16 gain;
149 		} sx8_start_iq;
150 
151 		struct {
152 			/*
153 			 * Bit 1:0 = STVVGLNA Gain.
154 			 *   0 = AGC, 1 = 0dB, 2 = Minimum, 3 = Maximum
155 			 */
156 			u8  flags;
157 		} sx8_input_enable;
158 	};
159 };
160 
161 struct mci_result {
162 	union {
163 		u32 status_word;
164 		struct {
165 			u8  status;
166 			u8  mode;
167 			u16 time;
168 		};
169 	};
170 	union {
171 		u32 result[27];
172 		struct {
173 			/* 1 = DVB-S, 2 = DVB-S2X */
174 			u8  standard;
175 			/* puncture rate for DVB-S */
176 			u8  pls_code;
177 			/* 2-0: rolloff */
178 			u8  roll_off;
179 			u8  rsvd;
180 			/* actual frequency in Hz */
181 			u32 frequency;
182 			/* actual symbolrate in Hz */
183 			u32 symbol_rate;
184 			/* channel power in dBm x 100 */
185 			s16 channel_power;
186 			/* band power in dBm x 100 */
187 			s16 band_power;
188 			/*
189 			 * SNR in dB x 100
190 			 * Note: negative values are valid in DVB-S2
191 			 */
192 			s16 signal_to_noise;
193 			s16 rsvd2;
194 			/*
195 			 * Counter for packet errors
196 			 * (set to 0 on start command)
197 			 */
198 			u32 packet_errors;
199 			/* Bit error rate: PreRS in DVB-S, PreBCH in DVB-S2X */
200 			u32 ber_numerator;
201 			u32 ber_denominator;
202 		} dvbs2_signal_info;
203 
204 		struct {
205 			s16 i;
206 			s16 q;
207 		} iq_symbol;
208 	};
209 	u32 version[4];
210 };
211 
212 struct mci_base {
213 	struct list_head     mci_list;
214 	void                *key;
215 	struct ddb_link     *link;
216 	struct completion    completion;
217 	struct device       *dev;
218 	struct mutex         tuner_lock; /* concurrent tuner access lock */
219 	struct mutex         mci_lock; /* concurrent MCI access lock */
220 	int                  count;
221 	int                  type;
222 };
223 
224 struct mci {
225 	struct mci_base     *base;
226 	struct dvb_frontend  fe;
227 	int                  nr;
228 	int                  demod;
229 	int                  tuner;
230 };
231 
232 struct mci_cfg {
233 	int                  type;
234 	struct dvb_frontend_ops *fe_ops;
235 	u32                  base_size;
236 	u32                  state_size;
237 	int (*init)(struct mci *mci);
238 	int (*base_init)(struct mci_base *mci_base);
239 	int (*set_input)(struct dvb_frontend *fe, int input);
240 };
241 
242 /* defined in ddbridge-sx8.c */
243 extern const struct mci_cfg ddb_max_sx8_cfg;
244 
245 int ddb_mci_cmd(struct mci *state, struct mci_command *command,
246 		struct mci_result *result);
247 int ddb_mci_config(struct mci *state, u32 config);
248 
249 struct dvb_frontend
250 *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
251 		int (**fn_set_input)(struct dvb_frontend *fe, int input));
252 
253 #endif /* _DDBRIDGE_MCI_H_ */
254