1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) 2012 Guenter Roeck <linux@roeck-us.net> 4 * 5 * based on max1668.c 6 * Copyright (c) 2011 David George <david.george@ska.ac.za> 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/bits.h> 11 #include <linux/err.h> 12 #include <linux/hwmon.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/regmap.h> 18 #include <linux/slab.h> 19 20 enum chips { max6581, max6602, max6622, max6636, max6689, max6693, max6694, 21 max6697, max6698, max6699 }; 22 23 /* Report local sensor as temp1 */ 24 25 static const u8 MAX6697_REG_TEMP[] = { 26 0x07, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x08 }; 27 static const u8 MAX6697_REG_TEMP_EXT[] = { 28 0x57, 0x09, 0x52, 0x53, 0x54, 0x55, 0x56, 0 }; 29 static const u8 MAX6697_REG_MAX[] = { 30 0x17, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x18 }; 31 static const u8 MAX6697_REG_CRIT[] = { 32 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27 }; 33 34 #define MAX6697_REG_MIN 0x30 35 /* 36 * Map device tree / internal register bit map to chip bit map. 37 * Applies to alert register and over-temperature register. 38 */ 39 40 #define MAX6697_EXTERNAL_MASK_DT GENMASK(7, 1) 41 #define MAX6697_LOCAL_MASK_DT BIT(0) 42 #define MAX6697_EXTERNAL_MASK_CHIP GENMASK(6, 0) 43 #define MAX6697_LOCAL_MASK_CHIP BIT(7) 44 45 /* alert - local channel is in bit 6 */ 46 #define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \ 47 (((reg) & 0x01) << 6) | ((reg) & 0x80)) 48 49 /* over-temperature - local channel is in bit 7 */ 50 #define MAX6697_OVERT_MAP_BITS(reg) \ 51 (FIELD_PREP(MAX6697_EXTERNAL_MASK_CHIP, FIELD_GET(MAX6697_EXTERNAL_MASK_DT, reg)) | \ 52 FIELD_PREP(MAX6697_LOCAL_MASK_CHIP, FIELD_GET(MAX6697_LOCAL_MASK_DT, reg))) 53 54 #define MAX6697_REG_STAT_ALARM 0x44 55 #define MAX6697_REG_STAT_CRIT 0x45 56 #define MAX6697_REG_STAT_FAULT 0x46 57 #define MAX6697_REG_STAT_MIN_ALARM 0x47 58 59 #define MAX6697_REG_CONFIG 0x41 60 #define MAX6581_CONF_EXTENDED BIT(1) 61 #define MAX6693_CONF_BETA BIT(2) 62 #define MAX6697_CONF_RESISTANCE BIT(3) 63 #define MAX6697_CONF_TIMEOUT BIT(5) 64 #define MAX6697_REG_ALERT_MASK 0x42 65 #define MAX6697_REG_OVERT_MASK 0x43 66 67 #define MAX6581_REG_RESISTANCE 0x4a 68 #define MAX6581_REG_IDEALITY 0x4b 69 #define MAX6581_REG_IDEALITY_SELECT 0x4c 70 #define MAX6581_REG_OFFSET 0x4d 71 #define MAX6581_REG_OFFSET_SELECT 0x4e 72 #define MAX6581_OFFSET_MIN -31750 73 #define MAX6581_OFFSET_MAX 31750 74 75 #define MAX6697_CONV_TIME 156 /* ms per channel, worst case */ 76 77 struct max6697_chip_data { 78 int channels; 79 u32 have_ext; 80 u32 have_crit; 81 u32 have_fault; 82 u8 valid_conf; 83 }; 84 85 struct max6697_data { 86 struct regmap *regmap; 87 88 enum chips type; 89 const struct max6697_chip_data *chip; 90 91 int temp_offset; /* in degrees C */ 92 93 #define MAX6697_TEMP_INPUT 0 94 #define MAX6697_TEMP_EXT 1 95 #define MAX6697_TEMP_MAX 2 96 #define MAX6697_TEMP_CRIT 3 97 u32 alarms; 98 }; 99 100 static const struct max6697_chip_data max6697_chip_data[] = { 101 [max6581] = { 102 .channels = 8, 103 .have_crit = 0xff, 104 .have_ext = 0x7f, 105 .have_fault = 0xfe, 106 .valid_conf = MAX6581_CONF_EXTENDED | MAX6697_CONF_TIMEOUT, 107 }, 108 [max6602] = { 109 .channels = 5, 110 .have_crit = 0x12, 111 .have_ext = 0x02, 112 .have_fault = 0x1e, 113 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 114 }, 115 [max6622] = { 116 .channels = 5, 117 .have_crit = 0x12, 118 .have_ext = 0x02, 119 .have_fault = 0x1e, 120 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 121 }, 122 [max6636] = { 123 .channels = 7, 124 .have_crit = 0x72, 125 .have_ext = 0x02, 126 .have_fault = 0x7e, 127 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 128 }, 129 [max6689] = { 130 .channels = 7, 131 .have_crit = 0x72, 132 .have_ext = 0x02, 133 .have_fault = 0x7e, 134 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 135 }, 136 [max6693] = { 137 .channels = 7, 138 .have_crit = 0x72, 139 .have_ext = 0x02, 140 .have_fault = 0x7e, 141 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA | 142 MAX6697_CONF_TIMEOUT, 143 }, 144 [max6694] = { 145 .channels = 5, 146 .have_crit = 0x12, 147 .have_ext = 0x02, 148 .have_fault = 0x1e, 149 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6693_CONF_BETA | 150 MAX6697_CONF_TIMEOUT, 151 }, 152 [max6697] = { 153 .channels = 7, 154 .have_crit = 0x72, 155 .have_ext = 0x02, 156 .have_fault = 0x7e, 157 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 158 }, 159 [max6698] = { 160 .channels = 7, 161 .have_crit = 0x72, 162 .have_ext = 0x02, 163 .have_fault = 0x0e, 164 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 165 }, 166 [max6699] = { 167 .channels = 5, 168 .have_crit = 0x12, 169 .have_ext = 0x02, 170 .have_fault = 0x1e, 171 .valid_conf = MAX6697_CONF_RESISTANCE | MAX6697_CONF_TIMEOUT, 172 }, 173 }; 174 175 static int max6697_alarm_channel_map(int channel) 176 { 177 switch (channel) { 178 case 0: 179 return 6; 180 case 7: 181 return 7; 182 default: 183 return channel - 1; 184 } 185 } 186 187 static int max6697_read(struct device *dev, enum hwmon_sensor_types type, 188 u32 attr, int channel, long *val) 189 { 190 unsigned int offset_regs[2] = { MAX6581_REG_OFFSET_SELECT, MAX6581_REG_OFFSET }; 191 unsigned int temp_regs[2] = { MAX6697_REG_TEMP[channel], 192 MAX6697_REG_TEMP_EXT[channel] }; 193 struct max6697_data *data = dev_get_drvdata(dev); 194 struct regmap *regmap = data->regmap; 195 u8 regdata[2] = { }; 196 u32 regval; 197 int ret; 198 199 switch (attr) { 200 case hwmon_temp_input: 201 ret = regmap_multi_reg_read(regmap, temp_regs, regdata, 202 data->chip->have_ext & BIT(channel) ? 2 : 1); 203 if (ret) 204 return ret; 205 *val = (((regdata[0] - data->temp_offset) << 3) | (regdata[1] >> 5)) * 125; 206 break; 207 case hwmon_temp_max: 208 ret = regmap_read(regmap, MAX6697_REG_MAX[channel], ®val); 209 if (ret) 210 return ret; 211 *val = ((int)regval - data->temp_offset) * 1000; 212 break; 213 case hwmon_temp_crit: 214 ret = regmap_read(regmap, MAX6697_REG_CRIT[channel], ®val); 215 if (ret) 216 return ret; 217 *val = ((int)regval - data->temp_offset) * 1000; 218 break; 219 case hwmon_temp_min: 220 ret = regmap_read(regmap, MAX6697_REG_MIN, ®val); 221 if (ret) 222 return ret; 223 *val = ((int)regval - data->temp_offset) * 1000; 224 break; 225 case hwmon_temp_offset: 226 ret = regmap_multi_reg_read(regmap, offset_regs, regdata, 2); 227 if (ret) 228 return ret; 229 230 if (!(regdata[0] & BIT(channel - 1))) 231 regdata[1] = 0; 232 233 *val = sign_extend32(regdata[1], 7) * 250; 234 break; 235 case hwmon_temp_fault: 236 ret = regmap_read(regmap, MAX6697_REG_STAT_FAULT, ®val); 237 if (ret) 238 return ret; 239 if (data->type == max6581) 240 *val = !!(regval & BIT(channel - 1)); 241 else 242 *val = !!(regval & BIT(channel)); 243 break; 244 case hwmon_temp_crit_alarm: 245 ret = regmap_read(regmap, MAX6697_REG_STAT_CRIT, ®val); 246 if (ret) 247 return ret; 248 /* 249 * In the MAX6581 datasheet revision 0 to 3, the local channel 250 * overtemperature status is reported in bit 6 of register 0x45, 251 * and the overtemperature status for remote channel 7 is 252 * reported in bit 7. In Revision 4 and later, the local channel 253 * overtemperature status is reported in bit 7, and the remote 254 * channel 7 overtemperature status is reported in bit 6. A real 255 * chip was found to match the functionality documented in 256 * Revision 4 and later. 257 */ 258 *val = !!(regval & BIT(channel ? channel - 1 : 7)); 259 break; 260 case hwmon_temp_max_alarm: 261 ret = regmap_read(regmap, MAX6697_REG_STAT_ALARM, ®val); 262 if (ret) 263 return ret; 264 *val = !!(regval & BIT(max6697_alarm_channel_map(channel))); 265 break; 266 case hwmon_temp_min_alarm: 267 ret = regmap_read(regmap, MAX6697_REG_STAT_MIN_ALARM, ®val); 268 if (ret) 269 return ret; 270 *val = !!(regval & BIT(max6697_alarm_channel_map(channel))); 271 break; 272 default: 273 return -EOPNOTSUPP; 274 } 275 return 0; 276 } 277 278 static int max6697_write(struct device *dev, enum hwmon_sensor_types type, 279 u32 attr, int channel, long val) 280 { 281 struct max6697_data *data = dev_get_drvdata(dev); 282 struct regmap *regmap = data->regmap; 283 int ret; 284 285 switch (attr) { 286 case hwmon_temp_max: 287 val = clamp_val(val, -1000000, 1000000); /* prevent underflow */ 288 val = DIV_ROUND_CLOSEST(val, 1000) + data->temp_offset; 289 val = clamp_val(val, 0, data->type == max6581 ? 255 : 127); 290 return regmap_write(regmap, MAX6697_REG_MAX[channel], val); 291 case hwmon_temp_crit: 292 val = clamp_val(val, -1000000, 1000000); /* prevent underflow */ 293 val = DIV_ROUND_CLOSEST(val, 1000) + data->temp_offset; 294 val = clamp_val(val, 0, data->type == max6581 ? 255 : 127); 295 return regmap_write(regmap, MAX6697_REG_CRIT[channel], val); 296 case hwmon_temp_min: 297 val = clamp_val(val, -1000000, 1000000); /* prevent underflow */ 298 val = DIV_ROUND_CLOSEST(val, 1000) + data->temp_offset; 299 val = clamp_val(val, 0, 255); 300 return regmap_write(regmap, MAX6697_REG_MIN, val); 301 case hwmon_temp_offset: 302 val = clamp_val(val, MAX6581_OFFSET_MIN, MAX6581_OFFSET_MAX); 303 val = DIV_ROUND_CLOSEST(val, 250); 304 if (!val) { /* disable this (and only this) channel */ 305 ret = regmap_clear_bits(regmap, MAX6581_REG_OFFSET_SELECT, 306 BIT(channel - 1)); 307 } else { 308 /* enable channel and update offset */ 309 ret = regmap_set_bits(regmap, MAX6581_REG_OFFSET_SELECT, 310 BIT(channel - 1)); 311 if (ret) 312 return ret; 313 ret = regmap_write(regmap, MAX6581_REG_OFFSET, val); 314 } 315 return ret; 316 default: 317 return -EOPNOTSUPP; 318 } 319 } 320 321 static umode_t max6697_is_visible(const void *_data, enum hwmon_sensor_types type, 322 u32 attr, int channel) 323 { 324 const struct max6697_data *data = _data; 325 const struct max6697_chip_data *chip = data->chip; 326 327 if (channel >= chip->channels) 328 return 0; 329 330 switch (attr) { 331 case hwmon_temp_max: 332 return 0644; 333 case hwmon_temp_input: 334 case hwmon_temp_max_alarm: 335 return 0444; 336 case hwmon_temp_min: 337 if (data->type == max6581) 338 return channel ? 0444 : 0644; 339 break; 340 case hwmon_temp_min_alarm: 341 if (data->type == max6581) 342 return 0444; 343 break; 344 case hwmon_temp_crit: 345 if (chip->have_crit & BIT(channel)) 346 return 0644; 347 break; 348 case hwmon_temp_crit_alarm: 349 if (chip->have_crit & BIT(channel)) 350 return 0444; 351 break; 352 case hwmon_temp_fault: 353 if (chip->have_fault & BIT(channel)) 354 return 0444; 355 break; 356 case hwmon_temp_offset: 357 if (data->type == max6581 && channel) 358 return 0644; 359 break; 360 default: 361 break; 362 } 363 return 0; 364 } 365 366 /* Return 0 if detection is successful, -ENODEV otherwise */ 367 static const struct hwmon_channel_info * const max6697_info[] = { 368 HWMON_CHANNEL_INFO(temp, 369 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 370 HWMON_T_MIN | HWMON_T_MIN_ALARM | 371 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM, 372 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 373 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 374 HWMON_T_MIN | HWMON_T_MIN_ALARM | 375 HWMON_T_FAULT | HWMON_T_OFFSET, 376 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 377 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 378 HWMON_T_MIN | HWMON_T_MIN_ALARM | 379 HWMON_T_FAULT | HWMON_T_OFFSET, 380 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 381 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 382 HWMON_T_MIN | HWMON_T_MIN_ALARM | 383 HWMON_T_FAULT | HWMON_T_OFFSET, 384 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 385 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 386 HWMON_T_MIN | HWMON_T_MIN_ALARM | 387 HWMON_T_FAULT | HWMON_T_OFFSET, 388 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 389 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 390 HWMON_T_MIN | HWMON_T_MIN_ALARM | 391 HWMON_T_FAULT | HWMON_T_OFFSET, 392 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 393 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 394 HWMON_T_MIN | HWMON_T_MIN_ALARM | 395 HWMON_T_FAULT | HWMON_T_OFFSET, 396 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT | 397 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | 398 HWMON_T_MIN | HWMON_T_MIN_ALARM | 399 HWMON_T_FAULT | HWMON_T_OFFSET), 400 NULL 401 }; 402 403 static const struct hwmon_ops max6697_hwmon_ops = { 404 .is_visible = max6697_is_visible, 405 .read = max6697_read, 406 .write = max6697_write, 407 }; 408 409 static const struct hwmon_chip_info max6697_chip_info = { 410 .ops = &max6697_hwmon_ops, 411 .info = max6697_info, 412 }; 413 414 static int max6697_config_of(struct device_node *node, struct max6697_data *data) 415 { 416 const struct max6697_chip_data *chip = data->chip; 417 struct regmap *regmap = data->regmap; 418 int ret, confreg; 419 u32 vals[2]; 420 421 confreg = 0; 422 if (of_property_read_bool(node, "smbus-timeout-disable") && 423 (chip->valid_conf & MAX6697_CONF_TIMEOUT)) { 424 confreg |= MAX6697_CONF_TIMEOUT; 425 } 426 if (of_property_read_bool(node, "extended-range-enable") && 427 (chip->valid_conf & MAX6581_CONF_EXTENDED)) { 428 confreg |= MAX6581_CONF_EXTENDED; 429 data->temp_offset = 64; 430 } 431 if (of_property_read_bool(node, "beta-compensation-enable") && 432 (chip->valid_conf & MAX6693_CONF_BETA)) { 433 confreg |= MAX6693_CONF_BETA; 434 } 435 436 if (of_property_read_u32(node, "alert-mask", vals)) 437 vals[0] = 0; 438 ret = regmap_write(regmap, MAX6697_REG_ALERT_MASK, 439 MAX6697_ALERT_MAP_BITS(vals[0])); 440 if (ret) 441 return ret; 442 443 if (of_property_read_u32(node, "over-temperature-mask", vals)) 444 vals[0] = 0; 445 ret = regmap_write(regmap, MAX6697_REG_OVERT_MASK, 446 MAX6697_OVERT_MAP_BITS(vals[0])); 447 if (ret) 448 return ret; 449 450 if (data->type != max6581) { 451 if (of_property_read_bool(node, "resistance-cancellation") && 452 chip->valid_conf & MAX6697_CONF_RESISTANCE) { 453 confreg |= MAX6697_CONF_RESISTANCE; 454 } 455 } else { 456 if (of_property_read_u32(node, "resistance-cancellation", &vals[0])) { 457 if (of_property_read_bool(node, "resistance-cancellation")) 458 vals[0] = 0xfe; 459 else 460 vals[0] = 0; 461 } 462 463 vals[0] &= 0xfe; 464 ret = regmap_write(regmap, MAX6581_REG_RESISTANCE, vals[0] >> 1); 465 if (ret < 0) 466 return ret; 467 468 if (of_property_read_u32_array(node, "transistor-ideality", vals, 2)) { 469 vals[0] = 0; 470 vals[1] = 0; 471 } 472 473 ret = regmap_write(regmap, MAX6581_REG_IDEALITY, vals[1]); 474 if (ret < 0) 475 return ret; 476 ret = regmap_write(regmap, MAX6581_REG_IDEALITY_SELECT, 477 (vals[0] & 0xfe) >> 1); 478 if (ret < 0) 479 return ret; 480 } 481 return regmap_write(regmap, MAX6697_REG_CONFIG, confreg); 482 } 483 484 static int max6697_init_chip(struct device_node *np, struct max6697_data *data) 485 { 486 unsigned int reg; 487 int ret; 488 489 /* 490 * Don't touch configuration if there is no devicetree configuration. 491 * If that is the case, use the current chip configuration. 492 */ 493 if (!np) { 494 struct regmap *regmap = data->regmap; 495 496 ret = regmap_read(regmap, MAX6697_REG_CONFIG, ®); 497 if (ret < 0) 498 return ret; 499 if (data->type == max6581) { 500 if (reg & MAX6581_CONF_EXTENDED) 501 data->temp_offset = 64; 502 ret = regmap_read(regmap, MAX6581_REG_RESISTANCE, ®); 503 } 504 } else { 505 ret = max6697_config_of(np, data); 506 } 507 508 return ret; 509 } 510 511 static bool max6697_volatile_reg(struct device *dev, unsigned int reg) 512 { 513 switch (reg) { 514 case 0x00 ... 0x09: /* temperature high bytes */ 515 case 0x44 ... 0x47: /* status */ 516 case 0x51 ... 0x58: /* temperature low bytes */ 517 return true; 518 default: 519 return false; 520 } 521 } 522 523 static bool max6697_writeable_reg(struct device *dev, unsigned int reg) 524 { 525 return reg != 0x0a && reg != 0x0f && !max6697_volatile_reg(dev, reg); 526 } 527 528 static const struct regmap_config max6697_regmap_config = { 529 .reg_bits = 8, 530 .val_bits = 8, 531 .max_register = 0x58, 532 .writeable_reg = max6697_writeable_reg, 533 .volatile_reg = max6697_volatile_reg, 534 .cache_type = REGCACHE_MAPLE, 535 }; 536 537 static int max6697_probe(struct i2c_client *client) 538 { 539 struct device *dev = &client->dev; 540 struct max6697_data *data; 541 struct device *hwmon_dev; 542 struct regmap *regmap; 543 int err; 544 545 regmap = devm_regmap_init_i2c(client, &max6697_regmap_config); 546 if (IS_ERR(regmap)) 547 return PTR_ERR(regmap); 548 549 data = devm_kzalloc(dev, sizeof(struct max6697_data), GFP_KERNEL); 550 if (!data) 551 return -ENOMEM; 552 553 data->regmap = regmap; 554 data->type = (uintptr_t)i2c_get_match_data(client); 555 data->chip = &max6697_chip_data[data->type]; 556 557 err = max6697_init_chip(client->dev.of_node, data); 558 if (err) 559 return err; 560 561 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data, 562 &max6697_chip_info, NULL); 563 return PTR_ERR_OR_ZERO(hwmon_dev); 564 } 565 566 static const struct i2c_device_id max6697_id[] = { 567 { "max6581", max6581 }, 568 { "max6602", max6602 }, 569 { "max6622", max6622 }, 570 { "max6636", max6636 }, 571 { "max6689", max6689 }, 572 { "max6693", max6693 }, 573 { "max6694", max6694 }, 574 { "max6697", max6697 }, 575 { "max6698", max6698 }, 576 { "max6699", max6699 }, 577 { } 578 }; 579 MODULE_DEVICE_TABLE(i2c, max6697_id); 580 581 static const struct of_device_id __maybe_unused max6697_of_match[] = { 582 { 583 .compatible = "maxim,max6581", 584 .data = (void *)max6581 585 }, 586 { 587 .compatible = "maxim,max6602", 588 .data = (void *)max6602 589 }, 590 { 591 .compatible = "maxim,max6622", 592 .data = (void *)max6622 593 }, 594 { 595 .compatible = "maxim,max6636", 596 .data = (void *)max6636 597 }, 598 { 599 .compatible = "maxim,max6689", 600 .data = (void *)max6689 601 }, 602 { 603 .compatible = "maxim,max6693", 604 .data = (void *)max6693 605 }, 606 { 607 .compatible = "maxim,max6694", 608 .data = (void *)max6694 609 }, 610 { 611 .compatible = "maxim,max6697", 612 .data = (void *)max6697 613 }, 614 { 615 .compatible = "maxim,max6698", 616 .data = (void *)max6698 617 }, 618 { 619 .compatible = "maxim,max6699", 620 .data = (void *)max6699 621 }, 622 { }, 623 }; 624 MODULE_DEVICE_TABLE(of, max6697_of_match); 625 626 static struct i2c_driver max6697_driver = { 627 .driver = { 628 .name = "max6697", 629 .of_match_table = of_match_ptr(max6697_of_match), 630 }, 631 .probe = max6697_probe, 632 .id_table = max6697_id, 633 }; 634 635 module_i2c_driver(max6697_driver); 636 637 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 638 MODULE_DESCRIPTION("MAX6697 temperature sensor driver"); 639 MODULE_LICENSE("GPL"); 640